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1 /* Target-machine dependent code for Motorola 88000 series, for GDB.
2 Copyright (C) 1988, 1990, 1991 Free Software Foundation, Inc.
3
4 This file is part of GDB.
5
6 This program is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 2 of the License, or
9 (at your option) any later version.
10
11 This program is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
15
16 You should have received a copy of the GNU General Public License
17 along with this program; if not, write to the Free Software
18 Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. */
19
20 #include "defs.h"
21 #include "frame.h"
22 #include "inferior.h"
23 #include "value.h"
24
25 #ifdef USG
26 #include <sys/types.h>
27 #endif
28
29 #include <sys/param.h>
30 #include <sys/dir.h>
31 #include <signal.h>
32 #include "gdbcore.h"
33 #include <sys/user.h>
34 #ifndef USER /* added to support BCS ptrace_user */
35
36 #define USER ptrace_user
37 #endif
38 #include <sys/ioctl.h>
39 #include <fcntl.h>
40
41 #include <sys/file.h>
42 #include <sys/stat.h>
43
44 #include "symtab.h"
45 #include "setjmp.h"
46 #include "value.h"
47
48 /* Size of an instruction */
49 #define BYTES_PER_88K_INSN 4
50
51 void frame_find_saved_regs ();
52
53
54 /* Given a GDB frame, determine the address of the calling function's frame.
55 This will be used to create a new GDB frame struct, and then
56 INIT_EXTRA_FRAME_INFO and INIT_FRAME_PC will be called for the new frame.
57
58 For us, the frame address is its stack pointer value, so we look up
59 the function prologue to determine the caller's sp value, and return it. */
60
61 FRAME_ADDR
62 frame_chain (thisframe)
63 FRAME thisframe;
64 {
65
66 frame_find_saved_regs (thisframe, (struct frame_saved_regs *) 0);
67 /* NOTE: this depends on frame_find_saved_regs returning the VALUE, not
68 the ADDRESS, of SP_REGNUM. It also depends on the cache of
69 frame_find_saved_regs results. */
70 if (thisframe->fsr->regs[SP_REGNUM])
71 return thisframe->fsr->regs[SP_REGNUM];
72 else
73 return thisframe->frame; /* Leaf fn -- next frame up has same SP. */
74 }
75
76 int
77 frameless_function_invocation (frame)
78 FRAME frame;
79 {
80
81 frame_find_saved_regs (frame, (struct frame_saved_regs *) 0);
82 /* NOTE: this depends on frame_find_saved_regs returning the VALUE, not
83 the ADDRESS, of SP_REGNUM. It also depends on the cache of
84 frame_find_saved_regs results. */
85 if (frame->fsr->regs[SP_REGNUM])
86 return 0; /* Frameful -- return addr saved somewhere */
87 else
88 return 1; /* Frameless -- no saved return address */
89 }
90
91 int
92 frame_chain_valid (chain, thisframe)
93 CORE_ADDR chain;
94 struct frame_info *thisframe;
95 {
96 return (chain != 0
97 && !inside_entry_file (FRAME_SAVED_PC (thisframe)));
98 }
99
100 void
101 init_extra_frame_info (fromleaf, fi)
102 int fromleaf;
103 struct frame_info *fi;
104 {
105 fi->fsr = 0; /* Not yet allocated */
106 fi->args_pointer = 0; /* Unknown */
107 fi->locals_pointer = 0; /* Unknown */
108 }
109 \f
110 /* Examine an m88k function prologue, recording the addresses at which
111 registers are saved explicitly by the prologue code, and returning
112 the address of the first instruction after the prologue (but not
113 after the instruction at address LIMIT, as explained below).
114
115 LIMIT places an upper bound on addresses of the instructions to be
116 examined. If the prologue code scan reaches LIMIT, the scan is
117 aborted and LIMIT is returned. This is used, when examining the
118 prologue for the current frame, to keep examine_prologue () from
119 claiming that a given register has been saved when in fact the
120 instruction that saves it has not yet been executed. LIMIT is used
121 at other times to stop the scan when we hit code after the true
122 function prologue (e.g. for the first source line) which might
123 otherwise be mistaken for function prologue.
124
125 The format of the function prologue matched by this routine is
126 derived from examination of the source to gcc 1.95, particularly
127 the routine output_prologue () in config/out-m88k.c.
128
129 subu r31,r31,n # stack pointer update
130
131 (st rn,r31,offset)? # save incoming regs
132 (st.d rn,r31,offset)?
133
134 (addu r30,r31,n)? # frame pointer update
135
136 (pic sequence)? # PIC code prologue
137
138 (or rn,rm,0)? # Move parameters to other regs
139 */
140
141 /* Macros for extracting fields from instructions. */
142
143 #define BITMASK(pos, width) (((0x1 << (width)) - 1) << (pos))
144 #define EXTRACT_FIELD(val, pos, width) ((val) >> (pos) & BITMASK (0, width))
145
146 /* Prologue code that handles position-independent-code setup. */
147
148 struct pic_prologue_code {
149 unsigned long insn, mask;
150 };
151
152 static struct pic_prologue_code pic_prologue_code [] = {
153 /* FIXME -- until this is translated to hex, we won't match it... */
154 0xffffffff, 0,
155 /* or r10,r1,0 (if not saved) */
156 /* bsr.n LabN */
157 /* or.u r25,r0,const */
158 /*LabN: or r25,r25,const2 */
159 /* addu r25,r25,1 */
160 /* or r1,r10,0 (if not saved) */
161 };
162
163 /* Fetch the instruction at ADDR, returning 0 if ADDR is beyond LIM or
164 is not the address of a valid instruction, the address of the next
165 instruction beyond ADDR otherwise. *PWORD1 receives the first word
166 of the instruction. PWORD2 is ignored -- a remnant of the original
167 i960 version. */
168
169 #define NEXT_PROLOGUE_INSN(addr, lim, pword1, pword2) \
170 (((addr) < (lim)) ? next_insn (addr, pword1) : 0)
171
172 /* Read the m88k instruction at 'memaddr' and return the address of
173 the next instruction after that, or 0 if 'memaddr' is not the
174 address of a valid instruction. The instruction
175 is stored at 'pword1'. */
176
177 CORE_ADDR
178 next_insn (memaddr, pword1)
179 unsigned long *pword1;
180 CORE_ADDR memaddr;
181 {
182 unsigned long buf[1];
183
184 *pword1 = read_memory_integer (memaddr, BYTES_PER_88K_INSN);
185 return memaddr + BYTES_PER_88K_INSN;
186 }
187
188 /* Read a register from frames called by us (or from the hardware regs). */
189
190 int
191 read_next_frame_reg(fi, regno)
192 FRAME fi;
193 int regno;
194 {
195 for (; fi; fi = fi->next) {
196 if (regno == SP_REGNUM) return fi->frame;
197 else if (fi->fsr->regs[regno])
198 return read_memory_integer(fi->fsr->regs[regno], 4);
199 }
200 return read_register(regno);
201 }
202
203 /* Examine the prologue of a function. `ip' points to the first instruction.
204 `limit' is the limit of the prologue (e.g. the addr of the first
205 linenumber, or perhaps the program counter if we're stepping through).
206 `frame_sp' is the stack pointer value in use in this frame.
207 `fsr' is a pointer to a frame_saved_regs structure into which we put
208 info about the registers saved by this frame.
209 `fi' is a struct frame_info pointer; we fill in various fields in it
210 to reflect the offsets of the arg pointer and the locals pointer. */
211
212 static CORE_ADDR
213 examine_prologue (ip, limit, frame_sp, fsr, fi)
214 register CORE_ADDR ip;
215 register CORE_ADDR limit;
216 FRAME_ADDR frame_sp;
217 struct frame_saved_regs *fsr;
218 struct frame_info *fi;
219 {
220 register CORE_ADDR next_ip;
221 register int src;
222 register struct pic_prologue_code *pcode;
223 unsigned int insn1, insn2;
224 int size, offset;
225 char must_adjust[32]; /* If set, must adjust offsets in fsr */
226 int sp_offset = -1; /* -1 means not set (valid must be mult of 8) */
227 int fp_offset = -1; /* -1 means not set */
228 CORE_ADDR frame_fp;
229
230 bzero (must_adjust, sizeof (must_adjust));
231 next_ip = NEXT_PROLOGUE_INSN (ip, limit, &insn1, &insn2);
232
233 /* Accept move of incoming registers to other registers, using
234 "or rd,rs,0" or "or.u rd,rs,0" or "or rd,r0,rs" or "or rd,rs,r0".
235 We don't have to worry about walking into the first lines of code,
236 since the first line number will stop us (assuming we have symbols).
237 What we have actually seen is "or r10,r0,r12". */
238
239 #define OR_MOVE_INSN 0x58000000 /* or/or.u with immed of 0 */
240 #define OR_MOVE_MASK 0xF800FFFF
241 #define OR_REG_MOVE1_INSN 0xF4005800 /* or rd,r0,rs */
242 #define OR_REG_MOVE1_MASK 0xFC1FFFE0
243 #define OR_REG_MOVE2_INSN 0xF4005800 /* or rd,rs,r0 */
244 #define OR_REG_MOVE2_MASK 0xFC00FFFF
245 while (next_ip &&
246 ((insn1 & OR_MOVE_MASK) == OR_MOVE_INSN ||
247 (insn1 & OR_REG_MOVE1_MASK) == OR_REG_MOVE1_INSN ||
248 (insn1 & OR_REG_MOVE2_MASK) == OR_REG_MOVE2_INSN
249 )
250 )
251 {
252 /* We don't care what moves to where. The result of the moves
253 has already been reflected in what the compiler tells us is the
254 location of these parameters. */
255 ip = next_ip;
256 next_ip = NEXT_PROLOGUE_INSN (ip, limit, &insn1, &insn2);
257 }
258
259 /* Accept an optional "subu sp,sp,n" to set up the stack pointer. */
260
261 #define SUBU_SP_INSN 0x67ff0000
262 #define SUBU_SP_MASK 0xffff0007 /* Note offset must be mult. of 8 */
263 #define SUBU_OFFSET(x) ((unsigned)(x & 0xFFFF))
264 if (next_ip &&
265 ((insn1 & SUBU_SP_MASK) == SUBU_SP_INSN)) /* subu r31, r31, N */
266 {
267 sp_offset = -SUBU_OFFSET (insn1);
268 ip = next_ip;
269 next_ip = NEXT_PROLOGUE_INSN (ip, limit, &insn1, &insn2);
270 }
271
272 /* The function must start with a stack-pointer adjustment, or
273 we don't know WHAT'S going on... */
274 if (sp_offset == -1)
275 return ip;
276
277 /* Accept zero or more instances of "st rx,sp,n" or "st.d rx,sp,n".
278 This may cause us to mistake the copying of a register
279 parameter to the frame for the saving of a callee-saved
280 register, but that can't be helped, since with the
281 "-fcall-saved" flag, any register can be made callee-saved.
282 This probably doesn't matter, since the ``saved'' caller's values of
283 non-callee-saved registers are not relevant anyway. */
284
285 #define STD_STACK_INSN 0x201f0000
286 #define STD_STACK_MASK 0xfc1f0000
287 #define ST_STACK_INSN 0x241f0000
288 #define ST_STACK_MASK 0xfc1f0000
289 #define ST_OFFSET(x) ((unsigned)((x) & 0xFFFF))
290 #define ST_SRC(x) EXTRACT_FIELD ((x), 21, 5)
291
292 while (next_ip)
293 {
294 if ((insn1 & ST_STACK_MASK) == ST_STACK_INSN)
295 size = 1;
296 else if ((insn1 & STD_STACK_MASK) == STD_STACK_INSN)
297 size = 2;
298 else
299 break;
300
301 src = ST_SRC (insn1);
302 offset = ST_OFFSET (insn1);
303 while (size--)
304 {
305 must_adjust[src] = 1;
306 fsr->regs[src++] = offset; /* Will be adjusted later */
307 offset += 4;
308 }
309 ip = next_ip;
310 next_ip = NEXT_PROLOGUE_INSN (ip, limit, &insn1, &insn2);
311 }
312
313 /* Accept an optional "addu r30,r31,n" to set up the frame pointer. */
314
315 #define ADDU_FP_INSN 0x63df0000
316 #define ADDU_FP_MASK 0xffff0000
317 #define ADDU_OFFSET(x) ((unsigned)(x & 0xFFFF))
318 if (next_ip &&
319 ((insn1 & ADDU_FP_MASK) == ADDU_FP_INSN)) /* addu r30, r31, N */
320 {
321 fp_offset = ADDU_OFFSET (insn1);
322 ip = next_ip;
323 next_ip = NEXT_PROLOGUE_INSN (ip, limit, &insn1, &insn2);
324 }
325
326 /* Accept the PIC prologue code if present. */
327
328 pcode = pic_prologue_code;
329 size = sizeof (pic_prologue_code) / sizeof (*pic_prologue_code);
330 /* If return addr is saved, we don't use first or last insn of PICstuff. */
331 if (fsr->regs[SRP_REGNUM]) {
332 pcode++;
333 size-=2;
334 }
335
336 while (size-- && next_ip && (pcode->insn == (pcode->mask & insn1)))
337 {
338 pcode++;
339 ip = next_ip;
340 next_ip = NEXT_PROLOGUE_INSN (ip, limit, &insn1, &insn2);
341 }
342
343 /* Accept moves of parameter registers to other registers, using
344 "or rd,rs,0" or "or.u rd,rs,0" or "or rd,r0,rs" or "or rd,rs,r0".
345 We don't have to worry about walking into the first lines of code,
346 since the first line number will stop us (assuming we have symbols).
347 What gcc actually seems to produce is "or rd,r0,rs". */
348
349 #define OR_MOVE_INSN 0x58000000 /* or/or.u with immed of 0 */
350 #define OR_MOVE_MASK 0xF800FFFF
351 #define OR_REG_MOVE1_INSN 0xF4005800 /* or rd,r0,rs */
352 #define OR_REG_MOVE1_MASK 0xFC1FFFE0
353 #define OR_REG_MOVE2_INSN 0xF4005800 /* or rd,rs,r0 */
354 #define OR_REG_MOVE2_MASK 0xFC00FFFF
355 while (next_ip &&
356 ((insn1 & OR_MOVE_MASK) == OR_MOVE_INSN ||
357 (insn1 & OR_REG_MOVE1_MASK) == OR_REG_MOVE1_INSN ||
358 (insn1 & OR_REG_MOVE2_MASK) == OR_REG_MOVE2_INSN
359 )
360 )
361 {
362 /* We don't care what moves to where. The result of the moves
363 has already been reflected in what the compiler tells us is the
364 location of these parameters. */
365 ip = next_ip;
366 next_ip = NEXT_PROLOGUE_INSN (ip, limit, &insn1, &insn2);
367 }
368
369 /* We're done with the prologue. If we don't care about the stack
370 frame itself, just return. (Note that fsr->regs has been trashed,
371 but the one caller who calls with fi==0 passes a dummy there.) */
372
373 if (fi == 0)
374 return ip;
375
376 /* OK, now we have:
377 sp_offset original negative displacement of SP
378 fp_offset positive displacement between new SP and new FP, or -1
379 fsr->regs[0..31] offset from original SP where reg is stored
380 must_adjust[0..31] set if corresp. offset was set
381
382 The current SP (frame_sp) might not be the original new SP as set
383 by the function prologue, if alloca has been called. This can
384 only occur if fp_offset is set, though (the compiler allocates an
385 FP when it sees alloca). In that case, we have the FP,
386 and can calculate the original new SP from the FP.
387
388 Then, we figure out where the arguments and locals are, and
389 relocate the offsets in fsr->regs to absolute addresses. */
390
391 if (fp_offset != -1) {
392 /* We have a frame pointer, so get it, and base our calc's on it. */
393 frame_fp = (CORE_ADDR) read_next_frame_reg (fi->next, FP_REGNUM);
394 frame_sp = frame_fp - fp_offset;
395 } else {
396 /* We have no frame pointer, therefore frame_sp is still the same value
397 as set by prologue. But where is the frame itself? */
398 if (must_adjust[SRP_REGNUM]) {
399 /* Function header saved SRP (r1), the return address. Frame starts
400 4 bytes down from where it was saved. */
401 frame_fp = frame_sp + fsr->regs[SRP_REGNUM] - 4;
402 fi->locals_pointer = frame_fp;
403 } else {
404 /* Function header didn't save SRP (r1), so we are in a leaf fn or
405 are otherwise confused. */
406 frame_fp = -1;
407 }
408 }
409
410 /* The locals are relative to the FP (whether it exists as an allocated
411 register, or just as an assumed offset from the SP) */
412 fi->locals_pointer = frame_fp;
413
414 /* The arguments are just above the SP as it was before we adjusted it
415 on entry. */
416 fi->args_pointer = frame_sp - sp_offset;
417
418 /* Now that we know the SP value used by the prologue, we know where
419 it saved all the registers. */
420 for (src = 0; src < 32; src++)
421 if (must_adjust[src])
422 fsr->regs[src] += frame_sp;
423
424 /* The saved value of the SP is always known. */
425 /* (we hope...) */
426 if (fsr->regs[SP_REGNUM] != 0
427 && fsr->regs[SP_REGNUM] != frame_sp - sp_offset)
428 fprintf(stderr, "Bad saved SP value %x != %x, offset %x!\n",
429 fsr->regs[SP_REGNUM],
430 frame_sp - sp_offset, sp_offset);
431
432 fsr->regs[SP_REGNUM] = frame_sp - sp_offset;
433
434 return (ip);
435 }
436
437 /* Given an ip value corresponding to the start of a function,
438 return the ip of the first instruction after the function
439 prologue. */
440
441 CORE_ADDR
442 skip_prologue (ip)
443 CORE_ADDR (ip);
444 {
445 struct frame_saved_regs saved_regs_dummy;
446 struct symtab_and_line sal;
447 CORE_ADDR limit;
448
449 sal = find_pc_line (ip, 0);
450 limit = (sal.end) ? sal.end : 0xffffffff;
451
452 return (examine_prologue (ip, limit, (FRAME_ADDR) 0, &saved_regs_dummy,
453 (struct frame_info *)0 ));
454 }
455
456 /* Put here the code to store, into a struct frame_saved_regs,
457 the addresses of the saved registers of frame described by FRAME_INFO.
458 This includes special registers such as pc and fp saved in special
459 ways in the stack frame. sp is even more special:
460 the address we return for it IS the sp for the next frame.
461
462 We cache the result of doing this in the frame_cache_obstack, since
463 it is fairly expensive. */
464
465 void
466 frame_find_saved_regs (fi, fsr)
467 struct frame_info *fi;
468 struct frame_saved_regs *fsr;
469 {
470 register CORE_ADDR next_addr;
471 register CORE_ADDR *saved_regs;
472 register int regnum;
473 register struct frame_saved_regs *cache_fsr;
474 extern struct obstack frame_cache_obstack;
475 CORE_ADDR ip;
476 struct symtab_and_line sal;
477 CORE_ADDR limit;
478
479 if (!fi->fsr)
480 {
481 cache_fsr = (struct frame_saved_regs *)
482 obstack_alloc (&frame_cache_obstack,
483 sizeof (struct frame_saved_regs));
484 bzero (cache_fsr, sizeof (struct frame_saved_regs));
485 fi->fsr = cache_fsr;
486
487 /* Find the start and end of the function prologue. If the PC
488 is in the function prologue, we only consider the part that
489 has executed already. */
490
491 ip = get_pc_function_start (fi->pc);
492 sal = find_pc_line (ip, 0);
493 limit = (sal.end && sal.end < fi->pc) ? sal.end: fi->pc;
494
495 /* This will fill in fields in *fi as well as in cache_fsr. */
496 examine_prologue (ip, limit, fi->frame, cache_fsr, fi);
497 }
498
499 if (fsr)
500 *fsr = *fi->fsr;
501 }
502
503 /* Return the address of the locals block for the frame
504 described by FI. Returns 0 if the address is unknown.
505 NOTE! Frame locals are referred to by negative offsets from the
506 argument pointer, so this is the same as frame_args_address(). */
507
508 CORE_ADDR
509 frame_locals_address (fi)
510 struct frame_info *fi;
511 {
512 register FRAME frame;
513 struct frame_saved_regs fsr;
514 CORE_ADDR ap;
515
516 if (fi->args_pointer) /* Cached value is likely there. */
517 return fi->args_pointer;
518
519 /* Nope, generate it. */
520
521 get_frame_saved_regs (fi, &fsr);
522
523 return fi->args_pointer;
524 }
525
526 /* Return the address of the argument block for the frame
527 described by FI. Returns 0 if the address is unknown. */
528
529 CORE_ADDR
530 frame_args_address (fi)
531 struct frame_info *fi;
532 {
533 register FRAME frame;
534 struct frame_saved_regs fsr;
535 CORE_ADDR ap;
536
537 if (fi->args_pointer) /* Cached value is likely there. */
538 return fi->args_pointer;
539
540 /* Nope, generate it. */
541
542 get_frame_saved_regs (fi, &fsr);
543
544 return fi->args_pointer;
545 }
546
547 /* Return the saved PC from this frame.
548
549 If the frame has a memory copy of SRP_REGNUM, use that. If not,
550 just use the register SRP_REGNUM itself. */
551
552 CORE_ADDR
553 frame_saved_pc (frame)
554 FRAME frame;
555 {
556 return read_next_frame_reg(frame, SRP_REGNUM);
557 }
558
559
560 static int
561 pushed_size (prev_words, v)
562 int prev_words;
563 struct value *v;
564 {
565 switch (TYPE_CODE (VALUE_TYPE (v)))
566 {
567 case TYPE_CODE_VOID: /* Void type (values zero length) */
568
569 return 0; /* That was easy! */
570
571 case TYPE_CODE_PTR: /* Pointer type */
572 case TYPE_CODE_ENUM: /* Enumeration type */
573 case TYPE_CODE_INT: /* Integer type */
574 case TYPE_CODE_REF: /* C++ Reference types */
575 case TYPE_CODE_ARRAY: /* Array type, lower & upper bounds */
576
577 return 1;
578
579 case TYPE_CODE_FLT: /* Floating type */
580
581 if (TYPE_LENGTH (VALUE_TYPE (v)) == 4)
582 return 1;
583 else
584 /* Assume that it must be a double. */
585 if (prev_words & 1) /* at an odd-word boundary */
586 return 3; /* round to 8-byte boundary */
587 else
588 return 2;
589
590 case TYPE_CODE_STRUCT: /* C struct or Pascal record */
591 case TYPE_CODE_UNION: /* C union or Pascal variant part */
592
593 return (((TYPE_LENGTH (VALUE_TYPE (v)) + 3) / 4) * 4);
594
595 case TYPE_CODE_FUNC: /* Function type */
596 case TYPE_CODE_SET: /* Pascal sets */
597 case TYPE_CODE_RANGE: /* Range (integers within bounds) */
598 case TYPE_CODE_STRING: /* String type */
599 case TYPE_CODE_MEMBER: /* Member type */
600 case TYPE_CODE_METHOD: /* Method type */
601 /* Don't know how to pass these yet. */
602
603 case TYPE_CODE_UNDEF: /* Not used; catches errors */
604 default:
605 abort ();
606 }
607 }
608
609 static void
610 store_parm_word (address, val)
611 CORE_ADDR address;
612 int val;
613 {
614 write_memory (address, (char *)&val, 4);
615 }
616
617 static int
618 store_parm (prev_words, left_parm_addr, v)
619 unsigned int prev_words;
620 CORE_ADDR left_parm_addr;
621 struct value *v;
622 {
623 CORE_ADDR start = left_parm_addr + (prev_words * 4);
624 int *val_addr = (int *)VALUE_CONTENTS(v);
625
626 switch (TYPE_CODE (VALUE_TYPE (v)))
627 {
628 case TYPE_CODE_VOID: /* Void type (values zero length) */
629
630 return 0;
631
632 case TYPE_CODE_PTR: /* Pointer type */
633 case TYPE_CODE_ENUM: /* Enumeration type */
634 case TYPE_CODE_INT: /* Integer type */
635 case TYPE_CODE_ARRAY: /* Array type, lower & upper bounds */
636 case TYPE_CODE_REF: /* C++ Reference types */
637
638 store_parm_word (start, *val_addr);
639 return 1;
640
641 case TYPE_CODE_FLT: /* Floating type */
642
643 if (TYPE_LENGTH (VALUE_TYPE (v)) == 4)
644 {
645 store_parm_word (start, *val_addr);
646 return 1;
647 }
648 else
649 {
650 store_parm_word (start + ((prev_words & 1) * 4), val_addr[0]);
651 store_parm_word (start + ((prev_words & 1) * 4) + 4, val_addr[1]);
652 return 2 + (prev_words & 1);
653 }
654
655 case TYPE_CODE_STRUCT: /* C struct or Pascal record */
656 case TYPE_CODE_UNION: /* C union or Pascal variant part */
657
658 {
659 unsigned int words = (((TYPE_LENGTH (VALUE_TYPE (v)) + 3) / 4) * 4);
660 unsigned int word;
661
662 for (word = 0; word < words; word++)
663 store_parm_word (start + (word * 4), val_addr[word]);
664 return words;
665 }
666
667 default:
668 abort ();
669 }
670 }
671
672 /* This routine sets up all of the parameter values needed to make a pseudo
673 call. The name "push_parameters" is a misnomer on some archs,
674 because (on the m88k) most parameters generally end up being passed in
675 registers rather than on the stack. In this routine however, we do
676 end up storing *all* parameter values onto the stack (even if we will
677 realize later that some of these stores were unnecessary). */
678
679 #define FIRST_PARM_REGNUM 2
680
681 void
682 push_parameters (return_type, struct_conv, nargs, args)
683 struct type *return_type;
684 int struct_conv;
685 int nargs;
686 value *args;
687 {
688 int parm_num;
689 unsigned int p_words = 0;
690 CORE_ADDR left_parm_addr;
691
692 /* Start out by creating a space for the return value (if need be). We
693 only need to do this if the return value is a struct or union. If we
694 do make a space for a struct or union return value, then we must also
695 arrange for the base address of that space to go into r12, which is the
696 standard place to pass the address of the return value area to the
697 callee. Note that only structs and unions are returned in this fashion.
698 Ints, enums, pointers, and floats are returned into r2. Doubles are
699 returned into the register pair {r2,r3}. Note also that the space
700 reserved for a struct or union return value only has to be word aligned
701 (not double-word) but it is double-word aligned here anyway (just in
702 case that becomes important someday). */
703
704 switch (TYPE_CODE (return_type))
705 {
706 case TYPE_CODE_STRUCT:
707 case TYPE_CODE_UNION:
708 {
709 int return_bytes = ((TYPE_LENGTH (return_type) + 7) / 8) * 8;
710 CORE_ADDR rv_addr;
711
712 rv_addr = read_register (SP_REGNUM) - return_bytes;
713
714 write_register (SP_REGNUM, rv_addr); /* push space onto the stack */
715 write_register (SRA_REGNUM, rv_addr);/* set return value register */
716 }
717 }
718
719 /* Here we make a pre-pass on the whole parameter list to figure out exactly
720 how many words worth of stuff we are going to pass. */
721
722 for (p_words = 0, parm_num = 0; parm_num < nargs; parm_num++)
723 p_words += pushed_size (p_words, value_arg_coerce (args[parm_num]));
724
725 /* Now, check to see if we have to round up the number of parameter words
726 to get up to the next 8-bytes boundary. This may be necessary because
727 of the software convention to always keep the stack aligned on an 8-byte
728 boundary. */
729
730 if (p_words & 1)
731 p_words++; /* round to 8-byte boundary */
732
733 /* Now figure out the absolute address of the leftmost parameter, and update
734 the stack pointer to point at that address. */
735
736 left_parm_addr = read_register (SP_REGNUM) - (p_words * 4);
737 write_register (SP_REGNUM, left_parm_addr);
738
739 /* Now we can go through all of the parameters (in left-to-right order)
740 and write them to their parameter stack slots. Note that we are not
741 really "pushing" the parameter values. The stack space for these values
742 was already allocated above. Now we are just filling it up. */
743
744 for (p_words = 0, parm_num = 0; parm_num < nargs; parm_num++)
745 p_words +=
746 store_parm (p_words, left_parm_addr, value_arg_coerce (args[parm_num]));
747
748 /* Now that we are all done storing the parameter values into the stack, we
749 must go back and load up the parameter registers with the values from the
750 corresponding stack slots. Note that in the two cases of (a) gaps in the
751 parameter word sequence causes by (otherwise) misaligned doubles, and (b)
752 slots correcponding to structs or unions, the work we do here in loading
753 some parameter registers may be unnecessary, but who cares? */
754
755 for (p_words = 0; p_words < 8; p_words++)
756 {
757 write_register (FIRST_PARM_REGNUM + p_words,
758 read_memory_integer (left_parm_addr + (p_words * 4), 4));
759 }
760 }
761
762 void
763 pop_frame ()
764 {
765 error ("Feature not implemented for the m88k yet.");
766 return;
767 }
768
769 void
770 collect_returned_value (rval, value_type, struct_return, nargs, args)
771 value *rval;
772 struct type *value_type;
773 int struct_return;
774 int nargs;
775 value *args;
776 {
777 char retbuf[REGISTER_BYTES];
778
779 bcopy (registers, retbuf, REGISTER_BYTES);
780 *rval = value_being_returned (value_type, retbuf, struct_return);
781 return;
782 }
783
784 #if 0
785 /* Now handled in a machine independent way with CALL_DUMMY_LOCATION. */
786 /* Stuff a breakpoint instruction onto the stack (or elsewhere if the stack
787 is not a good place for it). Return the address at which the instruction
788 got stuffed, or zero if we were unable to stuff it anywhere. */
789
790 CORE_ADDR
791 push_breakpoint ()
792 {
793 static char breakpoint_insn[] = BREAKPOINT;
794 extern CORE_ADDR text_end; /* of inferior */
795 static char readback_buffer[] = BREAKPOINT;
796 int i;
797
798 /* With a little bit of luck, we can just stash the breakpoint instruction
799 in the word just beyond the end of normal text space. For systems on
800 which the hardware will not allow us to execute out of the stack segment,
801 we have to hope that we *are* at least allowed to effectively extend the
802 text segment by one word. If the actual end of user's the text segment
803 happens to fall right at a page boundary this trick may fail. Note that
804 we check for this by reading after writing, and comparing in order to
805 be sure that the write worked. */
806
807 write_memory (text_end, &breakpoint_insn, 4);
808
809 /* Fill the readback buffer with some garbage which is certain to be
810 unequal to the breakpoint insn. That way we can tell if the
811 following read doesn't actually succeed. */
812
813 for (i = 0; i < sizeof (readback_buffer); i++)
814 readback_buffer[i] = ~ readback_buffer[i]; /* Invert the bits */
815
816 /* Now check that the breakpoint insn was successfully installed. */
817
818 read_memory (text_end, readback_buffer, sizeof (readback_buffer));
819 for (i = 0; i < sizeof (readback_buffer); i++)
820 if (readback_buffer[i] != breakpoint_insn[i])
821 return 0; /* Failed to install! */
822
823 return text_end;
824 }
825 #endif