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1 /* Target-dependent header for the MIPS architecture, for GDB, the GNU Debugger.
2
3 Copyright (C) 2002, 2003, 2007 Free Software Foundation, Inc.
4
5 This file is part of GDB.
6
7 This program is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 2 of the License, or
10 (at your option) any later version.
11
12 This program is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
16
17 You should have received a copy of the GNU General Public License
18 along with this program; if not, write to the Free Software
19 Foundation, Inc., 51 Franklin Street, Fifth Floor,
20 Boston, MA 02110-1301, USA. */
21
22 #ifndef MIPS_TDEP_H
23 #define MIPS_TDEP_H
24
25 struct gdbarch;
26
27 /* All the possible MIPS ABIs. */
28 enum mips_abi
29 {
30 MIPS_ABI_UNKNOWN = 0,
31 MIPS_ABI_N32,
32 MIPS_ABI_O32,
33 MIPS_ABI_N64,
34 MIPS_ABI_O64,
35 MIPS_ABI_EABI32,
36 MIPS_ABI_EABI64,
37 MIPS_ABI_LAST
38 };
39
40 /* Return the MIPS ABI associated with GDBARCH. */
41 enum mips_abi mips_abi (struct gdbarch *gdbarch);
42
43 /* For wince :-(. */
44 extern CORE_ADDR mips_next_pc (CORE_ADDR pc);
45
46 /* Return the MIPS ISA's register size. Just a short cut to the BFD
47 architecture's word size. */
48 extern int mips_isa_regsize (struct gdbarch *gdbarch);
49
50 /* Return the current index for various MIPS registers. */
51 struct mips_regnum
52 {
53 int pc;
54 int fp0;
55 int fp_implementation_revision;
56 int fp_control_status;
57 int badvaddr; /* Bad vaddr for addressing exception. */
58 int cause; /* Describes last exception. */
59 int hi; /* Multiply/divide temp. */
60 int lo; /* ... */
61 };
62 extern const struct mips_regnum *mips_regnum (struct gdbarch *gdbarch);
63
64 /* Register numbers of various important registers. Note that some of
65 these values are "real" register numbers, and correspond to the
66 general registers of the machine, and some are "phony" register
67 numbers which are too large to be actual register numbers as far as
68 the user is concerned but do serve to get the desired values when
69 passed to read_register. */
70
71 enum
72 {
73 MIPS_ZERO_REGNUM = 0, /* Read-only register, always 0. */
74 MIPS_AT_REGNUM = 1,
75 MIPS_V0_REGNUM = 2, /* Function integer return value. */
76 MIPS_A0_REGNUM = 4, /* Loc of first arg during a subr call */
77 MIPS_T9_REGNUM = 25, /* Contains address of callee in PIC. */
78 MIPS_SP_REGNUM = 29,
79 MIPS_RA_REGNUM = 31,
80 MIPS_PS_REGNUM = 32, /* Contains processor status. */
81 MIPS_EMBED_LO_REGNUM = 33,
82 MIPS_EMBED_HI_REGNUM = 34,
83 MIPS_EMBED_BADVADDR_REGNUM = 35,
84 MIPS_EMBED_CAUSE_REGNUM = 36,
85 MIPS_EMBED_PC_REGNUM = 37,
86 MIPS_EMBED_FP0_REGNUM = 38,
87 MIPS_UNUSED_REGNUM = 73, /* Never used, FIXME */
88 MIPS_FIRST_EMBED_REGNUM = 74, /* First CP0 register for embedded use. */
89 MIPS_PRID_REGNUM = 89, /* Processor ID. */
90 MIPS_LAST_EMBED_REGNUM = 89 /* Last one. */
91 };
92
93 /* Defined in mips-tdep.c and used in remote-mips.c */
94 extern void deprecated_mips_set_processor_regs_hack (void);
95
96 /* Instruction sizes and other useful constants. */
97 enum
98 {
99 MIPS_INSN16_SIZE = 2,
100 MIPS_INSN32_SIZE = 4,
101 /* The number of floating-point or integer registers. */
102 MIPS_NUMREGS = 32
103 };
104
105 /* Single step based on where the current instruction will take us. */
106 extern void mips_software_single_step (enum target_signal, int);
107
108 /* Tell if the program counter value in MEMADDR is in a MIPS16
109 function. */
110 extern int mips_pc_is_mips16 (bfd_vma memaddr);
111
112 /* Return the currently configured (or set) saved register size. */
113 extern unsigned int mips_abi_regsize (struct gdbarch *gdbarch);
114
115 #endif /* MIPS_TDEP_H */