gdb/mipsnbsd-tdep.c

   1 /* Target-dependent code for NetBSD/mips.
   2
   3    Copyright (C) 2002, 2003, 2004, 2006 Free Software Foundation, Inc.
   4
   5    Contributed by Wasabi Systems, Inc.
   6
   7    This file is part of GDB.
   8
   9    This program is free software; you can redistribute it and/or modify
  10    it under the terms of the GNU General Public License as published by
  11    the Free Software Foundation; either version 2 of the License, or
  12    (at your option) any later version.
  13
  14    This program is distributed in the hope that it will be useful,
  15    but WITHOUT ANY WARRANTY; without even the implied warranty of
  16    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  17    GNU General Public License for more details.
  18
  19    You should have received a copy of the GNU General Public License
  20    along with this program; if not, write to the Free Software
  21    Foundation, Inc., 51 Franklin Street, Fifth Floor,
  22    Boston, MA 02110-1301, USA.  */
  23
  24 #include "defs.h"
  25 #include "gdbcore.h"
  26 #include "regcache.h"
  27 #include "regset.h"
  28 #include "target.h"
  29 #include "value.h"
  30 #include "osabi.h"
  31
  32 #include "gdb_assert.h"
  33 #include "gdb_string.h"
  34
  35 #include "nbsd-tdep.h"
  36 #include "mipsnbsd-tdep.h"
  37 #include "mips-tdep.h"
  38
  39 #include "solib-svr4.h"
  40
  41 /* Shorthand for some register numbers used below.  */
  42 #define MIPS_PC_REGNUM  MIPS_EMBED_PC_REGNUM
  43 #define MIPS_FP0_REGNUM MIPS_EMBED_FP0_REGNUM
  44 #define MIPS_FSR_REGNUM MIPS_EMBED_FP0_REGNUM + 32
  45
  46 /* Core file support.  */
  47
  48 /* Number of registers in `struct reg' from <machine/reg.h>.  */
  49 #define MIPSNBSD_NUM_GREGS      38
  50
  51 /* Number of registers in `struct fpreg' from <machine/reg.h>.  */
  52 #define MIPSNBSD_NUM_FPREGS     33
  53
  54 /* Supply register REGNUM from the buffer specified by FPREGS and LEN
  55    in the floating-point register set REGSET to register cache
  56    REGCACHE.  If REGNUM is -1, do this for all registers in REGSET.  */
  57
  58 static void
  59 mipsnbsd_supply_fpregset (const struct regset *regset,
  60                           struct regcache *regcache,
  61                           int regnum, const void *fpregs, size_t len)
  62 {
  63   size_t regsize = mips_isa_regsize (get_regcache_arch (regcache));
  64   const char *regs = fpregs;
  65   int i;
  66
  67   gdb_assert (len >= MIPSNBSD_NUM_FPREGS * regsize);
  68
  69   for (i = MIPS_FP0_REGNUM; i <= MIPS_FSR_REGNUM; i++)
  70     {
  71       if (regnum == i || regnum == -1)
  72         regcache_raw_supply (regcache, i,
  73                              regs + (i - MIPS_FP0_REGNUM) * regsize);
  74     }
  75 }
  76
  77 /* Supply register REGNUM from the buffer specified by GREGS and LEN
  78    in the general-purpose register set REGSET to register cache
  79    REGCACHE.  If REGNUM is -1, do this for all registers in REGSET.  */
  80
  81 static void
  82 mipsnbsd_supply_gregset (const struct regset *regset,
  83                          struct regcache *regcache, int regnum,
  84                          const void *gregs, size_t len)
  85 {
  86   size_t regsize = mips_isa_regsize (get_regcache_arch (regcache));
  87   const char *regs = gregs;
  88   int i;
  89
  90   gdb_assert (len >= MIPSNBSD_NUM_GREGS * regsize);
  91
  92   for (i = 0; i <= MIPS_PC_REGNUM; i++)
  93     {
  94       if (regnum == i || regnum == -1)
  95         regcache_raw_supply (regcache, i, regs + i * regsize);
  96     }
  97
  98   if (len >= (MIPSNBSD_NUM_GREGS + MIPSNBSD_NUM_FPREGS) * regsize)
  99     {
 100       regs += MIPSNBSD_NUM_GREGS * regsize;
 101       len -= MIPSNBSD_NUM_GREGS * regsize;
 102       mipsnbsd_supply_fpregset (regset, regcache, regnum, regs, len);
 103     }
 104 }
 105
 106 /* NetBSD/mips register sets.  */
 107
 108 static struct regset mipsnbsd_gregset =
 109 {
 110   NULL,
 111   mipsnbsd_supply_gregset
 112 };
 113
 114 static struct regset mipsnbsd_fpregset =
 115 {
 116   NULL,
 117   mipsnbsd_supply_fpregset
 118 };
 119
 120 /* Return the appropriate register set for the core section identified
 121    by SECT_NAME and SECT_SIZE.  */
 122
 123 static const struct regset *
 124 mipsnbsd_regset_from_core_section (struct gdbarch *gdbarch,
 125                                    const char *sect_name, size_t sect_size)
 126 {
 127   size_t regsize = mips_isa_regsize (gdbarch);
 128
 129   if (strcmp (sect_name, ".reg") == 0
 130       && sect_size >= MIPSNBSD_NUM_GREGS * regsize)
 131     return &mipsnbsd_gregset;
 132
 133   if (strcmp (sect_name, ".reg2") == 0
 134       && sect_size >= MIPSNBSD_NUM_FPREGS * regsize)
 135     return &mipsnbsd_fpregset;
 136
 137   return NULL;
 138 }
 139 \f
 140
 141 /* Conveniently, GDB uses the same register numbering as the
 142    ptrace register structure used by NetBSD/mips.  */
 143
 144 void
 145 mipsnbsd_supply_reg (char *regs, int regno)
 146 {
 147   int i;
 148
 149   for (i = 0; i <= PC_REGNUM; i++)
 150     {
 151       if (regno == i || regno == -1)
 152         {
 153           if (CANNOT_FETCH_REGISTER (i))
 154             regcache_raw_supply (current_regcache, i, NULL);
 155           else
 156             regcache_raw_supply (current_regcache, i,
 157                                  regs + (i * mips_isa_regsize (current_gdbarch)));
 158         }
 159     }
 160 }
 161
 162 void
 163 mipsnbsd_fill_reg (char *regs, int regno)
 164 {
 165   int i;
 166
 167   for (i = 0; i <= PC_REGNUM; i++)
 168     if ((regno == i || regno == -1) && ! CANNOT_STORE_REGISTER (i))
 169       regcache_raw_collect (current_regcache, i,
 170                             regs + (i * mips_isa_regsize (current_gdbarch)));
 171 }
 172
 173 void
 174 mipsnbsd_supply_fpreg (char *fpregs, int regno)
 175 {
 176   int i;
 177
 178   for (i = FP0_REGNUM;
 179        i <= mips_regnum (current_gdbarch)->fp_implementation_revision;
 180        i++)
 181     {
 182       if (regno == i || regno == -1)
 183         {
 184           if (CANNOT_FETCH_REGISTER (i))
 185             regcache_raw_supply (current_regcache, i, NULL);
 186           else
 187             regcache_raw_supply (current_regcache, i,
 188                                  fpregs + ((i - FP0_REGNUM) * mips_isa_regsize (current_gdbarch)));
 189         }
 190     }
 191 }
 192
 193 void
 194 mipsnbsd_fill_fpreg (char *fpregs, int regno)
 195 {
 196   int i;
 197
 198   for (i = FP0_REGNUM; i <= mips_regnum (current_gdbarch)->fp_control_status;
 199        i++)
 200     if ((regno == i || regno == -1) && ! CANNOT_STORE_REGISTER (i))
 201       regcache_raw_collect (current_regcache, i,
 202                             fpregs + ((i - FP0_REGNUM) * mips_isa_regsize (current_gdbarch)));
 203 }
 204
 205 /* Under NetBSD/mips, signal handler invocations can be identified by the
 206    designated code sequence that is used to return from a signal handler.
 207    In particular, the return address of a signal handler points to the
 208    following code sequence:
 209
 210         addu    a0, sp, 16
 211         li      v0, 295                 # __sigreturn14
 212         syscall
 213
 214    Each instruction has a unique encoding, so we simply attempt to match
 215    the instruction the PC is pointing to with any of the above instructions.
 216    If there is a hit, we know the offset to the start of the designated
 217    sequence and can then check whether we really are executing in the
 218    signal trampoline.  If not, -1 is returned, otherwise the offset from the
 219    start of the return sequence is returned.  */
 220
 221 #define RETCODE_NWORDS  3
 222 #define RETCODE_SIZE    (RETCODE_NWORDS * 4)
 223
 224 static const unsigned char sigtramp_retcode_mipsel[RETCODE_SIZE] =
 225 {
 226   0x10, 0x00, 0xa4, 0x27,       /* addu a0, sp, 16 */
 227   0x27, 0x01, 0x02, 0x24,       /* li v0, 295 */
 228   0x0c, 0x00, 0x00, 0x00,       /* syscall */
 229 };
 230
 231 static const unsigned char sigtramp_retcode_mipseb[RETCODE_SIZE] =
 232 {
 233   0x27, 0xa4, 0x00, 0x10,       /* addu a0, sp, 16 */
 234   0x24, 0x02, 0x01, 0x27,       /* li v0, 295 */
 235   0x00, 0x00, 0x00, 0x0c,       /* syscall */
 236 };
 237
 238 static LONGEST
 239 mipsnbsd_sigtramp_offset (struct frame_info *next_frame)
 240 {
 241   CORE_ADDR pc = frame_pc_unwind (next_frame);
 242   const char *retcode = TARGET_BYTE_ORDER == BFD_ENDIAN_BIG
 243         ? sigtramp_retcode_mipseb : sigtramp_retcode_mipsel;
 244   unsigned char ret[RETCODE_SIZE], w[4];
 245   LONGEST off;
 246   int i;
 247
 248   if (!safe_frame_unwind_memory (next_frame, pc, w, sizeof (w)))
 249     return -1;
 250
 251   for (i = 0; i < RETCODE_NWORDS; i++)
 252     {
 253       if (memcmp (w, retcode + (i * 4), 4) == 0)
 254         break;
 255     }
 256   if (i == RETCODE_NWORDS)
 257     return -1;
 258
 259   off = i * 4;
 260   pc -= off;
 261
 262   if (!safe_frame_unwind_memory (next_frame, pc, ret, sizeof (ret)))
 263     return -1;
 264
 265   if (memcmp (ret, retcode, RETCODE_SIZE) == 0)
 266     return off;
 267
 268   return -1;
 269 }
 270
 271 /* Figure out where the longjmp will land.  We expect that we have
 272    just entered longjmp and haven't yet setup the stack frame, so the
 273    args are still in the argument regs.  MIPS_A0_REGNUM points at the
 274    jmp_buf structure from which we extract the PC that we will land
 275    at.  The PC is copied into *pc.  This routine returns true on
 276    success.  */
 277
 278 #define NBSD_MIPS_JB_PC                 (2 * 4)
 279 #define NBSD_MIPS_JB_ELEMENT_SIZE       mips_isa_regsize (current_gdbarch)
 280 #define NBSD_MIPS_JB_OFFSET             (NBSD_MIPS_JB_PC * \
 281                                          NBSD_MIPS_JB_ELEMENT_SIZE)
 282
 283 static int
 284 mipsnbsd_get_longjmp_target (CORE_ADDR *pc)
 285 {
 286   CORE_ADDR jb_addr;
 287   char *buf;
 288
 289   buf = alloca (NBSD_MIPS_JB_ELEMENT_SIZE);
 290
 291   jb_addr = read_register (MIPS_A0_REGNUM);
 292
 293   if (target_read_memory (jb_addr + NBSD_MIPS_JB_OFFSET, buf,
 294                           NBSD_MIPS_JB_ELEMENT_SIZE))
 295     return 0;
 296
 297   *pc = extract_unsigned_integer (buf, NBSD_MIPS_JB_ELEMENT_SIZE);
 298
 299   return 1;
 300 }
 301
 302 static int
 303 mipsnbsd_cannot_fetch_register (int regno)
 304 {
 305   return (regno == MIPS_ZERO_REGNUM
 306           || regno == mips_regnum (current_gdbarch)->fp_implementation_revision);
 307 }
 308
 309 static int
 310 mipsnbsd_cannot_store_register (int regno)
 311 {
 312   return (regno == MIPS_ZERO_REGNUM
 313           || regno == mips_regnum (current_gdbarch)->fp_implementation_revision);
 314 }
 315
 316 /* Shared library support.  */
 317
 318 /* NetBSD/mips uses a slightly different `struct link_map' than the
 319    other NetBSD platforms.  */
 320
 321 static struct link_map_offsets *
 322 mipsnbsd_ilp32_fetch_link_map_offsets (void)
 323 {
 324   static struct link_map_offsets lmo;
 325   static struct link_map_offsets *lmp = NULL;
 326
 327   if (lmp == NULL)
 328     {
 329       lmp = &lmo;
 330
 331       lmo.r_version_offset = 0;
 332       lmo.r_version_size = 4;
 333       lmo.r_map_offset = 4;
 334       lmo.r_ldsomap_offset = -1;
 335
 336       /* Everything we need is in the first 24 bytes.  */
 337       lmo.link_map_size = 24;
 338       lmo.l_addr_offset = 4;
 339       lmo.l_addr_size = 4;
 340       lmo.l_name_offset = 8;
 341       lmo.l_name_size = 4;
 342       lmo.l_ld_offset = 12;
 343       lmo.l_ld_size = 4;
 344       lmo.l_next_offset = 16;
 345       lmo.l_next_size = 4;
 346       lmo.l_prev_offset = 20;
 347       lmo.l_prev_size = 4;
 348     }
 349
 350   return lmp;
 351 }
 352
 353 static struct link_map_offsets *
 354 mipsnbsd_lp64_fetch_link_map_offsets (void)
 355 {
 356   static struct link_map_offsets lmo;
 357   static struct link_map_offsets *lmp = NULL;
 358
 359   if (lmp == NULL)
 360     {
 361       lmp = &lmo;
 362
 363       lmo.r_version_offset = 0;
 364       lmo.r_version_size = 4;
 365       lmo.r_map_offset = 8;
 366       lmo.r_ldsomap_offset = -1;
 367
 368       /* Everything we need is in the first 40 bytes.  */
 369       lmo.link_map_size = 48;
 370       lmo.l_addr_offset = 0;
 371       lmo.l_addr_size = 8;
 372       lmo.l_name_offset = 16;
 373       lmo.l_name_size = 8;
 374       lmo.l_ld_offset = 24;
 375       lmo.l_ld_size = 8;
 376       lmo.l_next_offset = 32;
 377       lmo.l_next_size = 8;
 378       lmo.l_prev_offset = 40;
 379       lmo.l_prev_size = 8;
 380     }
 381
 382   return lmp;
 383 }
 384 \f
 385
 386 static void
 387 mipsnbsd_init_abi (struct gdbarch_info info,
 388                    struct gdbarch *gdbarch)
 389 {
 390   set_gdbarch_regset_from_core_section
 391     (gdbarch, mipsnbsd_regset_from_core_section);
 392
 393   set_gdbarch_get_longjmp_target (gdbarch, mipsnbsd_get_longjmp_target);
 394
 395   set_gdbarch_cannot_fetch_register (gdbarch, mipsnbsd_cannot_fetch_register);
 396   set_gdbarch_cannot_store_register (gdbarch, mipsnbsd_cannot_store_register);
 397
 398   set_gdbarch_software_single_step (gdbarch, mips_software_single_step);
 399
 400   /* NetBSD/mips has SVR4-style shared libraries.  */
 401   set_solib_svr4_fetch_link_map_offsets
 402     (gdbarch, (gdbarch_ptr_bit (gdbarch) == 32 ?
 403                mipsnbsd_ilp32_fetch_link_map_offsets :
 404                mipsnbsd_lp64_fetch_link_map_offsets));
 405 }
 406 \f
 407
 408 static enum gdb_osabi
 409 mipsnbsd_core_osabi_sniffer (bfd *abfd)
 410 {
 411   if (strcmp (bfd_get_target (abfd), "netbsd-core") == 0)
 412     return GDB_OSABI_NETBSD_ELF;
 413
 414   return GDB_OSABI_UNKNOWN;
 415 }
 416
 417 void
 418 _initialize_mipsnbsd_tdep (void)
 419 {
 420   gdbarch_register_osabi (bfd_arch_mips, 0, GDB_OSABI_NETBSD_ELF,
 421                           mipsnbsd_init_abi);
 422 }