gdb/nat/aarch64-linux-hw-point.c

   1 /* Copyright (C) 2009-2024 Free Software Foundation, Inc.
   2    Contributed by ARM Ltd.
   3
   4    This file is part of GDB.
   5
   6    This program is free software; you can redistribute it and/or modify
   7    it under the terms of the GNU General Public License as published by
   8    the Free Software Foundation; either version 3 of the License, or
   9    (at your option) any later version.
  10
  11    This program is distributed in the hope that it will be useful,
  12    but WITHOUT ANY WARRANTY; without even the implied warranty of
  13    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  14    GNU General Public License for more details.
  15
  16    You should have received a copy of the GNU General Public License
  17    along with this program.  If not, see <http://www.gnu.org/licenses/>.  */
  18
  19 #include "gdbsupport/break-common.h"
  20 #include "gdbsupport/common-regcache.h"
  21 #include "nat/linux-nat.h"
  22 #include "aarch64-linux-hw-point.h"
  23
  24 #include <sys/uio.h>
  25
  26 /* The order in which <sys/ptrace.h> and <asm/ptrace.h> are included
  27    can be important.  <sys/ptrace.h> often declares various PTRACE_*
  28    enums.  <asm/ptrace.h> often defines preprocessor constants for
  29    these very same symbols.  When that's the case, build errors will
  30    result when <asm/ptrace.h> is included before <sys/ptrace.h>.  */
  31 #include <sys/ptrace.h>
  32 #include <asm/ptrace.h>
  33
  34 #include <elf.h>
  35
  36 /* See aarch64-linux-hw-point.h  */
  37
  38 bool kernel_supports_any_contiguous_range = true;
  39
  40 /* Helper for aarch64_notify_debug_reg_change.  Records the
  41    information about the change of one hardware breakpoint/watchpoint
  42    setting for the thread LWP.
  43    N.B.  The actual updating of hardware debug registers is not
  44    carried out until the moment the thread is resumed.  */
  45
  46 static int
  47 debug_reg_change_callback (struct lwp_info *lwp, int is_watchpoint,
  48                            unsigned int idx)
  49 {
  50   int tid = ptid_of_lwp (lwp).lwp ();
  51   struct arch_lwp_info *info = lwp_arch_private_info (lwp);
  52   dr_changed_t *dr_changed_ptr;
  53   dr_changed_t dr_changed;
  54
  55   if (info == NULL)
  56     {
  57       info = XCNEW (struct arch_lwp_info);
  58       lwp_set_arch_private_info (lwp, info);
  59     }
  60
  61   if (show_debug_regs)
  62     {
  63       debug_printf ("debug_reg_change_callback: \n\tOn entry:\n");
  64       debug_printf ("\ttid%d, dr_changed_bp=0x%s, "
  65                     "dr_changed_wp=0x%s\n", tid,
  66                     phex (info->dr_changed_bp, 8),
  67                     phex (info->dr_changed_wp, 8));
  68     }
  69
  70   dr_changed_ptr = is_watchpoint ? &info->dr_changed_wp
  71     : &info->dr_changed_bp;
  72   dr_changed = *dr_changed_ptr;
  73
  74   gdb_assert (idx >= 0
  75               && (idx <= (is_watchpoint ? aarch64_num_wp_regs
  76                           : aarch64_num_bp_regs)));
  77
  78   /* The actual update is done later just before resuming the lwp,
  79      we just mark that one register pair needs updating.  */
  80   DR_MARK_N_CHANGED (dr_changed, idx);
  81   *dr_changed_ptr = dr_changed;
  82
  83   /* If the lwp isn't stopped, force it to momentarily pause, so
  84      we can update its debug registers.  */
  85   if (!lwp_is_stopped (lwp))
  86     linux_stop_lwp (lwp);
  87
  88   if (show_debug_regs)
  89     {
  90       debug_printf ("\tOn exit:\n\ttid%d, dr_changed_bp=0x%s, "
  91                     "dr_changed_wp=0x%s\n", tid,
  92                     phex (info->dr_changed_bp, 8),
  93                     phex (info->dr_changed_wp, 8));
  94     }
  95
  96   return 0;
  97 }
  98
  99 /* Notify each thread that their IDXth breakpoint/watchpoint register
 100    pair needs to be updated.  The message will be recorded in each
 101    thread's arch-specific data area, the actual updating will be done
 102    when the thread is resumed.  */
 103
 104 void
 105 aarch64_notify_debug_reg_change (ptid_t ptid,
 106                                  int is_watchpoint, unsigned int idx)
 107 {
 108   ptid_t pid_ptid = ptid_t (ptid.pid ());
 109
 110   iterate_over_lwps (pid_ptid, [=] (struct lwp_info *info)
 111                                {
 112                                  return debug_reg_change_callback (info,
 113                                                                    is_watchpoint,
 114                                                                    idx);
 115                                });
 116 }
 117
 118 /* Reconfigure STATE to be compatible with Linux kernels with the PR
 119    external/20207 bug.  This is called when
 120    KERNEL_SUPPORTS_ANY_CONTIGUOUS_RANGE transitions to false.  Note we
 121    don't try to support combining watchpoints with matching (and thus
 122    shared) masks, as it's too late when we get here.  On buggy
 123    kernels, GDB will try to first setup the perfect matching ranges,
 124    which will run out of registers before this function can merge
 125    them.  It doesn't look like worth the effort to improve that, given
 126    eventually buggy kernels will be phased out.  */
 127
 128 static void
 129 aarch64_downgrade_regs (struct aarch64_debug_reg_state *state)
 130 {
 131   for (int i = 0; i < aarch64_num_wp_regs; ++i)
 132     if ((state->dr_ctrl_wp[i] & 1) != 0)
 133       {
 134         gdb_assert (state->dr_ref_count_wp[i] != 0);
 135         uint8_t mask_orig = (state->dr_ctrl_wp[i] >> 5) & 0xff;
 136         gdb_assert (mask_orig != 0);
 137         static const uint8_t old_valid[] = { 0x01, 0x03, 0x0f, 0xff };
 138         uint8_t mask = 0;
 139         for (const uint8_t old_mask : old_valid)
 140           if (mask_orig <= old_mask)
 141             {
 142               mask = old_mask;
 143               break;
 144             }
 145         gdb_assert (mask != 0);
 146
 147         /* No update needed for this watchpoint?  */
 148         if (mask == mask_orig)
 149           continue;
 150         state->dr_ctrl_wp[i] |= mask << 5;
 151         state->dr_addr_wp[i]
 152           = align_down (state->dr_addr_wp[i], AARCH64_HWP_ALIGNMENT);
 153
 154         /* Try to match duplicate entries.  */
 155         for (int j = 0; j < i; ++j)
 156           if ((state->dr_ctrl_wp[j] & 1) != 0
 157               && state->dr_addr_wp[j] == state->dr_addr_wp[i]
 158               && state->dr_addr_orig_wp[j] == state->dr_addr_orig_wp[i]
 159               && state->dr_ctrl_wp[j] == state->dr_ctrl_wp[i])
 160             {
 161               state->dr_ref_count_wp[j] += state->dr_ref_count_wp[i];
 162               state->dr_ref_count_wp[i] = 0;
 163               state->dr_addr_wp[i] = 0;
 164               state->dr_addr_orig_wp[i] = 0;
 165               state->dr_ctrl_wp[i] &= ~1;
 166               break;
 167             }
 168
 169         aarch64_notify_debug_reg_change (current_lwp_ptid (),
 170                                          1 /* is_watchpoint */, i);
 171       }
 172 }
 173
 174 /* Call ptrace to set the thread TID's hardware breakpoint/watchpoint
 175    registers with data from *STATE.  */
 176
 177 void
 178 aarch64_linux_set_debug_regs (struct aarch64_debug_reg_state *state,
 179                               int tid, int watchpoint)
 180 {
 181   int i, count;
 182   struct iovec iov;
 183   struct user_hwdebug_state regs;
 184   const CORE_ADDR *addr;
 185   const unsigned int *ctrl;
 186
 187   memset (&regs, 0, sizeof (regs));
 188   iov.iov_base = &regs;
 189   count = watchpoint ? aarch64_num_wp_regs : aarch64_num_bp_regs;
 190   addr = watchpoint ? state->dr_addr_wp : state->dr_addr_bp;
 191   ctrl = watchpoint ? state->dr_ctrl_wp : state->dr_ctrl_bp;
 192   if (count == 0)
 193     return;
 194   iov.iov_len = (offsetof (struct user_hwdebug_state, dbg_regs)
 195                  + count * sizeof (regs.dbg_regs[0]));
 196
 197   for (i = 0; i < count; i++)
 198     {
 199       regs.dbg_regs[i].addr = addr[i];
 200       regs.dbg_regs[i].ctrl = ctrl[i];
 201     }
 202
 203   if (ptrace (PTRACE_SETREGSET, tid,
 204               watchpoint ? NT_ARM_HW_WATCH : NT_ARM_HW_BREAK,
 205               (void *) &iov))
 206     {
 207       /* Handle Linux kernels with the PR external/20207 bug.  */
 208       if (watchpoint && errno == EINVAL
 209           && kernel_supports_any_contiguous_range)
 210         {
 211           kernel_supports_any_contiguous_range = false;
 212           aarch64_downgrade_regs (state);
 213           aarch64_linux_set_debug_regs (state, tid, watchpoint);
 214           return;
 215         }
 216       error (_("Unexpected error setting hardware debug registers"));
 217     }
 218 }
 219
 220 /* Return true if debug arch level is compatible for hw watchpoints
 221    and breakpoints.  */
 222
 223 static bool
 224 compatible_debug_arch (unsigned int debug_arch)
 225 {
 226   if (debug_arch == AARCH64_DEBUG_ARCH_V8)
 227     return true;
 228   if (debug_arch == AARCH64_DEBUG_ARCH_V8_1)
 229     return true;
 230   if (debug_arch == AARCH64_DEBUG_ARCH_V8_2)
 231     return true;
 232   if (debug_arch == AARCH64_DEBUG_ARCH_V8_4)
 233     return true;
 234   if (debug_arch == AARCH64_DEBUG_ARCH_V8_8)
 235     return true;
 236   if (debug_arch == AARCH64_DEBUG_ARCH_V8_9)
 237     return true;
 238
 239   return false;
 240 }
 241
 242 /* Get the hardware debug register capacity information from the
 243    process represented by TID.  */
 244
 245 void
 246 aarch64_linux_get_debug_reg_capacity (int tid)
 247 {
 248   struct iovec iov;
 249   struct user_hwdebug_state dreg_state;
 250
 251   iov.iov_base = &dreg_state;
 252   iov.iov_len = sizeof (dreg_state);
 253
 254   /* Get hardware watchpoint register info.  */
 255   if (ptrace (PTRACE_GETREGSET, tid, NT_ARM_HW_WATCH, &iov) == 0
 256       && compatible_debug_arch (AARCH64_DEBUG_ARCH (dreg_state.dbg_info)))
 257     {
 258       aarch64_num_wp_regs = AARCH64_DEBUG_NUM_SLOTS (dreg_state.dbg_info);
 259       if (aarch64_num_wp_regs > AARCH64_HWP_MAX_NUM)
 260         {
 261           warning (_("Unexpected number of hardware watchpoint registers"
 262                      " reported by ptrace, got %d, expected %d."),
 263                    aarch64_num_wp_regs, AARCH64_HWP_MAX_NUM);
 264           aarch64_num_wp_regs = AARCH64_HWP_MAX_NUM;
 265         }
 266     }
 267   else
 268     {
 269       warning (_("Unable to determine the number of hardware watchpoints"
 270                  " available."));
 271       aarch64_num_wp_regs = 0;
 272     }
 273
 274   /* Get hardware breakpoint register info.  */
 275   if (ptrace (PTRACE_GETREGSET, tid, NT_ARM_HW_BREAK, &iov) == 0
 276       && compatible_debug_arch (AARCH64_DEBUG_ARCH (dreg_state.dbg_info)))
 277     {
 278       aarch64_num_bp_regs = AARCH64_DEBUG_NUM_SLOTS (dreg_state.dbg_info);
 279       if (aarch64_num_bp_regs > AARCH64_HBP_MAX_NUM)
 280         {
 281           warning (_("Unexpected number of hardware breakpoint registers"
 282                      " reported by ptrace, got %d, expected %d."),
 283                    aarch64_num_bp_regs, AARCH64_HBP_MAX_NUM);
 284           aarch64_num_bp_regs = AARCH64_HBP_MAX_NUM;
 285         }
 286     }
 287   else
 288     {
 289       warning (_("Unable to determine the number of hardware breakpoints"
 290                  " available."));
 291       aarch64_num_bp_regs = 0;
 292     }
 293 }