gdb/ocd.h

   1 /* Definitions for the Macraigor Systems BDM Wiggler
   2    Copyright (C) 1996, 1997, 1998, 2000, 2001, 2007
   3    Free Software Foundation, Inc.
   4
   5    This file is part of GDB.
   6
   7    This program is free software; you can redistribute it and/or modify
   8    it under the terms of the GNU General Public License as published by
   9    the Free Software Foundation; either version 2 of the License, or
  10    (at your option) any later version.
  11
  12    This program is distributed in the hope that it will be useful,
  13    but WITHOUT ANY WARRANTY; without even the implied warranty of
  14    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  15    GNU General Public License for more details.
  16
  17    You should have received a copy of the GNU General Public License
  18    along with this program; if not, write to the Free Software
  19    Foundation, Inc., 51 Franklin Street, Fifth Floor,
  20    Boston, MA 02110-1301, USA.  */
  21
  22 #ifndef OCD_H
  23 #define OCD_H
  24
  25 struct mem_attrib;
  26 struct target_ops;
  27
  28 /* Wiggler serial protocol definitions */
  29
  30 #define DLE 020                 /* Quote char */
  31 #define SYN 026                 /* Start of packet */
  32 #define RAW_SYN ((026 << 8) | 026)      /* get_quoted_char found a naked SYN */
  33
  34 /* Status flags */
  35
  36 #define OCD_FLAG_RESET 0x01     /* Target is being reset */
  37 #define OCD_FLAG_STOPPED 0x02   /* Target is halted */
  38 #define OCD_FLAG_BDM 0x04       /* Target is in BDM */
  39 #define OCD_FLAG_PWF 0x08       /* Power failed */
  40 #define OCD_FLAG_CABLE_DISC 0x10        /* BDM cable disconnected */
  41
  42 /* Commands */
  43
  44 #define OCD_AYT 0x0             /* Are you there? */
  45 #define OCD_GET_VERSION 0x1     /* Get Version */
  46 #define OCD_SET_BAUD_RATE 0x2   /* Set Baud Rate */
  47 #define OCD_INIT 0x10           /* Initialize Wiggler */
  48 #define OCD_SET_SPEED 0x11      /* Set Speed */
  49 #define OCD_GET_STATUS_MASK 0x12        /* Get Status Mask */
  50 #define OCD_GET_CTRS 0x13       /* Get Error Counters */
  51 #define OCD_SET_FUNC_CODE 0x14  /* Set Function Code */
  52 #define OCD_SET_CTL_FLAGS 0x15  /* Set Control Flags */
  53 #define OCD_SET_BUF_ADDR 0x16   /* Set Register Buffer Address */
  54 #define OCD_RUN 0x20            /* Run Target from PC */
  55 #define OCD_RUN_ADDR 0x21       /* Run Target from Specified Address */
  56 #define OCD_STOP 0x22           /* Stop Target */
  57 #define OCD_RESET_RUN 0x23      /* Reset Target and Run */
  58 #define OCD_RESET 0x24          /* Reset Target and Halt */
  59 #define OCD_STEP 0x25           /* Single step */
  60 #define OCD_READ_REGS 0x30      /* Read Registers */
  61 #define OCD_WRITE_REGS 0x31     /* Write Registers */
  62 #define OCD_READ_MEM 0x32       /* Read Memory */
  63 #define OCD_WRITE_MEM 0x33      /* Write Memory */
  64 #define OCD_FILL_MEM 0x34       /* Fill Memory */
  65 #define OCD_MOVE_MEM 0x35       /* Move Memory */
  66
  67 #define OCD_READ_INT_MEM 0x80   /* Read Internal Memory */
  68 #define OCD_WRITE_INT_MEM 0x81  /* Write Internal Memory */
  69 #define OCD_JUMP 0x82           /* Jump to Subroutine */
  70
  71 #define OCD_ERASE_FLASH 0x90    /* Erase flash memory */
  72 #define OCD_PROGRAM_FLASH 0x91  /* Write flash memory */
  73 #define OCD_EXIT_MON 0x93       /* Exit the flash programming monitor  */
  74 #define OCD_ENTER_MON 0x94      /* Enter the flash programming monitor  */
  75
  76 #define OCD_SET_STATUS 0x0a     /* Set status */
  77 #define OCD_SET_CONNECTION 0xf0 /* Set connection (init Wigglers.dll) */
  78 #define OCD_LOG_FILE 0xf1       /* Cmd to get Wigglers.dll to log cmds */
  79 #define OCD_FLAG_STOP 0x0       /* Stop the target, enter BDM */
  80 #define OCD_FLAG_START 0x01     /* Start the target at PC */
  81 #define OCD_FLAG_RETURN_STATUS 0x04     /* Return async status */
  82
  83 /* Target type (for OCD_INIT command) */
  84
  85 enum ocd_target_type
  86   {
  87     OCD_TARGET_CPU32 = 0x0,     /* Moto cpu32 family */
  88     OCD_TARGET_CPU16 = 0x1,
  89     OCD_TARGET_MOTO_PPC = 0x2,  /* Motorola PPC 5xx/8xx */
  90     OCD_TARGET_IBM_PPC = 0x3
  91   };                            /* IBM PPC 4xx */
  92
  93 void ocd_open (char *name, int from_tty, enum ocd_target_type,
  94                struct target_ops *ops);
  95
  96 void ocd_close (int quitting);
  97
  98 void ocd_detach (char *args, int from_tty);
  99
 100 void ocd_resume (ptid_t ptid, int step, enum target_signal siggnal);
 101
 102 void ocd_prepare_to_store (void);
 103
 104 void ocd_stop (void);
 105
 106 void ocd_files_info (struct target_ops *ignore);
 107
 108
 109 int ocd_xfer_memory (CORE_ADDR memaddr, char *myaddr,
 110                      int len, int should_write,
 111                      struct mem_attrib *attrib,
 112                      struct target_ops *target);
 113
 114 void ocd_mourn (void);
 115
 116 void ocd_create_inferior (char *exec_file, char *args, char **env,
 117                           int from_tty);
 118
 119 int ocd_thread_alive (ptid_t th);
 120
 121 void ocd_error (char *s, int error_code);
 122
 123 void ocd_kill (void);
 124
 125 void ocd_load (char *args, int from_tty);
 126
 127 unsigned char *ocd_read_bdm_registers (int first_bdm_regno,
 128                                        int last_bdm_regno, int *reglen);
 129
 130 CORE_ADDR ocd_read_bdm_register (int bdm_regno);
 131
 132 void ocd_write_bdm_registers (int first_bdm_regno,
 133                               unsigned char *regptr, int reglen);
 134
 135 void ocd_write_bdm_register (int bdm_regno, CORE_ADDR reg);
 136
 137 int ocd_wait (void);
 138
 139 int ocd_insert_breakpoint (struct bp_target_info *bp_tgt);
 140 int ocd_remove_breakpoint (struct bp_target_info *bp_tgt);
 141
 142 int ocd_write_bytes (CORE_ADDR memaddr, char *myaddr, int len);
 143
 144 #endif /* OCD_H */