1 /* PPC GNU/Linux native support.
3 Copyright (C) 1988-2018 Free Software Foundation, Inc.
5 This file is part of GDB.
7 This program is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 3 of the License, or
10 (at your option) any later version.
12 This program is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
17 You should have received a copy of the GNU General Public License
18 along with this program. If not, see <http://www.gnu.org/licenses/>. */
21 #include "observable.h"
24 #include "gdbthread.h"
29 #include "linux-nat.h"
30 #include <sys/types.h>
33 #include <sys/ioctl.h>
36 #include <sys/procfs.h>
37 #include "nat/gdb_ptrace.h"
38 #include "inf-ptrace.h"
40 /* Prototypes for supply_gregset etc. */
43 #include "ppc-linux-tdep.h"
45 /* Required when using the AUXV. */
46 #include "elf/common.h"
49 #include "arch/ppc-linux-common.h"
50 #include "arch/ppc-linux-tdesc.h"
51 #include "nat/ppc-linux.h"
53 /* Similarly for the hardware watchpoint support. These requests are used
54 when the PowerPC HWDEBUG ptrace interface is not available. */
55 #ifndef PTRACE_GET_DEBUGREG
56 #define PTRACE_GET_DEBUGREG 25
58 #ifndef PTRACE_SET_DEBUGREG
59 #define PTRACE_SET_DEBUGREG 26
61 #ifndef PTRACE_GETSIGINFO
62 #define PTRACE_GETSIGINFO 0x4202
65 /* These requests are used when the PowerPC HWDEBUG ptrace interface is
66 available. It exposes the debug facilities of PowerPC processors, as well
67 as additional features of BookE processors, such as ranged breakpoints and
68 watchpoints and hardware-accelerated condition evaluation. */
69 #ifndef PPC_PTRACE_GETHWDBGINFO
71 /* Not having PPC_PTRACE_GETHWDBGINFO defined means that the PowerPC HWDEBUG
72 ptrace interface is not present in ptrace.h, so we'll have to pretty much
73 include it all here so that the code at least compiles on older systems. */
74 #define PPC_PTRACE_GETHWDBGINFO 0x89
75 #define PPC_PTRACE_SETHWDEBUG 0x88
76 #define PPC_PTRACE_DELHWDEBUG 0x87
80 uint32_t version
; /* Only version 1 exists to date. */
81 uint32_t num_instruction_bps
;
82 uint32_t num_data_bps
;
83 uint32_t num_condition_regs
;
84 uint32_t data_bp_alignment
;
85 uint32_t sizeof_condition
; /* size of the DVC register. */
89 /* Features will have bits indicating whether there is support for: */
90 #define PPC_DEBUG_FEATURE_INSN_BP_RANGE 0x1
91 #define PPC_DEBUG_FEATURE_INSN_BP_MASK 0x2
92 #define PPC_DEBUG_FEATURE_DATA_BP_RANGE 0x4
93 #define PPC_DEBUG_FEATURE_DATA_BP_MASK 0x8
95 struct ppc_hw_breakpoint
97 uint32_t version
; /* currently, version must be 1 */
98 uint32_t trigger_type
; /* only some combinations allowed */
99 uint32_t addr_mode
; /* address match mode */
100 uint32_t condition_mode
; /* break/watchpoint condition flags */
101 uint64_t addr
; /* break/watchpoint address */
102 uint64_t addr2
; /* range end or mask */
103 uint64_t condition_value
; /* contents of the DVC register */
107 #define PPC_BREAKPOINT_TRIGGER_EXECUTE 0x1
108 #define PPC_BREAKPOINT_TRIGGER_READ 0x2
109 #define PPC_BREAKPOINT_TRIGGER_WRITE 0x4
110 #define PPC_BREAKPOINT_TRIGGER_RW 0x6
113 #define PPC_BREAKPOINT_MODE_EXACT 0x0
114 #define PPC_BREAKPOINT_MODE_RANGE_INCLUSIVE 0x1
115 #define PPC_BREAKPOINT_MODE_RANGE_EXCLUSIVE 0x2
116 #define PPC_BREAKPOINT_MODE_MASK 0x3
118 /* Condition mode. */
119 #define PPC_BREAKPOINT_CONDITION_NONE 0x0
120 #define PPC_BREAKPOINT_CONDITION_AND 0x1
121 #define PPC_BREAKPOINT_CONDITION_EXACT 0x1
122 #define PPC_BREAKPOINT_CONDITION_OR 0x2
123 #define PPC_BREAKPOINT_CONDITION_AND_OR 0x3
124 #define PPC_BREAKPOINT_CONDITION_BE_ALL 0x00ff0000
125 #define PPC_BREAKPOINT_CONDITION_BE_SHIFT 16
126 #define PPC_BREAKPOINT_CONDITION_BE(n) \
127 (1<<((n)+PPC_BREAKPOINT_CONDITION_BE_SHIFT))
128 #endif /* PPC_PTRACE_GETHWDBGINFO */
130 /* Feature defined on Linux kernel v3.9: DAWR interface, that enables wider
131 watchpoint (up to 512 bytes). */
132 #ifndef PPC_DEBUG_FEATURE_DATA_BP_DAWR
133 #define PPC_DEBUG_FEATURE_DATA_BP_DAWR 0x10
134 #endif /* PPC_DEBUG_FEATURE_DATA_BP_DAWR */
136 /* Similarly for the general-purpose (gp0 -- gp31)
137 and floating-point registers (fp0 -- fp31). */
138 #ifndef PTRACE_GETREGS
139 #define PTRACE_GETREGS 12
141 #ifndef PTRACE_SETREGS
142 #define PTRACE_SETREGS 13
144 #ifndef PTRACE_GETFPREGS
145 #define PTRACE_GETFPREGS 14
147 #ifndef PTRACE_SETFPREGS
148 #define PTRACE_SETFPREGS 15
151 /* This oddity is because the Linux kernel defines elf_vrregset_t as
152 an array of 33 16 bytes long elements. I.e. it leaves out vrsave.
153 However the PTRACE_GETVRREGS and PTRACE_SETVRREGS requests return
154 the vrsave as an extra 4 bytes at the end. I opted for creating a
155 flat array of chars, so that it is easier to manipulate for gdb.
157 There are 32 vector registers 16 bytes longs, plus a VSCR register
158 which is only 4 bytes long, but is fetched as a 16 bytes
159 quantity. Up to here we have the elf_vrregset_t structure.
160 Appended to this there is space for the VRSAVE register: 4 bytes.
161 Even though this vrsave register is not included in the regset
162 typedef, it is handled by the ptrace requests.
164 The layout is like this (where x is the actual value of the vscr reg): */
169 |.|.|.|.|.....|.|.|.|.||.|.|.|x||.|
170 <-------> <-------><-------><->
173 |.|.|.|.|.....|.|.|.|.||X|.|.|.||.|
174 <-------> <-------><-------><->
179 typedef char gdb_vrregset_t
[PPC_LINUX_SIZEOF_VRREGSET
];
181 /* This is the layout of the POWER7 VSX registers and the way they overlap
182 with the existing FPR and VMX registers.
184 VSR doubleword 0 VSR doubleword 1
185 ----------------------------------------------------------------
187 ----------------------------------------------------------------
189 ----------------------------------------------------------------
192 ----------------------------------------------------------------
193 VSR[30] | FPR[30] | |
194 ----------------------------------------------------------------
195 VSR[31] | FPR[31] | |
196 ----------------------------------------------------------------
198 ----------------------------------------------------------------
200 ----------------------------------------------------------------
203 ----------------------------------------------------------------
205 ----------------------------------------------------------------
207 ----------------------------------------------------------------
209 VSX has 64 128bit registers. The first 32 registers overlap with
210 the FP registers (doubleword 0) and hence extend them with additional
211 64 bits (doubleword 1). The other 32 regs overlap with the VMX
213 typedef char gdb_vsxregset_t
[PPC_LINUX_SIZEOF_VSXREGSET
];
215 /* On PPC processors that support the Signal Processing Extension
216 (SPE) APU, the general-purpose registers are 64 bits long.
217 However, the ordinary Linux kernel PTRACE_PEEKUSER / PTRACE_POKEUSER
218 ptrace calls only access the lower half of each register, to allow
219 them to behave the same way they do on non-SPE systems. There's a
220 separate pair of calls, PTRACE_GETEVRREGS / PTRACE_SETEVRREGS, that
221 read and write the top halves of all the general-purpose registers
222 at once, along with some SPE-specific registers.
224 GDB itself continues to claim the general-purpose registers are 32
225 bits long. It has unnamed raw registers that hold the upper halves
226 of the gprs, and the full 64-bit SIMD views of the registers,
227 'ev0' -- 'ev31', are pseudo-registers that splice the top and
228 bottom halves together.
230 This is the structure filled in by PTRACE_GETEVRREGS and written to
231 the inferior's registers by PTRACE_SETEVRREGS. */
232 struct gdb_evrregset_t
234 unsigned long evr
[32];
235 unsigned long long acc
;
236 unsigned long spefscr
;
239 /* Non-zero if our kernel may support the PTRACE_GETVSXREGS and
240 PTRACE_SETVSXREGS requests, for reading and writing the VSX
241 POWER7 registers 0 through 31. Zero if we've tried one of them and
242 gotten an error. Note that VSX registers 32 through 63 overlap
243 with VR registers 0 through 31. */
244 int have_ptrace_getsetvsxregs
= 1;
246 /* Non-zero if our kernel may support the PTRACE_GETVRREGS and
247 PTRACE_SETVRREGS requests, for reading and writing the Altivec
248 registers. Zero if we've tried one of them and gotten an
250 int have_ptrace_getvrregs
= 1;
252 /* Non-zero if our kernel may support the PTRACE_GETEVRREGS and
253 PTRACE_SETEVRREGS requests, for reading and writing the SPE
254 registers. Zero if we've tried one of them and gotten an
256 int have_ptrace_getsetevrregs
= 1;
258 /* Non-zero if our kernel may support the PTRACE_GETREGS and
259 PTRACE_SETREGS requests, for reading and writing the
260 general-purpose registers. Zero if we've tried one of
261 them and gotten an error. */
262 int have_ptrace_getsetregs
= 1;
264 /* Non-zero if our kernel may support the PTRACE_GETFPREGS and
265 PTRACE_SETFPREGS requests, for reading and writing the
266 floating-pointers registers. Zero if we've tried one of
267 them and gotten an error. */
268 int have_ptrace_getsetfpregs
= 1;
270 struct ppc_linux_nat_target final
: public linux_nat_target
272 /* Add our register access methods. */
273 void fetch_registers (struct regcache
*, int) override
;
274 void store_registers (struct regcache
*, int) override
;
276 /* Add our breakpoint/watchpoint methods. */
277 int can_use_hw_breakpoint (enum bptype
, int, int) override
;
279 int insert_hw_breakpoint (struct gdbarch
*, struct bp_target_info
*)
282 int remove_hw_breakpoint (struct gdbarch
*, struct bp_target_info
*)
285 int region_ok_for_hw_watchpoint (CORE_ADDR
, int) override
;
287 int insert_watchpoint (CORE_ADDR
, int, enum target_hw_bp_type
,
288 struct expression
*) override
;
290 int remove_watchpoint (CORE_ADDR
, int, enum target_hw_bp_type
,
291 struct expression
*) override
;
293 int insert_mask_watchpoint (CORE_ADDR
, CORE_ADDR
, enum target_hw_bp_type
)
296 int remove_mask_watchpoint (CORE_ADDR
, CORE_ADDR
, enum target_hw_bp_type
)
299 bool stopped_by_watchpoint () override
;
301 bool stopped_data_address (CORE_ADDR
*) override
;
303 bool watchpoint_addr_within_range (CORE_ADDR
, CORE_ADDR
, int) override
;
305 bool can_accel_watchpoint_condition (CORE_ADDR
, int, int, struct expression
*)
308 int masked_watch_num_registers (CORE_ADDR
, CORE_ADDR
) override
;
310 int ranged_break_num_registers () override
;
312 const struct target_desc
*read_description () override
;
314 int auxv_parse (gdb_byte
**readptr
,
315 gdb_byte
*endptr
, CORE_ADDR
*typep
, CORE_ADDR
*valp
)
318 /* Override linux_nat_target low methods. */
319 void low_new_thread (struct lwp_info
*lp
) override
;
322 static ppc_linux_nat_target the_ppc_linux_nat_target
;
325 /* registers layout, as presented by the ptrace interface:
326 PT_R0, PT_R1, PT_R2, PT_R3, PT_R4, PT_R5, PT_R6, PT_R7,
327 PT_R8, PT_R9, PT_R10, PT_R11, PT_R12, PT_R13, PT_R14, PT_R15,
328 PT_R16, PT_R17, PT_R18, PT_R19, PT_R20, PT_R21, PT_R22, PT_R23,
329 PT_R24, PT_R25, PT_R26, PT_R27, PT_R28, PT_R29, PT_R30, PT_R31,
330 PT_FPR0, PT_FPR0 + 2, PT_FPR0 + 4, PT_FPR0 + 6,
331 PT_FPR0 + 8, PT_FPR0 + 10, PT_FPR0 + 12, PT_FPR0 + 14,
332 PT_FPR0 + 16, PT_FPR0 + 18, PT_FPR0 + 20, PT_FPR0 + 22,
333 PT_FPR0 + 24, PT_FPR0 + 26, PT_FPR0 + 28, PT_FPR0 + 30,
334 PT_FPR0 + 32, PT_FPR0 + 34, PT_FPR0 + 36, PT_FPR0 + 38,
335 PT_FPR0 + 40, PT_FPR0 + 42, PT_FPR0 + 44, PT_FPR0 + 46,
336 PT_FPR0 + 48, PT_FPR0 + 50, PT_FPR0 + 52, PT_FPR0 + 54,
337 PT_FPR0 + 56, PT_FPR0 + 58, PT_FPR0 + 60, PT_FPR0 + 62,
338 PT_NIP, PT_MSR, PT_CCR, PT_LNK, PT_CTR, PT_XER, PT_MQ */
342 ppc_register_u_addr (struct gdbarch
*gdbarch
, int regno
)
345 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
346 /* NOTE: cagney/2003-11-25: This is the word size used by the ptrace
347 interface, and not the wordsize of the program's ABI. */
348 int wordsize
= sizeof (long);
350 /* General purpose registers occupy 1 slot each in the buffer. */
351 if (regno
>= tdep
->ppc_gp0_regnum
352 && regno
< tdep
->ppc_gp0_regnum
+ ppc_num_gprs
)
353 u_addr
= ((regno
- tdep
->ppc_gp0_regnum
+ PT_R0
) * wordsize
);
355 /* Floating point regs: eight bytes each in both 32- and 64-bit
356 ptrace interfaces. Thus, two slots each in 32-bit interface, one
357 slot each in 64-bit interface. */
358 if (tdep
->ppc_fp0_regnum
>= 0
359 && regno
>= tdep
->ppc_fp0_regnum
360 && regno
< tdep
->ppc_fp0_regnum
+ ppc_num_fprs
)
361 u_addr
= (PT_FPR0
* wordsize
) + ((regno
- tdep
->ppc_fp0_regnum
) * 8);
363 /* UISA special purpose registers: 1 slot each. */
364 if (regno
== gdbarch_pc_regnum (gdbarch
))
365 u_addr
= PT_NIP
* wordsize
;
366 if (regno
== tdep
->ppc_lr_regnum
)
367 u_addr
= PT_LNK
* wordsize
;
368 if (regno
== tdep
->ppc_cr_regnum
)
369 u_addr
= PT_CCR
* wordsize
;
370 if (regno
== tdep
->ppc_xer_regnum
)
371 u_addr
= PT_XER
* wordsize
;
372 if (regno
== tdep
->ppc_ctr_regnum
)
373 u_addr
= PT_CTR
* wordsize
;
375 if (regno
== tdep
->ppc_mq_regnum
)
376 u_addr
= PT_MQ
* wordsize
;
378 if (regno
== tdep
->ppc_ps_regnum
)
379 u_addr
= PT_MSR
* wordsize
;
380 if (regno
== PPC_ORIG_R3_REGNUM
)
381 u_addr
= PT_ORIG_R3
* wordsize
;
382 if (regno
== PPC_TRAP_REGNUM
)
383 u_addr
= PT_TRAP
* wordsize
;
384 if (tdep
->ppc_fpscr_regnum
>= 0
385 && regno
== tdep
->ppc_fpscr_regnum
)
387 /* NOTE: cagney/2005-02-08: On some 64-bit GNU/Linux systems the
388 kernel headers incorrectly contained the 32-bit definition of
389 PT_FPSCR. For the 32-bit definition, floating-point
390 registers occupy two 32-bit "slots", and the FPSCR lives in
391 the second half of such a slot-pair (hence +1). For 64-bit,
392 the FPSCR instead occupies the full 64-bit 2-word-slot and
393 hence no adjustment is necessary. Hack around this. */
394 if (wordsize
== 8 && PT_FPSCR
== (48 + 32 + 1))
395 u_addr
= (48 + 32) * wordsize
;
396 /* If the FPSCR is 64-bit wide, we need to fetch the whole 64-bit
397 slot and not just its second word. The PT_FPSCR supplied when
398 GDB is compiled as a 32-bit app doesn't reflect this. */
399 else if (wordsize
== 4 && register_size (gdbarch
, regno
) == 8
400 && PT_FPSCR
== (48 + 2*32 + 1))
401 u_addr
= (48 + 2*32) * wordsize
;
403 u_addr
= PT_FPSCR
* wordsize
;
408 /* The Linux kernel ptrace interface for POWER7 VSX registers uses the
409 registers set mechanism, as opposed to the interface for all the
410 other registers, that stores/fetches each register individually. */
412 fetch_vsx_registers (struct regcache
*regcache
, int tid
, int regno
)
415 gdb_vsxregset_t regs
;
416 const struct regset
*vsxregset
= ppc_linux_vsxregset ();
418 ret
= ptrace (PTRACE_GETVSXREGS
, tid
, 0, ®s
);
423 have_ptrace_getsetvsxregs
= 0;
426 perror_with_name (_("Unable to fetch VSX registers"));
429 vsxregset
->supply_regset (vsxregset
, regcache
, regno
, ®s
,
430 PPC_LINUX_SIZEOF_VSXREGSET
);
433 /* The Linux kernel ptrace interface for AltiVec registers uses the
434 registers set mechanism, as opposed to the interface for all the
435 other registers, that stores/fetches each register individually. */
437 fetch_altivec_registers (struct regcache
*regcache
, int tid
,
442 struct gdbarch
*gdbarch
= regcache
->arch ();
443 const struct regset
*vrregset
= ppc_linux_vrregset (gdbarch
);
445 ret
= ptrace (PTRACE_GETVRREGS
, tid
, 0, ®s
);
450 have_ptrace_getvrregs
= 0;
453 perror_with_name (_("Unable to fetch AltiVec registers"));
456 vrregset
->supply_regset (vrregset
, regcache
, regno
, ®s
,
457 PPC_LINUX_SIZEOF_VRREGSET
);
460 /* Fetch the top 32 bits of TID's general-purpose registers and the
461 SPE-specific registers, and place the results in EVRREGSET. If we
462 don't support PTRACE_GETEVRREGS, then just fill EVRREGSET with
465 All the logic to deal with whether or not the PTRACE_GETEVRREGS and
466 PTRACE_SETEVRREGS requests are supported is isolated here, and in
467 set_spe_registers. */
469 get_spe_registers (int tid
, struct gdb_evrregset_t
*evrregset
)
471 if (have_ptrace_getsetevrregs
)
473 if (ptrace (PTRACE_GETEVRREGS
, tid
, 0, evrregset
) >= 0)
477 /* EIO means that the PTRACE_GETEVRREGS request isn't supported;
478 we just return zeros. */
480 have_ptrace_getsetevrregs
= 0;
482 /* Anything else needs to be reported. */
483 perror_with_name (_("Unable to fetch SPE registers"));
487 memset (evrregset
, 0, sizeof (*evrregset
));
490 /* Supply values from TID for SPE-specific raw registers: the upper
491 halves of the GPRs, the accumulator, and the spefscr. REGNO must
492 be the number of an upper half register, acc, spefscr, or -1 to
493 supply the values of all registers. */
495 fetch_spe_register (struct regcache
*regcache
, int tid
, int regno
)
497 struct gdbarch
*gdbarch
= regcache
->arch ();
498 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
499 struct gdb_evrregset_t evrregs
;
501 gdb_assert (sizeof (evrregs
.evr
[0])
502 == register_size (gdbarch
, tdep
->ppc_ev0_upper_regnum
));
503 gdb_assert (sizeof (evrregs
.acc
)
504 == register_size (gdbarch
, tdep
->ppc_acc_regnum
));
505 gdb_assert (sizeof (evrregs
.spefscr
)
506 == register_size (gdbarch
, tdep
->ppc_spefscr_regnum
));
508 get_spe_registers (tid
, &evrregs
);
514 for (i
= 0; i
< ppc_num_gprs
; i
++)
515 regcache
->raw_supply (tdep
->ppc_ev0_upper_regnum
+ i
, &evrregs
.evr
[i
]);
517 else if (tdep
->ppc_ev0_upper_regnum
<= regno
518 && regno
< tdep
->ppc_ev0_upper_regnum
+ ppc_num_gprs
)
519 regcache
->raw_supply (regno
,
520 &evrregs
.evr
[regno
- tdep
->ppc_ev0_upper_regnum
]);
523 || regno
== tdep
->ppc_acc_regnum
)
524 regcache
->raw_supply (tdep
->ppc_acc_regnum
, &evrregs
.acc
);
527 || regno
== tdep
->ppc_spefscr_regnum
)
528 regcache
->raw_supply (tdep
->ppc_spefscr_regnum
, &evrregs
.spefscr
);
532 fetch_register (struct regcache
*regcache
, int tid
, int regno
)
534 struct gdbarch
*gdbarch
= regcache
->arch ();
535 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
536 /* This isn't really an address. But ptrace thinks of it as one. */
537 CORE_ADDR regaddr
= ppc_register_u_addr (gdbarch
, regno
);
538 int bytes_transferred
;
539 unsigned int offset
; /* Offset of registers within the u area. */
540 gdb_byte buf
[PPC_MAX_REGISTER_SIZE
];
542 if (altivec_register_p (gdbarch
, regno
))
544 /* If this is the first time through, or if it is not the first
545 time through, and we have comfirmed that there is kernel
546 support for such a ptrace request, then go and fetch the
548 if (have_ptrace_getvrregs
)
550 fetch_altivec_registers (regcache
, tid
, regno
);
553 /* If we have discovered that there is no ptrace support for
554 AltiVec registers, fall through and return zeroes, because
555 regaddr will be -1 in this case. */
557 if (vsx_register_p (gdbarch
, regno
))
559 if (have_ptrace_getsetvsxregs
)
561 fetch_vsx_registers (regcache
, tid
, regno
);
565 else if (spe_register_p (gdbarch
, regno
))
567 fetch_spe_register (regcache
, tid
, regno
);
573 memset (buf
, '\0', register_size (gdbarch
, regno
)); /* Supply zeroes */
574 regcache
->raw_supply (regno
, buf
);
578 /* Read the raw register using sizeof(long) sized chunks. On a
579 32-bit platform, 64-bit floating-point registers will require two
581 for (bytes_transferred
= 0;
582 bytes_transferred
< register_size (gdbarch
, regno
);
583 bytes_transferred
+= sizeof (long))
588 l
= ptrace (PTRACE_PEEKUSER
, tid
, (PTRACE_TYPE_ARG3
) regaddr
, 0);
589 regaddr
+= sizeof (long);
593 xsnprintf (message
, sizeof (message
), "reading register %s (#%d)",
594 gdbarch_register_name (gdbarch
, regno
), regno
);
595 perror_with_name (message
);
597 memcpy (&buf
[bytes_transferred
], &l
, sizeof (l
));
600 /* Now supply the register. Keep in mind that the regcache's idea
601 of the register's size may not be a multiple of sizeof
603 if (gdbarch_byte_order (gdbarch
) == BFD_ENDIAN_LITTLE
)
605 /* Little-endian values are always found at the left end of the
606 bytes transferred. */
607 regcache
->raw_supply (regno
, buf
);
609 else if (gdbarch_byte_order (gdbarch
) == BFD_ENDIAN_BIG
)
611 /* Big-endian values are found at the right end of the bytes
613 size_t padding
= (bytes_transferred
- register_size (gdbarch
, regno
));
614 regcache
->raw_supply (regno
, buf
+ padding
);
617 internal_error (__FILE__
, __LINE__
,
618 _("fetch_register: unexpected byte order: %d"),
619 gdbarch_byte_order (gdbarch
));
622 /* This function actually issues the request to ptrace, telling
623 it to get all general-purpose registers and put them into the
626 If the ptrace request does not exist, this function returns 0
627 and properly sets the have_ptrace_* flag. If the request fails,
628 this function calls perror_with_name. Otherwise, if the request
629 succeeds, then the regcache gets filled and 1 is returned. */
631 fetch_all_gp_regs (struct regcache
*regcache
, int tid
)
633 struct gdbarch
*gdbarch
= regcache
->arch ();
634 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
635 gdb_gregset_t gregset
;
637 if (ptrace (PTRACE_GETREGS
, tid
, 0, (void *) &gregset
) < 0)
641 have_ptrace_getsetregs
= 0;
644 perror_with_name (_("Couldn't get general-purpose registers."));
647 supply_gregset (regcache
, (const gdb_gregset_t
*) &gregset
);
652 /* This is a wrapper for the fetch_all_gp_regs function. It is
653 responsible for verifying if this target has the ptrace request
654 that can be used to fetch all general-purpose registers at one
655 shot. If it doesn't, then we should fetch them using the
656 old-fashioned way, which is to iterate over the registers and
657 request them one by one. */
659 fetch_gp_regs (struct regcache
*regcache
, int tid
)
661 struct gdbarch
*gdbarch
= regcache
->arch ();
662 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
665 if (have_ptrace_getsetregs
)
666 if (fetch_all_gp_regs (regcache
, tid
))
669 /* If we've hit this point, it doesn't really matter which
670 architecture we are using. We just need to read the
671 registers in the "old-fashioned way". */
672 for (i
= 0; i
< ppc_num_gprs
; i
++)
673 fetch_register (regcache
, tid
, tdep
->ppc_gp0_regnum
+ i
);
676 /* This function actually issues the request to ptrace, telling
677 it to get all floating-point registers and put them into the
680 If the ptrace request does not exist, this function returns 0
681 and properly sets the have_ptrace_* flag. If the request fails,
682 this function calls perror_with_name. Otherwise, if the request
683 succeeds, then the regcache gets filled and 1 is returned. */
685 fetch_all_fp_regs (struct regcache
*regcache
, int tid
)
687 gdb_fpregset_t fpregs
;
689 if (ptrace (PTRACE_GETFPREGS
, tid
, 0, (void *) &fpregs
) < 0)
693 have_ptrace_getsetfpregs
= 0;
696 perror_with_name (_("Couldn't get floating-point registers."));
699 supply_fpregset (regcache
, (const gdb_fpregset_t
*) &fpregs
);
704 /* This is a wrapper for the fetch_all_fp_regs function. It is
705 responsible for verifying if this target has the ptrace request
706 that can be used to fetch all floating-point registers at one
707 shot. If it doesn't, then we should fetch them using the
708 old-fashioned way, which is to iterate over the registers and
709 request them one by one. */
711 fetch_fp_regs (struct regcache
*regcache
, int tid
)
713 struct gdbarch
*gdbarch
= regcache
->arch ();
714 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
717 if (have_ptrace_getsetfpregs
)
718 if (fetch_all_fp_regs (regcache
, tid
))
721 /* If we've hit this point, it doesn't really matter which
722 architecture we are using. We just need to read the
723 registers in the "old-fashioned way". */
724 for (i
= 0; i
< ppc_num_fprs
; i
++)
725 fetch_register (regcache
, tid
, tdep
->ppc_fp0_regnum
+ i
);
729 fetch_ppc_registers (struct regcache
*regcache
, int tid
)
732 struct gdbarch
*gdbarch
= regcache
->arch ();
733 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
735 fetch_gp_regs (regcache
, tid
);
736 if (tdep
->ppc_fp0_regnum
>= 0)
737 fetch_fp_regs (regcache
, tid
);
738 fetch_register (regcache
, tid
, gdbarch_pc_regnum (gdbarch
));
739 if (tdep
->ppc_ps_regnum
!= -1)
740 fetch_register (regcache
, tid
, tdep
->ppc_ps_regnum
);
741 if (tdep
->ppc_cr_regnum
!= -1)
742 fetch_register (regcache
, tid
, tdep
->ppc_cr_regnum
);
743 if (tdep
->ppc_lr_regnum
!= -1)
744 fetch_register (regcache
, tid
, tdep
->ppc_lr_regnum
);
745 if (tdep
->ppc_ctr_regnum
!= -1)
746 fetch_register (regcache
, tid
, tdep
->ppc_ctr_regnum
);
747 if (tdep
->ppc_xer_regnum
!= -1)
748 fetch_register (regcache
, tid
, tdep
->ppc_xer_regnum
);
749 if (tdep
->ppc_mq_regnum
!= -1)
750 fetch_register (regcache
, tid
, tdep
->ppc_mq_regnum
);
751 if (ppc_linux_trap_reg_p (gdbarch
))
753 fetch_register (regcache
, tid
, PPC_ORIG_R3_REGNUM
);
754 fetch_register (regcache
, tid
, PPC_TRAP_REGNUM
);
756 if (tdep
->ppc_fpscr_regnum
!= -1)
757 fetch_register (regcache
, tid
, tdep
->ppc_fpscr_regnum
);
758 if (have_ptrace_getvrregs
)
759 if (tdep
->ppc_vr0_regnum
!= -1 && tdep
->ppc_vrsave_regnum
!= -1)
760 fetch_altivec_registers (regcache
, tid
, -1);
761 if (have_ptrace_getsetvsxregs
)
762 if (tdep
->ppc_vsr0_upper_regnum
!= -1)
763 fetch_vsx_registers (regcache
, tid
, -1);
764 if (tdep
->ppc_ev0_upper_regnum
>= 0)
765 fetch_spe_register (regcache
, tid
, -1);
768 /* Fetch registers from the child process. Fetch all registers if
769 regno == -1, otherwise fetch all general registers or all floating
770 point registers depending upon the value of regno. */
772 ppc_linux_nat_target::fetch_registers (struct regcache
*regcache
, int regno
)
774 pid_t tid
= get_ptrace_pid (regcache
->ptid ());
777 fetch_ppc_registers (regcache
, tid
);
779 fetch_register (regcache
, tid
, regno
);
783 store_vsx_registers (const struct regcache
*regcache
, int tid
, int regno
)
786 gdb_vsxregset_t regs
;
787 const struct regset
*vsxregset
= ppc_linux_vsxregset ();
789 ret
= ptrace (PTRACE_GETVSXREGS
, tid
, 0, ®s
);
794 have_ptrace_getsetvsxregs
= 0;
797 perror_with_name (_("Unable to fetch VSX registers"));
800 vsxregset
->collect_regset (vsxregset
, regcache
, regno
, ®s
,
801 PPC_LINUX_SIZEOF_VSXREGSET
);
803 ret
= ptrace (PTRACE_SETVSXREGS
, tid
, 0, ®s
);
805 perror_with_name (_("Unable to store VSX registers"));
809 store_altivec_registers (const struct regcache
*regcache
, int tid
,
814 struct gdbarch
*gdbarch
= regcache
->arch ();
815 const struct regset
*vrregset
= ppc_linux_vrregset (gdbarch
);
817 ret
= ptrace (PTRACE_GETVRREGS
, tid
, 0, ®s
);
822 have_ptrace_getvrregs
= 0;
825 perror_with_name (_("Unable to fetch AltiVec registers"));
828 vrregset
->collect_regset (vrregset
, regcache
, regno
, ®s
,
829 PPC_LINUX_SIZEOF_VRREGSET
);
831 ret
= ptrace (PTRACE_SETVRREGS
, tid
, 0, ®s
);
833 perror_with_name (_("Unable to store AltiVec registers"));
836 /* Assuming TID referrs to an SPE process, set the top halves of TID's
837 general-purpose registers and its SPE-specific registers to the
838 values in EVRREGSET. If we don't support PTRACE_SETEVRREGS, do
841 All the logic to deal with whether or not the PTRACE_GETEVRREGS and
842 PTRACE_SETEVRREGS requests are supported is isolated here, and in
843 get_spe_registers. */
845 set_spe_registers (int tid
, struct gdb_evrregset_t
*evrregset
)
847 if (have_ptrace_getsetevrregs
)
849 if (ptrace (PTRACE_SETEVRREGS
, tid
, 0, evrregset
) >= 0)
853 /* EIO means that the PTRACE_SETEVRREGS request isn't
854 supported; we fail silently, and don't try the call
857 have_ptrace_getsetevrregs
= 0;
859 /* Anything else needs to be reported. */
860 perror_with_name (_("Unable to set SPE registers"));
865 /* Write GDB's value for the SPE-specific raw register REGNO to TID.
866 If REGNO is -1, write the values of all the SPE-specific
869 store_spe_register (const struct regcache
*regcache
, int tid
, int regno
)
871 struct gdbarch
*gdbarch
= regcache
->arch ();
872 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
873 struct gdb_evrregset_t evrregs
;
875 gdb_assert (sizeof (evrregs
.evr
[0])
876 == register_size (gdbarch
, tdep
->ppc_ev0_upper_regnum
));
877 gdb_assert (sizeof (evrregs
.acc
)
878 == register_size (gdbarch
, tdep
->ppc_acc_regnum
));
879 gdb_assert (sizeof (evrregs
.spefscr
)
880 == register_size (gdbarch
, tdep
->ppc_spefscr_regnum
));
883 /* Since we're going to write out every register, the code below
884 should store to every field of evrregs; if that doesn't happen,
885 make it obvious by initializing it with suspicious values. */
886 memset (&evrregs
, 42, sizeof (evrregs
));
888 /* We can only read and write the entire EVR register set at a
889 time, so to write just a single register, we do a
890 read-modify-write maneuver. */
891 get_spe_registers (tid
, &evrregs
);
897 for (i
= 0; i
< ppc_num_gprs
; i
++)
898 regcache
->raw_collect (tdep
->ppc_ev0_upper_regnum
+ i
,
901 else if (tdep
->ppc_ev0_upper_regnum
<= regno
902 && regno
< tdep
->ppc_ev0_upper_regnum
+ ppc_num_gprs
)
903 regcache
->raw_collect (regno
,
904 &evrregs
.evr
[regno
- tdep
->ppc_ev0_upper_regnum
]);
907 || regno
== tdep
->ppc_acc_regnum
)
908 regcache
->raw_collect (tdep
->ppc_acc_regnum
,
912 || regno
== tdep
->ppc_spefscr_regnum
)
913 regcache
->raw_collect (tdep
->ppc_spefscr_regnum
,
916 /* Write back the modified register set. */
917 set_spe_registers (tid
, &evrregs
);
921 store_register (const struct regcache
*regcache
, int tid
, int regno
)
923 struct gdbarch
*gdbarch
= regcache
->arch ();
924 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
925 /* This isn't really an address. But ptrace thinks of it as one. */
926 CORE_ADDR regaddr
= ppc_register_u_addr (gdbarch
, regno
);
928 size_t bytes_to_transfer
;
929 gdb_byte buf
[PPC_MAX_REGISTER_SIZE
];
931 if (altivec_register_p (gdbarch
, regno
))
933 store_altivec_registers (regcache
, tid
, regno
);
936 if (vsx_register_p (gdbarch
, regno
))
938 store_vsx_registers (regcache
, tid
, regno
);
941 else if (spe_register_p (gdbarch
, regno
))
943 store_spe_register (regcache
, tid
, regno
);
950 /* First collect the register. Keep in mind that the regcache's
951 idea of the register's size may not be a multiple of sizeof
953 memset (buf
, 0, sizeof buf
);
954 bytes_to_transfer
= align_up (register_size (gdbarch
, regno
), sizeof (long));
955 if (gdbarch_byte_order (gdbarch
) == BFD_ENDIAN_LITTLE
)
957 /* Little-endian values always sit at the left end of the buffer. */
958 regcache
->raw_collect (regno
, buf
);
960 else if (gdbarch_byte_order (gdbarch
) == BFD_ENDIAN_BIG
)
962 /* Big-endian values sit at the right end of the buffer. */
963 size_t padding
= (bytes_to_transfer
- register_size (gdbarch
, regno
));
964 regcache
->raw_collect (regno
, buf
+ padding
);
967 for (i
= 0; i
< bytes_to_transfer
; i
+= sizeof (long))
971 memcpy (&l
, &buf
[i
], sizeof (l
));
973 ptrace (PTRACE_POKEUSER
, tid
, (PTRACE_TYPE_ARG3
) regaddr
, l
);
974 regaddr
+= sizeof (long);
977 && (regno
== tdep
->ppc_fpscr_regnum
978 || regno
== PPC_ORIG_R3_REGNUM
979 || regno
== PPC_TRAP_REGNUM
))
981 /* Some older kernel versions don't allow fpscr, orig_r3
982 or trap to be written. */
989 xsnprintf (message
, sizeof (message
), "writing register %s (#%d)",
990 gdbarch_register_name (gdbarch
, regno
), regno
);
991 perror_with_name (message
);
996 /* This function actually issues the request to ptrace, telling
997 it to store all general-purpose registers present in the specified
1000 If the ptrace request does not exist, this function returns 0
1001 and properly sets the have_ptrace_* flag. If the request fails,
1002 this function calls perror_with_name. Otherwise, if the request
1003 succeeds, then the regcache is stored and 1 is returned. */
1005 store_all_gp_regs (const struct regcache
*regcache
, int tid
, int regno
)
1007 struct gdbarch
*gdbarch
= regcache
->arch ();
1008 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
1009 gdb_gregset_t gregset
;
1011 if (ptrace (PTRACE_GETREGS
, tid
, 0, (void *) &gregset
) < 0)
1015 have_ptrace_getsetregs
= 0;
1018 perror_with_name (_("Couldn't get general-purpose registers."));
1021 fill_gregset (regcache
, &gregset
, regno
);
1023 if (ptrace (PTRACE_SETREGS
, tid
, 0, (void *) &gregset
) < 0)
1027 have_ptrace_getsetregs
= 0;
1030 perror_with_name (_("Couldn't set general-purpose registers."));
1036 /* This is a wrapper for the store_all_gp_regs function. It is
1037 responsible for verifying if this target has the ptrace request
1038 that can be used to store all general-purpose registers at one
1039 shot. If it doesn't, then we should store them using the
1040 old-fashioned way, which is to iterate over the registers and
1041 store them one by one. */
1043 store_gp_regs (const struct regcache
*regcache
, int tid
, int regno
)
1045 struct gdbarch
*gdbarch
= regcache
->arch ();
1046 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
1049 if (have_ptrace_getsetregs
)
1050 if (store_all_gp_regs (regcache
, tid
, regno
))
1053 /* If we hit this point, it doesn't really matter which
1054 architecture we are using. We just need to store the
1055 registers in the "old-fashioned way". */
1056 for (i
= 0; i
< ppc_num_gprs
; i
++)
1057 store_register (regcache
, tid
, tdep
->ppc_gp0_regnum
+ i
);
1060 /* This function actually issues the request to ptrace, telling
1061 it to store all floating-point registers present in the specified
1064 If the ptrace request does not exist, this function returns 0
1065 and properly sets the have_ptrace_* flag. If the request fails,
1066 this function calls perror_with_name. Otherwise, if the request
1067 succeeds, then the regcache is stored and 1 is returned. */
1069 store_all_fp_regs (const struct regcache
*regcache
, int tid
, int regno
)
1071 gdb_fpregset_t fpregs
;
1073 if (ptrace (PTRACE_GETFPREGS
, tid
, 0, (void *) &fpregs
) < 0)
1077 have_ptrace_getsetfpregs
= 0;
1080 perror_with_name (_("Couldn't get floating-point registers."));
1083 fill_fpregset (regcache
, &fpregs
, regno
);
1085 if (ptrace (PTRACE_SETFPREGS
, tid
, 0, (void *) &fpregs
) < 0)
1089 have_ptrace_getsetfpregs
= 0;
1092 perror_with_name (_("Couldn't set floating-point registers."));
1098 /* This is a wrapper for the store_all_fp_regs function. It is
1099 responsible for verifying if this target has the ptrace request
1100 that can be used to store all floating-point registers at one
1101 shot. If it doesn't, then we should store them using the
1102 old-fashioned way, which is to iterate over the registers and
1103 store them one by one. */
1105 store_fp_regs (const struct regcache
*regcache
, int tid
, int regno
)
1107 struct gdbarch
*gdbarch
= regcache
->arch ();
1108 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
1111 if (have_ptrace_getsetfpregs
)
1112 if (store_all_fp_regs (regcache
, tid
, regno
))
1115 /* If we hit this point, it doesn't really matter which
1116 architecture we are using. We just need to store the
1117 registers in the "old-fashioned way". */
1118 for (i
= 0; i
< ppc_num_fprs
; i
++)
1119 store_register (regcache
, tid
, tdep
->ppc_fp0_regnum
+ i
);
1123 store_ppc_registers (const struct regcache
*regcache
, int tid
)
1126 struct gdbarch
*gdbarch
= regcache
->arch ();
1127 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
1129 store_gp_regs (regcache
, tid
, -1);
1130 if (tdep
->ppc_fp0_regnum
>= 0)
1131 store_fp_regs (regcache
, tid
, -1);
1132 store_register (regcache
, tid
, gdbarch_pc_regnum (gdbarch
));
1133 if (tdep
->ppc_ps_regnum
!= -1)
1134 store_register (regcache
, tid
, tdep
->ppc_ps_regnum
);
1135 if (tdep
->ppc_cr_regnum
!= -1)
1136 store_register (regcache
, tid
, tdep
->ppc_cr_regnum
);
1137 if (tdep
->ppc_lr_regnum
!= -1)
1138 store_register (regcache
, tid
, tdep
->ppc_lr_regnum
);
1139 if (tdep
->ppc_ctr_regnum
!= -1)
1140 store_register (regcache
, tid
, tdep
->ppc_ctr_regnum
);
1141 if (tdep
->ppc_xer_regnum
!= -1)
1142 store_register (regcache
, tid
, tdep
->ppc_xer_regnum
);
1143 if (tdep
->ppc_mq_regnum
!= -1)
1144 store_register (regcache
, tid
, tdep
->ppc_mq_regnum
);
1145 if (tdep
->ppc_fpscr_regnum
!= -1)
1146 store_register (regcache
, tid
, tdep
->ppc_fpscr_regnum
);
1147 if (ppc_linux_trap_reg_p (gdbarch
))
1149 store_register (regcache
, tid
, PPC_ORIG_R3_REGNUM
);
1150 store_register (regcache
, tid
, PPC_TRAP_REGNUM
);
1152 if (have_ptrace_getvrregs
)
1153 if (tdep
->ppc_vr0_regnum
!= -1 && tdep
->ppc_vrsave_regnum
!= -1)
1154 store_altivec_registers (regcache
, tid
, -1);
1155 if (have_ptrace_getsetvsxregs
)
1156 if (tdep
->ppc_vsr0_upper_regnum
!= -1)
1157 store_vsx_registers (regcache
, tid
, -1);
1158 if (tdep
->ppc_ev0_upper_regnum
>= 0)
1159 store_spe_register (regcache
, tid
, -1);
1162 /* Fetch the AT_HWCAP entry from the aux vector. */
1164 ppc_linux_get_hwcap (void)
1168 if (target_auxv_search (current_top_target (), AT_HWCAP
, &field
) != 1)
1174 /* The cached DABR value, to install in new threads.
1175 This variable is used when the PowerPC HWDEBUG ptrace
1176 interface is not available. */
1177 static long saved_dabr_value
;
1179 /* Global structure that will store information about the available
1180 features provided by the PowerPC HWDEBUG ptrace interface. */
1181 static struct ppc_debug_info hwdebug_info
;
1183 /* Global variable that holds the maximum number of slots that the
1184 kernel will use. This is only used when PowerPC HWDEBUG ptrace interface
1186 static size_t max_slots_number
= 0;
1188 struct hw_break_tuple
1191 struct ppc_hw_breakpoint
*hw_break
;
1194 /* This is an internal VEC created to store information about *points inserted
1195 for each thread. This is used when PowerPC HWDEBUG ptrace interface is
1197 typedef struct thread_points
1199 /* The TID to which this *point relates. */
1201 /* Information about the *point, such as its address, type, etc.
1203 Each element inside this vector corresponds to a hardware
1204 breakpoint or watchpoint in the thread represented by TID. The maximum
1205 size of these vector is MAX_SLOTS_NUMBER. If the hw_break element of
1206 the tuple is NULL, then the position in the vector is free. */
1207 struct hw_break_tuple
*hw_breaks
;
1209 DEF_VEC_P (thread_points_p
);
1211 VEC(thread_points_p
) *ppc_threads
= NULL
;
1213 /* The version of the PowerPC HWDEBUG kernel interface that we will use, if
1215 #define PPC_DEBUG_CURRENT_VERSION 1
1217 /* Returns non-zero if we support the PowerPC HWDEBUG ptrace interface. */
1219 have_ptrace_hwdebug_interface (void)
1221 static int have_ptrace_hwdebug_interface
= -1;
1223 if (have_ptrace_hwdebug_interface
== -1)
1227 tid
= ptid_get_lwp (inferior_ptid
);
1229 tid
= inferior_ptid
.pid ();
1231 /* Check for kernel support for PowerPC HWDEBUG ptrace interface. */
1232 if (ptrace (PPC_PTRACE_GETHWDBGINFO
, tid
, 0, &hwdebug_info
) >= 0)
1234 /* Check whether PowerPC HWDEBUG ptrace interface is functional and
1235 provides any supported feature. */
1236 if (hwdebug_info
.features
!= 0)
1238 have_ptrace_hwdebug_interface
= 1;
1239 max_slots_number
= hwdebug_info
.num_instruction_bps
1240 + hwdebug_info
.num_data_bps
1241 + hwdebug_info
.num_condition_regs
;
1242 return have_ptrace_hwdebug_interface
;
1245 /* Old school interface and no PowerPC HWDEBUG ptrace support. */
1246 have_ptrace_hwdebug_interface
= 0;
1247 memset (&hwdebug_info
, 0, sizeof (struct ppc_debug_info
));
1250 return have_ptrace_hwdebug_interface
;
1254 ppc_linux_nat_target::can_use_hw_breakpoint (enum bptype type
, int cnt
, int ot
)
1256 int total_hw_wp
, total_hw_bp
;
1258 if (have_ptrace_hwdebug_interface ())
1260 /* When PowerPC HWDEBUG ptrace interface is available, the number of
1261 available hardware watchpoints and breakpoints is stored at the
1262 hwdebug_info struct. */
1263 total_hw_bp
= hwdebug_info
.num_instruction_bps
;
1264 total_hw_wp
= hwdebug_info
.num_data_bps
;
1268 /* When we do not have PowerPC HWDEBUG ptrace interface, we should
1269 consider having 1 hardware watchpoint and no hardware breakpoints. */
1274 if (type
== bp_hardware_watchpoint
|| type
== bp_read_watchpoint
1275 || type
== bp_access_watchpoint
|| type
== bp_watchpoint
)
1277 if (cnt
+ ot
> total_hw_wp
)
1280 else if (type
== bp_hardware_breakpoint
)
1282 if (total_hw_bp
== 0)
1284 /* No hardware breakpoint support. */
1287 if (cnt
> total_hw_bp
)
1291 if (!have_ptrace_hwdebug_interface ())
1294 ptid_t ptid
= inferior_ptid
;
1296 /* We need to know whether ptrace supports PTRACE_SET_DEBUGREG
1297 and whether the target has DABR. If either answer is no, the
1298 ptrace call will return -1. Fail in that case. */
1299 tid
= ptid_get_lwp (ptid
);
1303 if (ptrace (PTRACE_SET_DEBUGREG
, tid
, 0, 0) == -1)
1311 ppc_linux_nat_target::region_ok_for_hw_watchpoint (CORE_ADDR addr
, int len
)
1313 /* Handle sub-8-byte quantities. */
1317 /* The PowerPC HWDEBUG ptrace interface tells if there are alignment
1318 restrictions for watchpoints in the processors. In that case, we use that
1319 information to determine the hardcoded watchable region for
1321 if (have_ptrace_hwdebug_interface ())
1324 /* Embedded DAC-based processors, like the PowerPC 440 have ranged
1325 watchpoints and can watch any access within an arbitrary memory
1326 region. This is useful to watch arrays and structs, for instance. It
1327 takes two hardware watchpoints though. */
1329 && hwdebug_info
.features
& PPC_DEBUG_FEATURE_DATA_BP_RANGE
1330 && ppc_linux_get_hwcap () & PPC_FEATURE_BOOKE
)
1332 /* Check if the processor provides DAWR interface. */
1333 if (hwdebug_info
.features
& PPC_DEBUG_FEATURE_DATA_BP_DAWR
)
1334 /* DAWR interface allows to watch up to 512 byte wide ranges which
1335 can't cross a 512 byte boundary. */
1338 region_size
= hwdebug_info
.data_bp_alignment
;
1339 /* Server processors provide one hardware watchpoint and addr+len should
1340 fall in the watchable region provided by the ptrace interface. */
1342 && (addr
+ len
> (addr
& ~(region_size
- 1)) + region_size
))
1345 /* addr+len must fall in the 8 byte watchable region for DABR-based
1346 processors (i.e., server processors). Without the new PowerPC HWDEBUG
1347 ptrace interface, DAC-based processors (i.e., embedded processors) will
1348 use addresses aligned to 4-bytes due to the way the read/write flags are
1349 passed in the old ptrace interface. */
1350 else if (((ppc_linux_get_hwcap () & PPC_FEATURE_BOOKE
)
1351 && (addr
+ len
) > (addr
& ~3) + 4)
1352 || (addr
+ len
) > (addr
& ~7) + 8)
1358 /* This function compares two ppc_hw_breakpoint structs field-by-field. */
1360 hwdebug_point_cmp (struct ppc_hw_breakpoint
*a
, struct ppc_hw_breakpoint
*b
)
1362 return (a
->trigger_type
== b
->trigger_type
1363 && a
->addr_mode
== b
->addr_mode
1364 && a
->condition_mode
== b
->condition_mode
1365 && a
->addr
== b
->addr
1366 && a
->addr2
== b
->addr2
1367 && a
->condition_value
== b
->condition_value
);
1370 /* This function can be used to retrieve a thread_points by the TID of the
1371 related process/thread. If nothing has been found, and ALLOC_NEW is 0,
1372 it returns NULL. If ALLOC_NEW is non-zero, a new thread_points for the
1373 provided TID will be created and returned. */
1374 static struct thread_points
*
1375 hwdebug_find_thread_points_by_tid (int tid
, int alloc_new
)
1378 struct thread_points
*t
;
1380 for (i
= 0; VEC_iterate (thread_points_p
, ppc_threads
, i
, t
); i
++)
1386 /* Do we need to allocate a new point_item
1387 if the wanted one does not exist? */
1390 t
= XNEW (struct thread_points
);
1391 t
->hw_breaks
= XCNEWVEC (struct hw_break_tuple
, max_slots_number
);
1393 VEC_safe_push (thread_points_p
, ppc_threads
, t
);
1399 /* This function is a generic wrapper that is responsible for inserting a
1400 *point (i.e., calling `ptrace' in order to issue the request to the
1401 kernel) and registering it internally in GDB. */
1403 hwdebug_insert_point (struct ppc_hw_breakpoint
*b
, int tid
)
1407 gdb::unique_xmalloc_ptr
<ppc_hw_breakpoint
> p (XDUP (ppc_hw_breakpoint
, b
));
1408 struct hw_break_tuple
*hw_breaks
;
1409 struct thread_points
*t
;
1410 struct hw_break_tuple
*tuple
;
1413 slot
= ptrace (PPC_PTRACE_SETHWDEBUG
, tid
, 0, p
.get ());
1415 perror_with_name (_("Unexpected error setting breakpoint or watchpoint"));
1417 /* Everything went fine, so we have to register this *point. */
1418 t
= hwdebug_find_thread_points_by_tid (tid
, 1);
1419 gdb_assert (t
!= NULL
);
1420 hw_breaks
= t
->hw_breaks
;
1422 /* Find a free element in the hw_breaks vector. */
1423 for (i
= 0; i
< max_slots_number
; i
++)
1424 if (hw_breaks
[i
].hw_break
== NULL
)
1426 hw_breaks
[i
].slot
= slot
;
1427 hw_breaks
[i
].hw_break
= p
.release ();
1431 gdb_assert (i
!= max_slots_number
);
1434 /* This function is a generic wrapper that is responsible for removing a
1435 *point (i.e., calling `ptrace' in order to issue the request to the
1436 kernel), and unregistering it internally at GDB. */
1438 hwdebug_remove_point (struct ppc_hw_breakpoint
*b
, int tid
)
1441 struct hw_break_tuple
*hw_breaks
;
1442 struct thread_points
*t
;
1444 t
= hwdebug_find_thread_points_by_tid (tid
, 0);
1445 gdb_assert (t
!= NULL
);
1446 hw_breaks
= t
->hw_breaks
;
1448 for (i
= 0; i
< max_slots_number
; i
++)
1449 if (hw_breaks
[i
].hw_break
&& hwdebug_point_cmp (hw_breaks
[i
].hw_break
, b
))
1452 gdb_assert (i
!= max_slots_number
);
1454 /* We have to ignore ENOENT errors because the kernel implements hardware
1455 breakpoints/watchpoints as "one-shot", that is, they are automatically
1456 deleted when hit. */
1458 if (ptrace (PPC_PTRACE_DELHWDEBUG
, tid
, 0, hw_breaks
[i
].slot
) < 0)
1459 if (errno
!= ENOENT
)
1460 perror_with_name (_("Unexpected error deleting "
1461 "breakpoint or watchpoint"));
1463 xfree (hw_breaks
[i
].hw_break
);
1464 hw_breaks
[i
].hw_break
= NULL
;
1467 /* Return the number of registers needed for a ranged breakpoint. */
1470 ppc_linux_nat_target::ranged_break_num_registers ()
1472 return ((have_ptrace_hwdebug_interface ()
1473 && hwdebug_info
.features
& PPC_DEBUG_FEATURE_INSN_BP_RANGE
)?
1477 /* Insert the hardware breakpoint described by BP_TGT. Returns 0 for
1478 success, 1 if hardware breakpoints are not supported or -1 for failure. */
1481 ppc_linux_nat_target::insert_hw_breakpoint (struct gdbarch
*gdbarch
,
1482 struct bp_target_info
*bp_tgt
)
1484 struct lwp_info
*lp
;
1485 struct ppc_hw_breakpoint p
;
1487 if (!have_ptrace_hwdebug_interface ())
1490 p
.version
= PPC_DEBUG_CURRENT_VERSION
;
1491 p
.trigger_type
= PPC_BREAKPOINT_TRIGGER_EXECUTE
;
1492 p
.condition_mode
= PPC_BREAKPOINT_CONDITION_NONE
;
1493 p
.addr
= (uint64_t) (bp_tgt
->placed_address
= bp_tgt
->reqstd_address
);
1494 p
.condition_value
= 0;
1498 p
.addr_mode
= PPC_BREAKPOINT_MODE_RANGE_INCLUSIVE
;
1500 /* The breakpoint will trigger if the address of the instruction is
1501 within the defined range, as follows: p.addr <= address < p.addr2. */
1502 p
.addr2
= (uint64_t) bp_tgt
->placed_address
+ bp_tgt
->length
;
1506 p
.addr_mode
= PPC_BREAKPOINT_MODE_EXACT
;
1511 hwdebug_insert_point (&p
, ptid_get_lwp (lp
->ptid
));
1517 ppc_linux_nat_target::remove_hw_breakpoint (struct gdbarch
*gdbarch
,
1518 struct bp_target_info
*bp_tgt
)
1520 struct lwp_info
*lp
;
1521 struct ppc_hw_breakpoint p
;
1523 if (!have_ptrace_hwdebug_interface ())
1526 p
.version
= PPC_DEBUG_CURRENT_VERSION
;
1527 p
.trigger_type
= PPC_BREAKPOINT_TRIGGER_EXECUTE
;
1528 p
.condition_mode
= PPC_BREAKPOINT_CONDITION_NONE
;
1529 p
.addr
= (uint64_t) bp_tgt
->placed_address
;
1530 p
.condition_value
= 0;
1534 p
.addr_mode
= PPC_BREAKPOINT_MODE_RANGE_INCLUSIVE
;
1536 /* The breakpoint will trigger if the address of the instruction is within
1537 the defined range, as follows: p.addr <= address < p.addr2. */
1538 p
.addr2
= (uint64_t) bp_tgt
->placed_address
+ bp_tgt
->length
;
1542 p
.addr_mode
= PPC_BREAKPOINT_MODE_EXACT
;
1547 hwdebug_remove_point (&p
, ptid_get_lwp (lp
->ptid
));
1553 get_trigger_type (enum target_hw_bp_type type
)
1557 if (type
== hw_read
)
1558 t
= PPC_BREAKPOINT_TRIGGER_READ
;
1559 else if (type
== hw_write
)
1560 t
= PPC_BREAKPOINT_TRIGGER_WRITE
;
1562 t
= PPC_BREAKPOINT_TRIGGER_READ
| PPC_BREAKPOINT_TRIGGER_WRITE
;
1567 /* Insert a new masked watchpoint at ADDR using the mask MASK.
1568 RW may be hw_read for a read watchpoint, hw_write for a write watchpoint
1569 or hw_access for an access watchpoint. Returns 0 on success and throws
1570 an error on failure. */
1573 ppc_linux_nat_target::insert_mask_watchpoint (CORE_ADDR addr
, CORE_ADDR mask
,
1574 target_hw_bp_type rw
)
1576 struct lwp_info
*lp
;
1577 struct ppc_hw_breakpoint p
;
1579 gdb_assert (have_ptrace_hwdebug_interface ());
1581 p
.version
= PPC_DEBUG_CURRENT_VERSION
;
1582 p
.trigger_type
= get_trigger_type (rw
);
1583 p
.addr_mode
= PPC_BREAKPOINT_MODE_MASK
;
1584 p
.condition_mode
= PPC_BREAKPOINT_CONDITION_NONE
;
1587 p
.condition_value
= 0;
1590 hwdebug_insert_point (&p
, ptid_get_lwp (lp
->ptid
));
1595 /* Remove a masked watchpoint at ADDR with the mask MASK.
1596 RW may be hw_read for a read watchpoint, hw_write for a write watchpoint
1597 or hw_access for an access watchpoint. Returns 0 on success and throws
1598 an error on failure. */
1601 ppc_linux_nat_target::remove_mask_watchpoint (CORE_ADDR addr
, CORE_ADDR mask
,
1602 target_hw_bp_type rw
)
1604 struct lwp_info
*lp
;
1605 struct ppc_hw_breakpoint p
;
1607 gdb_assert (have_ptrace_hwdebug_interface ());
1609 p
.version
= PPC_DEBUG_CURRENT_VERSION
;
1610 p
.trigger_type
= get_trigger_type (rw
);
1611 p
.addr_mode
= PPC_BREAKPOINT_MODE_MASK
;
1612 p
.condition_mode
= PPC_BREAKPOINT_CONDITION_NONE
;
1615 p
.condition_value
= 0;
1618 hwdebug_remove_point (&p
, ptid_get_lwp (lp
->ptid
));
1623 /* Check whether we have at least one free DVC register. */
1625 can_use_watchpoint_cond_accel (void)
1627 struct thread_points
*p
;
1628 int tid
= ptid_get_lwp (inferior_ptid
);
1629 int cnt
= hwdebug_info
.num_condition_regs
, i
;
1630 CORE_ADDR tmp_value
;
1632 if (!have_ptrace_hwdebug_interface () || cnt
== 0)
1635 p
= hwdebug_find_thread_points_by_tid (tid
, 0);
1639 for (i
= 0; i
< max_slots_number
; i
++)
1640 if (p
->hw_breaks
[i
].hw_break
!= NULL
1641 && (p
->hw_breaks
[i
].hw_break
->condition_mode
1642 != PPC_BREAKPOINT_CONDITION_NONE
))
1645 /* There are no available slots now. */
1653 /* Calculate the enable bits and the contents of the Data Value Compare
1654 debug register present in BookE processors.
1656 ADDR is the address to be watched, LEN is the length of watched data
1657 and DATA_VALUE is the value which will trigger the watchpoint.
1658 On exit, CONDITION_MODE will hold the enable bits for the DVC, and
1659 CONDITION_VALUE will hold the value which should be put in the
1662 calculate_dvc (CORE_ADDR addr
, int len
, CORE_ADDR data_value
,
1663 uint32_t *condition_mode
, uint64_t *condition_value
)
1665 int i
, num_byte_enable
, align_offset
, num_bytes_off_dvc
,
1666 rightmost_enabled_byte
;
1667 CORE_ADDR addr_end_data
, addr_end_dvc
;
1669 /* The DVC register compares bytes within fixed-length windows which
1670 are word-aligned, with length equal to that of the DVC register.
1671 We need to calculate where our watch region is relative to that
1672 window and enable comparison of the bytes which fall within it. */
1674 align_offset
= addr
% hwdebug_info
.sizeof_condition
;
1675 addr_end_data
= addr
+ len
;
1676 addr_end_dvc
= (addr
- align_offset
1677 + hwdebug_info
.sizeof_condition
);
1678 num_bytes_off_dvc
= (addr_end_data
> addr_end_dvc
)?
1679 addr_end_data
- addr_end_dvc
: 0;
1680 num_byte_enable
= len
- num_bytes_off_dvc
;
1681 /* Here, bytes are numbered from right to left. */
1682 rightmost_enabled_byte
= (addr_end_data
< addr_end_dvc
)?
1683 addr_end_dvc
- addr_end_data
: 0;
1685 *condition_mode
= PPC_BREAKPOINT_CONDITION_AND
;
1686 for (i
= 0; i
< num_byte_enable
; i
++)
1688 |= PPC_BREAKPOINT_CONDITION_BE (i
+ rightmost_enabled_byte
);
1690 /* Now we need to match the position within the DVC of the comparison
1691 value with where the watch region is relative to the window
1692 (i.e., the ALIGN_OFFSET). */
1694 *condition_value
= ((uint64_t) data_value
>> num_bytes_off_dvc
* 8
1695 << rightmost_enabled_byte
* 8);
1698 /* Return the number of memory locations that need to be accessed to
1699 evaluate the expression which generated the given value chain.
1700 Returns -1 if there's any register access involved, or if there are
1701 other kinds of values which are not acceptable in a condition
1702 expression (e.g., lval_computed or lval_internalvar). */
1704 num_memory_accesses (const std::vector
<value_ref_ptr
> &chain
)
1706 int found_memory_cnt
= 0;
1708 /* The idea here is that evaluating an expression generates a series
1709 of values, one holding the value of every subexpression. (The
1710 expression a*b+c has five subexpressions: a, b, a*b, c, and
1711 a*b+c.) GDB's values hold almost enough information to establish
1712 the criteria given above --- they identify memory lvalues,
1713 register lvalues, computed values, etcetera. So we can evaluate
1714 the expression, and then scan the chain of values that leaves
1715 behind to determine the memory locations involved in the evaluation
1718 However, I don't think that the values returned by inferior
1719 function calls are special in any way. So this function may not
1720 notice that an expression contains an inferior function call.
1723 for (const value_ref_ptr
&iter
: chain
)
1725 struct value
*v
= iter
.get ();
1727 /* Constants and values from the history are fine. */
1728 if (VALUE_LVAL (v
) == not_lval
|| deprecated_value_modifiable (v
) == 0)
1730 else if (VALUE_LVAL (v
) == lval_memory
)
1732 /* A lazy memory lvalue is one that GDB never needed to fetch;
1733 we either just used its address (e.g., `a' in `a.b') or
1734 we never needed it at all (e.g., `a' in `a,b'). */
1735 if (!value_lazy (v
))
1738 /* Other kinds of values are not fine. */
1743 return found_memory_cnt
;
1746 /* Verifies whether the expression COND can be implemented using the
1747 DVC (Data Value Compare) register in BookE processors. The expression
1748 must test the watch value for equality with a constant expression.
1749 If the function returns 1, DATA_VALUE will contain the constant against
1750 which the watch value should be compared and LEN will contain the size
1753 check_condition (CORE_ADDR watch_addr
, struct expression
*cond
,
1754 CORE_ADDR
*data_value
, int *len
)
1756 int pc
= 1, num_accesses_left
, num_accesses_right
;
1757 struct value
*left_val
, *right_val
;
1758 std::vector
<value_ref_ptr
> left_chain
, right_chain
;
1760 if (cond
->elts
[0].opcode
!= BINOP_EQUAL
)
1763 fetch_subexp_value (cond
, &pc
, &left_val
, NULL
, &left_chain
, 0);
1764 num_accesses_left
= num_memory_accesses (left_chain
);
1766 if (left_val
== NULL
|| num_accesses_left
< 0)
1769 fetch_subexp_value (cond
, &pc
, &right_val
, NULL
, &right_chain
, 0);
1770 num_accesses_right
= num_memory_accesses (right_chain
);
1772 if (right_val
== NULL
|| num_accesses_right
< 0)
1775 if (num_accesses_left
== 1 && num_accesses_right
== 0
1776 && VALUE_LVAL (left_val
) == lval_memory
1777 && value_address (left_val
) == watch_addr
)
1779 *data_value
= value_as_long (right_val
);
1781 /* DATA_VALUE is the constant in RIGHT_VAL, but actually has
1782 the same type as the memory region referenced by LEFT_VAL. */
1783 *len
= TYPE_LENGTH (check_typedef (value_type (left_val
)));
1785 else if (num_accesses_left
== 0 && num_accesses_right
== 1
1786 && VALUE_LVAL (right_val
) == lval_memory
1787 && value_address (right_val
) == watch_addr
)
1789 *data_value
= value_as_long (left_val
);
1791 /* DATA_VALUE is the constant in LEFT_VAL, but actually has
1792 the same type as the memory region referenced by RIGHT_VAL. */
1793 *len
= TYPE_LENGTH (check_typedef (value_type (right_val
)));
1801 /* Return non-zero if the target is capable of using hardware to evaluate
1802 the condition expression, thus only triggering the watchpoint when it is
1805 ppc_linux_nat_target::can_accel_watchpoint_condition (CORE_ADDR addr
, int len
,
1807 struct expression
*cond
)
1809 CORE_ADDR data_value
;
1811 return (have_ptrace_hwdebug_interface ()
1812 && hwdebug_info
.num_condition_regs
> 0
1813 && check_condition (addr
, cond
, &data_value
, &len
));
1816 /* Set up P with the parameters necessary to request a watchpoint covering
1817 LEN bytes starting at ADDR and if possible with condition expression COND
1818 evaluated by hardware. INSERT tells if we are creating a request for
1819 inserting or removing the watchpoint. */
1822 create_watchpoint_request (struct ppc_hw_breakpoint
*p
, CORE_ADDR addr
,
1823 int len
, enum target_hw_bp_type type
,
1824 struct expression
*cond
, int insert
)
1827 || !(hwdebug_info
.features
& PPC_DEBUG_FEATURE_DATA_BP_RANGE
))
1830 CORE_ADDR data_value
;
1832 use_condition
= (insert
? can_use_watchpoint_cond_accel ()
1833 : hwdebug_info
.num_condition_regs
> 0);
1834 if (cond
&& use_condition
&& check_condition (addr
, cond
,
1836 calculate_dvc (addr
, len
, data_value
, &p
->condition_mode
,
1837 &p
->condition_value
);
1840 p
->condition_mode
= PPC_BREAKPOINT_CONDITION_NONE
;
1841 p
->condition_value
= 0;
1844 p
->addr_mode
= PPC_BREAKPOINT_MODE_EXACT
;
1849 p
->addr_mode
= PPC_BREAKPOINT_MODE_RANGE_INCLUSIVE
;
1850 p
->condition_mode
= PPC_BREAKPOINT_CONDITION_NONE
;
1851 p
->condition_value
= 0;
1853 /* The watchpoint will trigger if the address of the memory access is
1854 within the defined range, as follows: p->addr <= address < p->addr2.
1856 Note that the above sentence just documents how ptrace interprets
1857 its arguments; the watchpoint is set to watch the range defined by
1858 the user _inclusively_, as specified by the user interface. */
1859 p
->addr2
= (uint64_t) addr
+ len
;
1862 p
->version
= PPC_DEBUG_CURRENT_VERSION
;
1863 p
->trigger_type
= get_trigger_type (type
);
1864 p
->addr
= (uint64_t) addr
;
1868 ppc_linux_nat_target::insert_watchpoint (CORE_ADDR addr
, int len
,
1869 enum target_hw_bp_type type
,
1870 struct expression
*cond
)
1872 struct lwp_info
*lp
;
1875 if (have_ptrace_hwdebug_interface ())
1877 struct ppc_hw_breakpoint p
;
1879 create_watchpoint_request (&p
, addr
, len
, type
, cond
, 1);
1882 hwdebug_insert_point (&p
, ptid_get_lwp (lp
->ptid
));
1889 long read_mode
, write_mode
;
1891 if (ppc_linux_get_hwcap () & PPC_FEATURE_BOOKE
)
1893 /* PowerPC 440 requires only the read/write flags to be passed
1900 /* PowerPC 970 and other DABR-based processors are required to pass
1901 the Breakpoint Translation bit together with the flags. */
1906 dabr_value
= addr
& ~(read_mode
| write_mode
);
1910 /* Set read and translate bits. */
1911 dabr_value
|= read_mode
;
1914 /* Set write and translate bits. */
1915 dabr_value
|= write_mode
;
1918 /* Set read, write and translate bits. */
1919 dabr_value
|= read_mode
| write_mode
;
1923 saved_dabr_value
= dabr_value
;
1926 if (ptrace (PTRACE_SET_DEBUGREG
, ptid_get_lwp (lp
->ptid
), 0,
1927 saved_dabr_value
) < 0)
1937 ppc_linux_nat_target::remove_watchpoint (CORE_ADDR addr
, int len
,
1938 enum target_hw_bp_type type
,
1939 struct expression
*cond
)
1941 struct lwp_info
*lp
;
1944 if (have_ptrace_hwdebug_interface ())
1946 struct ppc_hw_breakpoint p
;
1948 create_watchpoint_request (&p
, addr
, len
, type
, cond
, 0);
1951 hwdebug_remove_point (&p
, ptid_get_lwp (lp
->ptid
));
1957 saved_dabr_value
= 0;
1959 if (ptrace (PTRACE_SET_DEBUGREG
, ptid_get_lwp (lp
->ptid
), 0,
1960 saved_dabr_value
) < 0)
1970 ppc_linux_nat_target::low_new_thread (struct lwp_info
*lp
)
1972 int tid
= ptid_get_lwp (lp
->ptid
);
1974 if (have_ptrace_hwdebug_interface ())
1977 struct thread_points
*p
;
1978 struct hw_break_tuple
*hw_breaks
;
1980 if (VEC_empty (thread_points_p
, ppc_threads
))
1983 /* Get a list of breakpoints from any thread. */
1984 p
= VEC_last (thread_points_p
, ppc_threads
);
1985 hw_breaks
= p
->hw_breaks
;
1987 /* Copy that thread's breakpoints and watchpoints to the new thread. */
1988 for (i
= 0; i
< max_slots_number
; i
++)
1989 if (hw_breaks
[i
].hw_break
)
1991 /* Older kernels did not make new threads inherit their parent
1992 thread's debug state, so we always clear the slot and replicate
1993 the debug state ourselves, ensuring compatibility with all
1996 /* The ppc debug resource accounting is done through "slots".
1997 Ask the kernel the deallocate this specific *point's slot. */
1998 ptrace (PPC_PTRACE_DELHWDEBUG
, tid
, 0, hw_breaks
[i
].slot
);
2000 hwdebug_insert_point (hw_breaks
[i
].hw_break
, tid
);
2004 ptrace (PTRACE_SET_DEBUGREG
, tid
, 0, saved_dabr_value
);
2008 ppc_linux_thread_exit (struct thread_info
*tp
, int silent
)
2011 int tid
= ptid_get_lwp (tp
->ptid
);
2012 struct hw_break_tuple
*hw_breaks
;
2013 struct thread_points
*t
= NULL
, *p
;
2015 if (!have_ptrace_hwdebug_interface ())
2018 for (i
= 0; VEC_iterate (thread_points_p
, ppc_threads
, i
, p
); i
++)
2028 VEC_unordered_remove (thread_points_p
, ppc_threads
, i
);
2030 hw_breaks
= t
->hw_breaks
;
2032 for (i
= 0; i
< max_slots_number
; i
++)
2033 if (hw_breaks
[i
].hw_break
)
2034 xfree (hw_breaks
[i
].hw_break
);
2036 xfree (t
->hw_breaks
);
2041 ppc_linux_nat_target::stopped_data_address (CORE_ADDR
*addr_p
)
2045 if (!linux_nat_get_siginfo (inferior_ptid
, &siginfo
))
2048 if (siginfo
.si_signo
!= SIGTRAP
2049 || (siginfo
.si_code
& 0xffff) != 0x0004 /* TRAP_HWBKPT */)
2052 if (have_ptrace_hwdebug_interface ())
2055 struct thread_points
*t
;
2056 struct hw_break_tuple
*hw_breaks
;
2057 /* The index (or slot) of the *point is passed in the si_errno field. */
2058 int slot
= siginfo
.si_errno
;
2060 t
= hwdebug_find_thread_points_by_tid (ptid_get_lwp (inferior_ptid
), 0);
2062 /* Find out if this *point is a hardware breakpoint.
2063 If so, we should return 0. */
2066 hw_breaks
= t
->hw_breaks
;
2067 for (i
= 0; i
< max_slots_number
; i
++)
2068 if (hw_breaks
[i
].hw_break
&& hw_breaks
[i
].slot
== slot
2069 && hw_breaks
[i
].hw_break
->trigger_type
2070 == PPC_BREAKPOINT_TRIGGER_EXECUTE
)
2075 *addr_p
= (CORE_ADDR
) (uintptr_t) siginfo
.si_addr
;
2080 ppc_linux_nat_target::stopped_by_watchpoint ()
2083 return stopped_data_address (&addr
);
2087 ppc_linux_nat_target::watchpoint_addr_within_range (CORE_ADDR addr
,
2093 if (have_ptrace_hwdebug_interface ()
2094 && ppc_linux_get_hwcap () & PPC_FEATURE_BOOKE
)
2095 return start
<= addr
&& start
+ length
>= addr
;
2096 else if (ppc_linux_get_hwcap () & PPC_FEATURE_BOOKE
)
2103 /* Check whether [start, start+length-1] intersects [addr, addr+mask]. */
2104 return start
<= addr
+ mask
&& start
+ length
- 1 >= addr
;
2107 /* Return the number of registers needed for a masked hardware watchpoint. */
2110 ppc_linux_nat_target::masked_watch_num_registers (CORE_ADDR addr
, CORE_ADDR mask
)
2112 if (!have_ptrace_hwdebug_interface ()
2113 || (hwdebug_info
.features
& PPC_DEBUG_FEATURE_DATA_BP_MASK
) == 0)
2115 else if ((mask
& 0xC0000000) != 0xC0000000)
2117 warning (_("The given mask covers kernel address space "
2118 "and cannot be used.\n"));
2127 ppc_linux_nat_target::store_registers (struct regcache
*regcache
, int regno
)
2129 pid_t tid
= get_ptrace_pid (regcache
->ptid ());
2132 store_register (regcache
, tid
, regno
);
2134 store_ppc_registers (regcache
, tid
);
2137 /* Functions for transferring registers between a gregset_t or fpregset_t
2138 (see sys/ucontext.h) and gdb's regcache. The word size is that used
2139 by the ptrace interface, not the current program's ABI. Eg. if a
2140 powerpc64-linux gdb is being used to debug a powerpc32-linux app, we
2141 read or write 64-bit gregsets. This is to suit the host libthread_db. */
2144 supply_gregset (struct regcache
*regcache
, const gdb_gregset_t
*gregsetp
)
2146 const struct regset
*regset
= ppc_linux_gregset (sizeof (long));
2148 ppc_supply_gregset (regset
, regcache
, -1, gregsetp
, sizeof (*gregsetp
));
2152 fill_gregset (const struct regcache
*regcache
,
2153 gdb_gregset_t
*gregsetp
, int regno
)
2155 const struct regset
*regset
= ppc_linux_gregset (sizeof (long));
2158 memset (gregsetp
, 0, sizeof (*gregsetp
));
2159 ppc_collect_gregset (regset
, regcache
, regno
, gregsetp
, sizeof (*gregsetp
));
2163 supply_fpregset (struct regcache
*regcache
, const gdb_fpregset_t
* fpregsetp
)
2165 const struct regset
*regset
= ppc_linux_fpregset ();
2167 ppc_supply_fpregset (regset
, regcache
, -1,
2168 fpregsetp
, sizeof (*fpregsetp
));
2172 fill_fpregset (const struct regcache
*regcache
,
2173 gdb_fpregset_t
*fpregsetp
, int regno
)
2175 const struct regset
*regset
= ppc_linux_fpregset ();
2177 ppc_collect_fpregset (regset
, regcache
, regno
,
2178 fpregsetp
, sizeof (*fpregsetp
));
2182 ppc_linux_nat_target::auxv_parse (gdb_byte
**readptr
,
2183 gdb_byte
*endptr
, CORE_ADDR
*typep
,
2186 int tid
= ptid_get_lwp (inferior_ptid
);
2188 tid
= inferior_ptid
.pid ();
2190 int sizeof_auxv_field
= ppc_linux_target_wordsize (tid
);
2192 enum bfd_endian byte_order
= gdbarch_byte_order (target_gdbarch ());
2193 gdb_byte
*ptr
= *readptr
;
2198 if (endptr
- ptr
< sizeof_auxv_field
* 2)
2201 *typep
= extract_unsigned_integer (ptr
, sizeof_auxv_field
, byte_order
);
2202 ptr
+= sizeof_auxv_field
;
2203 *valp
= extract_unsigned_integer (ptr
, sizeof_auxv_field
, byte_order
);
2204 ptr
+= sizeof_auxv_field
;
2210 const struct target_desc
*
2211 ppc_linux_nat_target::read_description ()
2213 int tid
= ptid_get_lwp (inferior_ptid
);
2215 tid
= inferior_ptid
.pid ();
2217 if (have_ptrace_getsetevrregs
)
2219 struct gdb_evrregset_t evrregset
;
2221 if (ptrace (PTRACE_GETEVRREGS
, tid
, 0, &evrregset
) >= 0)
2222 return tdesc_powerpc_e500l
;
2224 /* EIO means that the PTRACE_GETEVRREGS request isn't supported.
2225 Anything else needs to be reported. */
2226 else if (errno
!= EIO
)
2227 perror_with_name (_("Unable to fetch SPE registers"));
2230 struct ppc_linux_features features
= ppc_linux_no_features
;
2232 features
.wordsize
= ppc_linux_target_wordsize (tid
);
2234 CORE_ADDR hwcap
= ppc_linux_get_hwcap ();
2236 if (have_ptrace_getsetvsxregs
2237 && (hwcap
& PPC_FEATURE_HAS_VSX
))
2239 gdb_vsxregset_t vsxregset
;
2241 if (ptrace (PTRACE_GETVSXREGS
, tid
, 0, &vsxregset
) >= 0)
2242 features
.vsx
= true;
2244 /* EIO means that the PTRACE_GETVSXREGS request isn't supported.
2245 Anything else needs to be reported. */
2246 else if (errno
!= EIO
)
2247 perror_with_name (_("Unable to fetch VSX registers"));
2250 if (have_ptrace_getvrregs
2251 && (hwcap
& PPC_FEATURE_HAS_ALTIVEC
))
2253 gdb_vrregset_t vrregset
;
2255 if (ptrace (PTRACE_GETVRREGS
, tid
, 0, &vrregset
) >= 0)
2256 features
.altivec
= true;
2258 /* EIO means that the PTRACE_GETVRREGS request isn't supported.
2259 Anything else needs to be reported. */
2260 else if (errno
!= EIO
)
2261 perror_with_name (_("Unable to fetch AltiVec registers"));
2264 if (hwcap
& PPC_FEATURE_CELL
)
2265 features
.cell
= true;
2267 features
.isa205
= ppc_linux_has_isa205 (hwcap
);
2269 return ppc_linux_match_description (features
);
2273 _initialize_ppc_linux_nat (void)
2275 linux_target
= &the_ppc_linux_nat_target
;
2277 gdb::observers::thread_exit
.attach (ppc_linux_thread_exit
);
2279 /* Register the target. */
2280 add_inf_child_target (linux_target
);