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1 /* PPC GNU/Linux native support.
2
3 Copyright 1988, 1989, 1991, 1992, 1994, 1996, 2000, 2001, 2002,
4 2003 Free Software Foundation, Inc.
5
6 This file is part of GDB.
7
8 This program is free software; you can redistribute it and/or modify
9 it under the terms of the GNU General Public License as published by
10 the Free Software Foundation; either version 2 of the License, or
11 (at your option) any later version.
12
13 This program is distributed in the hope that it will be useful,
14 but WITHOUT ANY WARRANTY; without even the implied warranty of
15 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 GNU General Public License for more details.
17
18 You should have received a copy of the GNU General Public License
19 along with this program; if not, write to the Free Software
20 Foundation, Inc., 59 Temple Place - Suite 330,
21 Boston, MA 02111-1307, USA. */
22
23 #include "defs.h"
24 #include "gdb_string.h"
25 #include "frame.h"
26 #include "inferior.h"
27 #include "gdbcore.h"
28 #include "regcache.h"
29
30 #include <sys/types.h>
31 #include <sys/param.h>
32 #include <signal.h>
33 #include <sys/user.h>
34 #include <sys/ioctl.h>
35 #include "gdb_wait.h"
36 #include <fcntl.h>
37 #include <sys/procfs.h>
38 #include <sys/ptrace.h>
39
40 /* Prototypes for supply_gregset etc. */
41 #include "gregset.h"
42 #include "ppc-tdep.h"
43
44 #ifndef PT_READ_U
45 #define PT_READ_U PTRACE_PEEKUSR
46 #endif
47 #ifndef PT_WRITE_U
48 #define PT_WRITE_U PTRACE_POKEUSR
49 #endif
50
51 /* Default the type of the ptrace transfer to int. */
52 #ifndef PTRACE_XFER_TYPE
53 #define PTRACE_XFER_TYPE int
54 #endif
55
56 /* Glibc's headers don't define PTRACE_GETVRREGS so we cannot use a
57 configure time check. Some older glibc's (for instance 2.2.1)
58 don't have a specific powerpc version of ptrace.h, and fall back on
59 a generic one. In such cases, sys/ptrace.h defines
60 PTRACE_GETFPXREGS and PTRACE_SETFPXREGS to the same numbers that
61 ppc kernel's asm/ptrace.h defines PTRACE_GETVRREGS and
62 PTRACE_SETVRREGS to be. This also makes a configury check pretty
63 much useless. */
64
65 /* These definitions should really come from the glibc header files,
66 but Glibc doesn't know about the vrregs yet. */
67 #ifndef PTRACE_GETVRREGS
68 #define PTRACE_GETVRREGS 18
69 #define PTRACE_SETVRREGS 19
70 #endif
71
72 /* This oddity is because the Linux kernel defines elf_vrregset_t as
73 an array of 33 16 bytes long elements. I.e. it leaves out vrsave.
74 However the PTRACE_GETVRREGS and PTRACE_SETVRREGS requests return
75 the vrsave as an extra 4 bytes at the end. I opted for creating a
76 flat array of chars, so that it is easier to manipulate for gdb.
77
78 There are 32 vector registers 16 bytes longs, plus a VSCR register
79 which is only 4 bytes long, but is fetched as a 16 bytes
80 quantity. Up to here we have the elf_vrregset_t structure.
81 Appended to this there is space for the VRSAVE register: 4 bytes.
82 Even though this vrsave register is not included in the regset
83 typedef, it is handled by the ptrace requests.
84
85 Note that GNU/Linux doesn't support little endian PPC hardware,
86 therefore the offset at which the real value of the VSCR register
87 is located will be always 12 bytes.
88
89 The layout is like this (where x is the actual value of the vscr reg): */
90
91 /* *INDENT-OFF* */
92 /*
93 |.|.|.|.|.....|.|.|.|.||.|.|.|x||.|
94 <-------> <-------><-------><->
95 VR0 VR31 VSCR VRSAVE
96 */
97 /* *INDENT-ON* */
98
99 #define SIZEOF_VRREGS 33*16+4
100
101 typedef char gdb_vrregset_t[SIZEOF_VRREGS];
102
103 /* For runtime check of ptrace support for VRREGS. */
104 int have_ptrace_getvrregs = 1;
105
106 int
107 kernel_u_size (void)
108 {
109 return (sizeof (struct user));
110 }
111
112 /* *INDENT-OFF* */
113 /* registers layout, as presented by the ptrace interface:
114 PT_R0, PT_R1, PT_R2, PT_R3, PT_R4, PT_R5, PT_R6, PT_R7,
115 PT_R8, PT_R9, PT_R10, PT_R11, PT_R12, PT_R13, PT_R14, PT_R15,
116 PT_R16, PT_R17, PT_R18, PT_R19, PT_R20, PT_R21, PT_R22, PT_R23,
117 PT_R24, PT_R25, PT_R26, PT_R27, PT_R28, PT_R29, PT_R30, PT_R31,
118 PT_FPR0, PT_FPR0 + 2, PT_FPR0 + 4, PT_FPR0 + 6, PT_FPR0 + 8, PT_FPR0 + 10, PT_FPR0 + 12, PT_FPR0 + 14,
119 PT_FPR0 + 16, PT_FPR0 + 18, PT_FPR0 + 20, PT_FPR0 + 22, PT_FPR0 + 24, PT_FPR0 + 26, PT_FPR0 + 28, PT_FPR0 + 30,
120 PT_FPR0 + 32, PT_FPR0 + 34, PT_FPR0 + 36, PT_FPR0 + 38, PT_FPR0 + 40, PT_FPR0 + 42, PT_FPR0 + 44, PT_FPR0 + 46,
121 PT_FPR0 + 48, PT_FPR0 + 50, PT_FPR0 + 52, PT_FPR0 + 54, PT_FPR0 + 56, PT_FPR0 + 58, PT_FPR0 + 60, PT_FPR0 + 62,
122 PT_NIP, PT_MSR, PT_CCR, PT_LNK, PT_CTR, PT_XER, PT_MQ */
123 /* *INDENT_ON * */
124
125 static int
126 ppc_register_u_addr (int regno)
127 {
128 int u_addr = -1;
129 struct gdbarch_tdep *tdep = gdbarch_tdep (current_gdbarch);
130
131 /* General purpose registers occupy 1 slot each in the buffer */
132 if (regno >= tdep->ppc_gp0_regnum && regno <= tdep->ppc_gplast_regnum )
133 u_addr = ((PT_R0 + regno) * 4);
134
135 /* Floating point regs: 2 slots each */
136 if (regno >= FP0_REGNUM && regno <= FPLAST_REGNUM)
137 u_addr = ((PT_FPR0 + (regno - FP0_REGNUM) * 2) * 4);
138
139 /* UISA special purpose registers: 1 slot each */
140 if (regno == PC_REGNUM)
141 u_addr = PT_NIP * 4;
142 if (regno == tdep->ppc_lr_regnum)
143 u_addr = PT_LNK * 4;
144 if (regno == tdep->ppc_cr_regnum)
145 u_addr = PT_CCR * 4;
146 if (regno == tdep->ppc_xer_regnum)
147 u_addr = PT_XER * 4;
148 if (regno == tdep->ppc_ctr_regnum)
149 u_addr = PT_CTR * 4;
150 if (regno == tdep->ppc_mq_regnum)
151 u_addr = PT_MQ * 4;
152 if (regno == tdep->ppc_ps_regnum)
153 u_addr = PT_MSR * 4;
154 if (regno == tdep->ppc_fpscr_regnum)
155 u_addr = PT_FPSCR * 4;
156
157 return u_addr;
158 }
159
160 static int
161 ppc_ptrace_cannot_fetch_store_register (int regno)
162 {
163 return (ppc_register_u_addr (regno) == -1);
164 }
165
166 /* The Linux kernel ptrace interface for AltiVec registers uses the
167 registers set mechanism, as opposed to the interface for all the
168 other registers, that stores/fetches each register individually. */
169 static void
170 fetch_altivec_register (int tid, int regno)
171 {
172 int ret;
173 int offset = 0;
174 gdb_vrregset_t regs;
175 struct gdbarch_tdep *tdep = gdbarch_tdep (current_gdbarch);
176 int vrregsize = REGISTER_RAW_SIZE (tdep->ppc_vr0_regnum);
177
178 ret = ptrace (PTRACE_GETVRREGS, tid, 0, &regs);
179 if (ret < 0)
180 {
181 if (errno == EIO)
182 {
183 have_ptrace_getvrregs = 0;
184 return;
185 }
186 perror_with_name ("Unable to fetch AltiVec register");
187 }
188
189 /* VSCR is fetched as a 16 bytes quantity, but it is really 4 bytes
190 long on the hardware. We deal only with the lower 4 bytes of the
191 vector. VRSAVE is at the end of the array in a 4 bytes slot, so
192 there is no need to define an offset for it. */
193 if (regno == (tdep->ppc_vrsave_regnum - 1))
194 offset = vrregsize - REGISTER_RAW_SIZE (tdep->ppc_vrsave_regnum);
195
196 supply_register (regno,
197 regs + (regno - tdep->ppc_vr0_regnum) * vrregsize + offset);
198 }
199
200 static void
201 fetch_register (int tid, int regno)
202 {
203 /* This isn't really an address. But ptrace thinks of it as one. */
204 char mess[128]; /* For messages */
205 register int i;
206 unsigned int offset; /* Offset of registers within the u area. */
207 char buf[MAX_REGISTER_SIZE];
208 CORE_ADDR regaddr = ppc_register_u_addr (regno);
209
210 if (altivec_register_p (regno))
211 {
212 /* If this is the first time through, or if it is not the first
213 time through, and we have comfirmed that there is kernel
214 support for such a ptrace request, then go and fetch the
215 register. */
216 if (have_ptrace_getvrregs)
217 {
218 fetch_altivec_register (tid, regno);
219 return;
220 }
221 /* If we have discovered that there is no ptrace support for
222 AltiVec registers, fall through and return zeroes, because
223 regaddr will be -1 in this case. */
224 }
225
226 if (regaddr == -1)
227 {
228 memset (buf, '\0', REGISTER_RAW_SIZE (regno)); /* Supply zeroes */
229 supply_register (regno, buf);
230 return;
231 }
232
233 for (i = 0; i < REGISTER_RAW_SIZE (regno); i += sizeof (PTRACE_XFER_TYPE))
234 {
235 errno = 0;
236 *(PTRACE_XFER_TYPE *) & buf[i] = ptrace (PT_READ_U, tid,
237 (PTRACE_ARG3_TYPE) regaddr, 0);
238 regaddr += sizeof (PTRACE_XFER_TYPE);
239 if (errno != 0)
240 {
241 sprintf (mess, "reading register %s (#%d)",
242 REGISTER_NAME (regno), regno);
243 perror_with_name (mess);
244 }
245 }
246 supply_register (regno, buf);
247 }
248
249 static void
250 supply_vrregset (gdb_vrregset_t *vrregsetp)
251 {
252 int i;
253 struct gdbarch_tdep *tdep = gdbarch_tdep (current_gdbarch);
254 int num_of_vrregs = tdep->ppc_vrsave_regnum - tdep->ppc_vr0_regnum + 1;
255 int vrregsize = REGISTER_RAW_SIZE (tdep->ppc_vr0_regnum);
256 int offset = vrregsize - REGISTER_RAW_SIZE (tdep->ppc_vrsave_regnum);
257
258 for (i = 0; i < num_of_vrregs; i++)
259 {
260 /* The last 2 registers of this set are only 32 bit long, not
261 128. However an offset is necessary only for VSCR because it
262 occupies a whole vector, while VRSAVE occupies a full 4 bytes
263 slot. */
264 if (i == (num_of_vrregs - 2))
265 supply_register (tdep->ppc_vr0_regnum + i,
266 *vrregsetp + i * vrregsize + offset);
267 else
268 supply_register (tdep->ppc_vr0_regnum + i, *vrregsetp + i * vrregsize);
269 }
270 }
271
272 static void
273 fetch_altivec_registers (int tid)
274 {
275 int ret;
276 gdb_vrregset_t regs;
277
278 ret = ptrace (PTRACE_GETVRREGS, tid, 0, &regs);
279 if (ret < 0)
280 {
281 if (errno == EIO)
282 {
283 have_ptrace_getvrregs = 0;
284 return;
285 }
286 perror_with_name ("Unable to fetch AltiVec registers");
287 }
288 supply_vrregset (&regs);
289 }
290
291 static void
292 fetch_ppc_registers (int tid)
293 {
294 int i;
295 struct gdbarch_tdep *tdep = gdbarch_tdep (current_gdbarch);
296
297 for (i = 0; i <= tdep->ppc_fpscr_regnum; i++)
298 fetch_register (tid, i);
299 if (tdep->ppc_mq_regnum != -1)
300 fetch_register (tid, tdep->ppc_mq_regnum);
301 if (have_ptrace_getvrregs)
302 if (tdep->ppc_vr0_regnum != -1 && tdep->ppc_vrsave_regnum != -1)
303 fetch_altivec_registers (tid);
304 }
305
306 /* Fetch registers from the child process. Fetch all registers if
307 regno == -1, otherwise fetch all general registers or all floating
308 point registers depending upon the value of regno. */
309 void
310 fetch_inferior_registers (int regno)
311 {
312 /* Overload thread id onto process id */
313 int tid = TIDGET (inferior_ptid);
314
315 /* No thread id, just use process id */
316 if (tid == 0)
317 tid = PIDGET (inferior_ptid);
318
319 if (regno == -1)
320 fetch_ppc_registers (tid);
321 else
322 fetch_register (tid, regno);
323 }
324
325 /* Store one register. */
326 static void
327 store_altivec_register (int tid, int regno)
328 {
329 int ret;
330 int offset = 0;
331 gdb_vrregset_t regs;
332 struct gdbarch_tdep *tdep = gdbarch_tdep (current_gdbarch);
333 int vrregsize = REGISTER_RAW_SIZE (tdep->ppc_vr0_regnum);
334
335 ret = ptrace (PTRACE_GETVRREGS, tid, 0, &regs);
336 if (ret < 0)
337 {
338 if (errno == EIO)
339 {
340 have_ptrace_getvrregs = 0;
341 return;
342 }
343 perror_with_name ("Unable to fetch AltiVec register");
344 }
345
346 /* VSCR is fetched as a 16 bytes quantity, but it is really 4 bytes
347 long on the hardware. */
348 if (regno == (tdep->ppc_vrsave_regnum - 1))
349 offset = vrregsize - REGISTER_RAW_SIZE (tdep->ppc_vrsave_regnum);
350
351 regcache_collect (regno,
352 regs + (regno - tdep->ppc_vr0_regnum) * vrregsize + offset);
353
354 ret = ptrace (PTRACE_SETVRREGS, tid, 0, &regs);
355 if (ret < 0)
356 perror_with_name ("Unable to store AltiVec register");
357 }
358
359 static void
360 store_register (int tid, int regno)
361 {
362 /* This isn't really an address. But ptrace thinks of it as one. */
363 CORE_ADDR regaddr = ppc_register_u_addr (regno);
364 char mess[128]; /* For messages */
365 register int i;
366 unsigned int offset; /* Offset of registers within the u area. */
367 char buf[MAX_REGISTER_SIZE];
368
369 if (altivec_register_p (regno))
370 {
371 store_altivec_register (tid, regno);
372 return;
373 }
374
375 if (regaddr == -1)
376 return;
377
378 regcache_collect (regno, buf);
379 for (i = 0; i < REGISTER_RAW_SIZE (regno); i += sizeof (PTRACE_XFER_TYPE))
380 {
381 errno = 0;
382 ptrace (PT_WRITE_U, tid, (PTRACE_ARG3_TYPE) regaddr,
383 *(PTRACE_XFER_TYPE *) & buf[i]);
384 regaddr += sizeof (PTRACE_XFER_TYPE);
385
386 if (errno == EIO
387 && regno == gdbarch_tdep (current_gdbarch)->ppc_fpscr_regnum)
388 {
389 /* Some older kernel versions don't allow fpscr to be written. */
390 continue;
391 }
392
393 if (errno != 0)
394 {
395 sprintf (mess, "writing register %s (#%d)",
396 REGISTER_NAME (regno), regno);
397 perror_with_name (mess);
398 }
399 }
400 }
401
402 static void
403 fill_vrregset (gdb_vrregset_t *vrregsetp)
404 {
405 int i;
406 struct gdbarch_tdep *tdep = gdbarch_tdep (current_gdbarch);
407 int num_of_vrregs = tdep->ppc_vrsave_regnum - tdep->ppc_vr0_regnum + 1;
408 int vrregsize = REGISTER_RAW_SIZE (tdep->ppc_vr0_regnum);
409 int offset = vrregsize - REGISTER_RAW_SIZE (tdep->ppc_vrsave_regnum);
410
411 for (i = 0; i < num_of_vrregs; i++)
412 {
413 /* The last 2 registers of this set are only 32 bit long, not
414 128, but only VSCR is fetched as a 16 bytes quantity. */
415 if (i == (num_of_vrregs - 2))
416 regcache_collect (tdep->ppc_vr0_regnum + i,
417 *vrregsetp + i * vrregsize + offset);
418 else
419 regcache_collect (tdep->ppc_vr0_regnum + i, *vrregsetp + i * vrregsize);
420 }
421 }
422
423 static void
424 store_altivec_registers (int tid)
425 {
426 int ret;
427 gdb_vrregset_t regs;
428
429 ret = ptrace (PTRACE_GETVRREGS, tid, 0, &regs);
430 if (ret < 0)
431 {
432 if (errno == EIO)
433 {
434 have_ptrace_getvrregs = 0;
435 return;
436 }
437 perror_with_name ("Couldn't get AltiVec registers");
438 }
439
440 fill_vrregset (&regs);
441
442 if (ptrace (PTRACE_SETVRREGS, tid, 0, &regs) < 0)
443 perror_with_name ("Couldn't write AltiVec registers");
444 }
445
446 static void
447 store_ppc_registers (int tid)
448 {
449 int i;
450 struct gdbarch_tdep *tdep = gdbarch_tdep (current_gdbarch);
451
452 for (i = 0; i <= tdep->ppc_fpscr_regnum; i++)
453 store_register (tid, i);
454 if (tdep->ppc_mq_regnum != -1)
455 store_register (tid, tdep->ppc_mq_regnum);
456 if (have_ptrace_getvrregs)
457 if (tdep->ppc_vr0_regnum != -1 && tdep->ppc_vrsave_regnum != -1)
458 store_altivec_registers (tid);
459 }
460
461 void
462 store_inferior_registers (int regno)
463 {
464 /* Overload thread id onto process id */
465 int tid = TIDGET (inferior_ptid);
466
467 /* No thread id, just use process id */
468 if (tid == 0)
469 tid = PIDGET (inferior_ptid);
470
471 if (regno >= 0)
472 store_register (tid, regno);
473 else
474 store_ppc_registers (tid);
475 }
476
477 void
478 supply_gregset (gdb_gregset_t *gregsetp)
479 {
480 ppc_linux_supply_gregset ((char *) gregsetp);
481 }
482
483 void
484 fill_gregset (gdb_gregset_t *gregsetp, int regno)
485 {
486 int regi;
487 elf_greg_t *regp = (elf_greg_t *) gregsetp;
488 struct gdbarch_tdep *tdep = gdbarch_tdep (current_gdbarch);
489
490 for (regi = 0; regi < 32; regi++)
491 {
492 if ((regno == -1) || regno == regi)
493 regcache_collect (regi, regp + PT_R0 + regi);
494 }
495
496 if ((regno == -1) || regno == PC_REGNUM)
497 regcache_collect (PC_REGNUM, regp + PT_NIP);
498 if ((regno == -1) || regno == tdep->ppc_lr_regnum)
499 regcache_collect (tdep->ppc_lr_regnum, regp + PT_LNK);
500 if ((regno == -1) || regno == tdep->ppc_cr_regnum)
501 regcache_collect (tdep->ppc_cr_regnum, regp + PT_CCR);
502 if ((regno == -1) || regno == tdep->ppc_xer_regnum)
503 regcache_collect (tdep->ppc_xer_regnum, regp + PT_XER);
504 if ((regno == -1) || regno == tdep->ppc_ctr_regnum)
505 regcache_collect (tdep->ppc_ctr_regnum, regp + PT_CTR);
506 if (((regno == -1) || regno == tdep->ppc_mq_regnum)
507 && (tdep->ppc_mq_regnum != -1))
508 regcache_collect (tdep->ppc_mq_regnum, regp + PT_MQ);
509 if ((regno == -1) || regno == tdep->ppc_ps_regnum)
510 regcache_collect (tdep->ppc_ps_regnum, regp + PT_MSR);
511 }
512
513 void
514 supply_fpregset (gdb_fpregset_t * fpregsetp)
515 {
516 ppc_linux_supply_fpregset ((char *) fpregsetp);
517 }
518
519 /* Given a pointer to a floating point register set in /proc format
520 (fpregset_t *), update the register specified by REGNO from gdb's
521 idea of the current floating point register set. If REGNO is -1,
522 update them all. */
523 void
524 fill_fpregset (gdb_fpregset_t *fpregsetp, int regno)
525 {
526 int regi;
527 struct gdbarch_tdep *tdep = gdbarch_tdep (current_gdbarch);
528
529 for (regi = 0; regi < 32; regi++)
530 {
531 if ((regno == -1) || (regno == FP0_REGNUM + regi))
532 regcache_collect (FP0_REGNUM + regi, (char *) (*fpregsetp + regi));
533 }
534 if ((regno == -1) || regno == tdep->ppc_fpscr_regnum)
535 regcache_collect (tdep->ppc_fpscr_regnum, (char *) (*fpregsetp + regi));
536 }