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1 /* Target-dependent code for GDB, the GNU debugger.
2
3 Copyright (C) 1986, 1987, 1989, 1991, 1992, 1993, 1994, 1995, 1996, 1997,
4 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007, 2008
5 Free Software Foundation, Inc.
6
7 This file is part of GDB.
8
9 This program is free software; you can redistribute it and/or modify
10 it under the terms of the GNU General Public License as published by
11 the Free Software Foundation; either version 3 of the License, or
12 (at your option) any later version.
13
14 This program is distributed in the hope that it will be useful,
15 but WITHOUT ANY WARRANTY; without even the implied warranty of
16 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 GNU General Public License for more details.
18
19 You should have received a copy of the GNU General Public License
20 along with this program. If not, see <http://www.gnu.org/licenses/>. */
21
22 #include "defs.h"
23 #include "frame.h"
24 #include "inferior.h"
25 #include "symtab.h"
26 #include "target.h"
27 #include "gdbcore.h"
28 #include "gdbcmd.h"
29 #include "symfile.h"
30 #include "objfiles.h"
31 #include "regcache.h"
32 #include "value.h"
33 #include "osabi.h"
34 #include "regset.h"
35 #include "solib-svr4.h"
36 #include "ppc-tdep.h"
37 #include "ppc-linux-tdep.h"
38 #include "trad-frame.h"
39 #include "frame-unwind.h"
40 #include "tramp-frame.h"
41
42 #include "features/rs6000/powerpc-32l.c"
43 #include "features/rs6000/powerpc-altivec32l.c"
44 #include "features/rs6000/powerpc-vsx32l.c"
45 #include "features/rs6000/powerpc-isa205-32l.c"
46 #include "features/rs6000/powerpc-isa205-altivec32l.c"
47 #include "features/rs6000/powerpc-isa205-vsx32l.c"
48 #include "features/rs6000/powerpc-64l.c"
49 #include "features/rs6000/powerpc-altivec64l.c"
50 #include "features/rs6000/powerpc-vsx64l.c"
51 #include "features/rs6000/powerpc-isa205-64l.c"
52 #include "features/rs6000/powerpc-isa205-altivec64l.c"
53 #include "features/rs6000/powerpc-isa205-vsx64l.c"
54 #include "features/rs6000/powerpc-e500l.c"
55
56
57 /* ppc_linux_memory_remove_breakpoints attempts to remove a breakpoint
58 in much the same fashion as memory_remove_breakpoint in mem-break.c,
59 but is careful not to write back the previous contents if the code
60 in question has changed in between inserting the breakpoint and
61 removing it.
62
63 Here is the problem that we're trying to solve...
64
65 Once upon a time, before introducing this function to remove
66 breakpoints from the inferior, setting a breakpoint on a shared
67 library function prior to running the program would not work
68 properly. In order to understand the problem, it is first
69 necessary to understand a little bit about dynamic linking on
70 this platform.
71
72 A call to a shared library function is accomplished via a bl
73 (branch-and-link) instruction whose branch target is an entry
74 in the procedure linkage table (PLT). The PLT in the object
75 file is uninitialized. To gdb, prior to running the program, the
76 entries in the PLT are all zeros.
77
78 Once the program starts running, the shared libraries are loaded
79 and the procedure linkage table is initialized, but the entries in
80 the table are not (necessarily) resolved. Once a function is
81 actually called, the code in the PLT is hit and the function is
82 resolved. In order to better illustrate this, an example is in
83 order; the following example is from the gdb testsuite.
84
85 We start the program shmain.
86
87 [kev@arroyo testsuite]$ ../gdb gdb.base/shmain
88 [...]
89
90 We place two breakpoints, one on shr1 and the other on main.
91
92 (gdb) b shr1
93 Breakpoint 1 at 0x100409d4
94 (gdb) b main
95 Breakpoint 2 at 0x100006a0: file gdb.base/shmain.c, line 44.
96
97 Examine the instruction (and the immediatly following instruction)
98 upon which the breakpoint was placed. Note that the PLT entry
99 for shr1 contains zeros.
100
101 (gdb) x/2i 0x100409d4
102 0x100409d4 <shr1>: .long 0x0
103 0x100409d8 <shr1+4>: .long 0x0
104
105 Now run 'til main.
106
107 (gdb) r
108 Starting program: gdb.base/shmain
109 Breakpoint 1 at 0xffaf790: file gdb.base/shr1.c, line 19.
110
111 Breakpoint 2, main ()
112 at gdb.base/shmain.c:44
113 44 g = 1;
114
115 Examine the PLT again. Note that the loading of the shared
116 library has initialized the PLT to code which loads a constant
117 (which I think is an index into the GOT) into r11 and then
118 branchs a short distance to the code which actually does the
119 resolving.
120
121 (gdb) x/2i 0x100409d4
122 0x100409d4 <shr1>: li r11,4
123 0x100409d8 <shr1+4>: b 0x10040984 <sg+4>
124 (gdb) c
125 Continuing.
126
127 Breakpoint 1, shr1 (x=1)
128 at gdb.base/shr1.c:19
129 19 l = 1;
130
131 Now we've hit the breakpoint at shr1. (The breakpoint was
132 reset from the PLT entry to the actual shr1 function after the
133 shared library was loaded.) Note that the PLT entry has been
134 resolved to contain a branch that takes us directly to shr1.
135 (The real one, not the PLT entry.)
136
137 (gdb) x/2i 0x100409d4
138 0x100409d4 <shr1>: b 0xffaf76c <shr1>
139 0x100409d8 <shr1+4>: b 0x10040984 <sg+4>
140
141 The thing to note here is that the PLT entry for shr1 has been
142 changed twice.
143
144 Now the problem should be obvious. GDB places a breakpoint (a
145 trap instruction) on the zero value of the PLT entry for shr1.
146 Later on, after the shared library had been loaded and the PLT
147 initialized, GDB gets a signal indicating this fact and attempts
148 (as it always does when it stops) to remove all the breakpoints.
149
150 The breakpoint removal was causing the former contents (a zero
151 word) to be written back to the now initialized PLT entry thus
152 destroying a portion of the initialization that had occurred only a
153 short time ago. When execution continued, the zero word would be
154 executed as an instruction an an illegal instruction trap was
155 generated instead. (0 is not a legal instruction.)
156
157 The fix for this problem was fairly straightforward. The function
158 memory_remove_breakpoint from mem-break.c was copied to this file,
159 modified slightly, and renamed to ppc_linux_memory_remove_breakpoint.
160 In tm-linux.h, MEMORY_REMOVE_BREAKPOINT is defined to call this new
161 function.
162
163 The differences between ppc_linux_memory_remove_breakpoint () and
164 memory_remove_breakpoint () are minor. All that the former does
165 that the latter does not is check to make sure that the breakpoint
166 location actually contains a breakpoint (trap instruction) prior
167 to attempting to write back the old contents. If it does contain
168 a trap instruction, we allow the old contents to be written back.
169 Otherwise, we silently do nothing.
170
171 The big question is whether memory_remove_breakpoint () should be
172 changed to have the same functionality. The downside is that more
173 traffic is generated for remote targets since we'll have an extra
174 fetch of a memory word each time a breakpoint is removed.
175
176 For the time being, we'll leave this self-modifying-code-friendly
177 version in ppc-linux-tdep.c, but it ought to be migrated somewhere
178 else in the event that some other platform has similar needs with
179 regard to removing breakpoints in some potentially self modifying
180 code. */
181 int
182 ppc_linux_memory_remove_breakpoint (struct gdbarch *gdbarch,
183 struct bp_target_info *bp_tgt)
184 {
185 CORE_ADDR addr = bp_tgt->placed_address;
186 const unsigned char *bp;
187 int val;
188 int bplen;
189 gdb_byte old_contents[BREAKPOINT_MAX];
190 struct cleanup *cleanup;
191
192 /* Determine appropriate breakpoint contents and size for this address. */
193 bp = gdbarch_breakpoint_from_pc (gdbarch, &addr, &bplen);
194 if (bp == NULL)
195 error (_("Software breakpoints not implemented for this target."));
196
197 /* Make sure we see the memory breakpoints. */
198 cleanup = make_show_memory_breakpoints_cleanup (1);
199 val = target_read_memory (addr, old_contents, bplen);
200
201 /* If our breakpoint is no longer at the address, this means that the
202 program modified the code on us, so it is wrong to put back the
203 old value */
204 if (val == 0 && memcmp (bp, old_contents, bplen) == 0)
205 val = target_write_memory (addr, bp_tgt->shadow_contents, bplen);
206
207 do_cleanups (cleanup);
208 return val;
209 }
210
211 /* For historic reasons, PPC 32 GNU/Linux follows PowerOpen rather
212 than the 32 bit SYSV R4 ABI structure return convention - all
213 structures, no matter their size, are put in memory. Vectors,
214 which were added later, do get returned in a register though. */
215
216 static enum return_value_convention
217 ppc_linux_return_value (struct gdbarch *gdbarch, struct type *func_type,
218 struct type *valtype, struct regcache *regcache,
219 gdb_byte *readbuf, const gdb_byte *writebuf)
220 {
221 if ((TYPE_CODE (valtype) == TYPE_CODE_STRUCT
222 || TYPE_CODE (valtype) == TYPE_CODE_UNION)
223 && !((TYPE_LENGTH (valtype) == 16 || TYPE_LENGTH (valtype) == 8)
224 && TYPE_VECTOR (valtype)))
225 return RETURN_VALUE_STRUCT_CONVENTION;
226 else
227 return ppc_sysv_abi_return_value (gdbarch, func_type, valtype, regcache,
228 readbuf, writebuf);
229 }
230
231 /* Macros for matching instructions. Note that, since all the
232 operands are masked off before they're or-ed into the instruction,
233 you can use -1 to make masks. */
234
235 #define insn_d(opcd, rts, ra, d) \
236 ((((opcd) & 0x3f) << 26) \
237 | (((rts) & 0x1f) << 21) \
238 | (((ra) & 0x1f) << 16) \
239 | ((d) & 0xffff))
240
241 #define insn_ds(opcd, rts, ra, d, xo) \
242 ((((opcd) & 0x3f) << 26) \
243 | (((rts) & 0x1f) << 21) \
244 | (((ra) & 0x1f) << 16) \
245 | ((d) & 0xfffc) \
246 | ((xo) & 0x3))
247
248 #define insn_xfx(opcd, rts, spr, xo) \
249 ((((opcd) & 0x3f) << 26) \
250 | (((rts) & 0x1f) << 21) \
251 | (((spr) & 0x1f) << 16) \
252 | (((spr) & 0x3e0) << 6) \
253 | (((xo) & 0x3ff) << 1))
254
255 /* Read a PPC instruction from memory. PPC instructions are always
256 big-endian, no matter what endianness the program is running in, so
257 we can't use read_memory_integer or one of its friends here. */
258 static unsigned int
259 read_insn (CORE_ADDR pc)
260 {
261 unsigned char buf[4];
262
263 read_memory (pc, buf, 4);
264 return (buf[0] << 24) | (buf[1] << 16) | (buf[2] << 8) | buf[3];
265 }
266
267
268 /* An instruction to match. */
269 struct insn_pattern
270 {
271 unsigned int mask; /* mask the insn with this... */
272 unsigned int data; /* ...and see if it matches this. */
273 int optional; /* If non-zero, this insn may be absent. */
274 };
275
276 /* Return non-zero if the instructions at PC match the series
277 described in PATTERN, or zero otherwise. PATTERN is an array of
278 'struct insn_pattern' objects, terminated by an entry whose mask is
279 zero.
280
281 When the match is successful, fill INSN[i] with what PATTERN[i]
282 matched. If PATTERN[i] is optional, and the instruction wasn't
283 present, set INSN[i] to 0 (which is not a valid PPC instruction).
284 INSN should have as many elements as PATTERN. Note that, if
285 PATTERN contains optional instructions which aren't present in
286 memory, then INSN will have holes, so INSN[i] isn't necessarily the
287 i'th instruction in memory. */
288 static int
289 insns_match_pattern (CORE_ADDR pc,
290 struct insn_pattern *pattern,
291 unsigned int *insn)
292 {
293 int i;
294
295 for (i = 0; pattern[i].mask; i++)
296 {
297 insn[i] = read_insn (pc);
298 if ((insn[i] & pattern[i].mask) == pattern[i].data)
299 pc += 4;
300 else if (pattern[i].optional)
301 insn[i] = 0;
302 else
303 return 0;
304 }
305
306 return 1;
307 }
308
309
310 /* Return the 'd' field of the d-form instruction INSN, properly
311 sign-extended. */
312 static CORE_ADDR
313 insn_d_field (unsigned int insn)
314 {
315 return ((((CORE_ADDR) insn & 0xffff) ^ 0x8000) - 0x8000);
316 }
317
318
319 /* Return the 'ds' field of the ds-form instruction INSN, with the two
320 zero bits concatenated at the right, and properly
321 sign-extended. */
322 static CORE_ADDR
323 insn_ds_field (unsigned int insn)
324 {
325 return ((((CORE_ADDR) insn & 0xfffc) ^ 0x8000) - 0x8000);
326 }
327
328
329 /* If DESC is the address of a 64-bit PowerPC GNU/Linux function
330 descriptor, return the descriptor's entry point. */
331 static CORE_ADDR
332 ppc64_desc_entry_point (CORE_ADDR desc)
333 {
334 /* The first word of the descriptor is the entry point. */
335 return (CORE_ADDR) read_memory_unsigned_integer (desc, 8);
336 }
337
338
339 /* Pattern for the standard linkage function. These are built by
340 build_plt_stub in elf64-ppc.c, whose GLINK argument is always
341 zero. */
342 static struct insn_pattern ppc64_standard_linkage1[] =
343 {
344 /* addis r12, r2, <any> */
345 { insn_d (-1, -1, -1, 0), insn_d (15, 12, 2, 0), 0 },
346
347 /* std r2, 40(r1) */
348 { -1, insn_ds (62, 2, 1, 40, 0), 0 },
349
350 /* ld r11, <any>(r12) */
351 { insn_ds (-1, -1, -1, 0, -1), insn_ds (58, 11, 12, 0, 0), 0 },
352
353 /* addis r12, r12, 1 <optional> */
354 { insn_d (-1, -1, -1, -1), insn_d (15, 12, 12, 1), 1 },
355
356 /* ld r2, <any>(r12) */
357 { insn_ds (-1, -1, -1, 0, -1), insn_ds (58, 2, 12, 0, 0), 0 },
358
359 /* addis r12, r12, 1 <optional> */
360 { insn_d (-1, -1, -1, -1), insn_d (15, 12, 12, 1), 1 },
361
362 /* mtctr r11 */
363 { insn_xfx (-1, -1, -1, -1), insn_xfx (31, 11, 9, 467), 0 },
364
365 /* ld r11, <any>(r12) */
366 { insn_ds (-1, -1, -1, 0, -1), insn_ds (58, 11, 12, 0, 0), 0 },
367
368 /* bctr */
369 { -1, 0x4e800420, 0 },
370
371 { 0, 0, 0 }
372 };
373 #define PPC64_STANDARD_LINKAGE1_LEN \
374 (sizeof (ppc64_standard_linkage1) / sizeof (ppc64_standard_linkage1[0]))
375
376 static struct insn_pattern ppc64_standard_linkage2[] =
377 {
378 /* addis r12, r2, <any> */
379 { insn_d (-1, -1, -1, 0), insn_d (15, 12, 2, 0), 0 },
380
381 /* std r2, 40(r1) */
382 { -1, insn_ds (62, 2, 1, 40, 0), 0 },
383
384 /* ld r11, <any>(r12) */
385 { insn_ds (-1, -1, -1, 0, -1), insn_ds (58, 11, 12, 0, 0), 0 },
386
387 /* addi r12, r12, <any> <optional> */
388 { insn_d (-1, -1, -1, 0), insn_d (14, 12, 12, 0), 1 },
389
390 /* mtctr r11 */
391 { insn_xfx (-1, -1, -1, -1), insn_xfx (31, 11, 9, 467), 0 },
392
393 /* ld r2, <any>(r12) */
394 { insn_ds (-1, -1, -1, 0, -1), insn_ds (58, 2, 12, 0, 0), 0 },
395
396 /* ld r11, <any>(r12) */
397 { insn_ds (-1, -1, -1, 0, -1), insn_ds (58, 11, 12, 0, 0), 0 },
398
399 /* bctr */
400 { -1, 0x4e800420, 0 },
401
402 { 0, 0, 0 }
403 };
404 #define PPC64_STANDARD_LINKAGE2_LEN \
405 (sizeof (ppc64_standard_linkage2) / sizeof (ppc64_standard_linkage2[0]))
406
407 static struct insn_pattern ppc64_standard_linkage3[] =
408 {
409 /* std r2, 40(r1) */
410 { -1, insn_ds (62, 2, 1, 40, 0), 0 },
411
412 /* ld r11, <any>(r2) */
413 { insn_ds (-1, -1, -1, 0, -1), insn_ds (58, 11, 2, 0, 0), 0 },
414
415 /* addi r2, r2, <any> <optional> */
416 { insn_d (-1, -1, -1, 0), insn_d (14, 2, 2, 0), 1 },
417
418 /* mtctr r11 */
419 { insn_xfx (-1, -1, -1, -1), insn_xfx (31, 11, 9, 467), 0 },
420
421 /* ld r11, <any>(r2) */
422 { insn_ds (-1, -1, -1, 0, -1), insn_ds (58, 11, 2, 0, 0), 0 },
423
424 /* ld r2, <any>(r2) */
425 { insn_ds (-1, -1, -1, 0, -1), insn_ds (58, 2, 2, 0, 0), 0 },
426
427 /* bctr */
428 { -1, 0x4e800420, 0 },
429
430 { 0, 0, 0 }
431 };
432 #define PPC64_STANDARD_LINKAGE3_LEN \
433 (sizeof (ppc64_standard_linkage3) / sizeof (ppc64_standard_linkage3[0]))
434
435
436 /* When the dynamic linker is doing lazy symbol resolution, the first
437 call to a function in another object will go like this:
438
439 - The user's function calls the linkage function:
440
441 100007c4: 4b ff fc d5 bl 10000498
442 100007c8: e8 41 00 28 ld r2,40(r1)
443
444 - The linkage function loads the entry point (and other stuff) from
445 the function descriptor in the PLT, and jumps to it:
446
447 10000498: 3d 82 00 00 addis r12,r2,0
448 1000049c: f8 41 00 28 std r2,40(r1)
449 100004a0: e9 6c 80 98 ld r11,-32616(r12)
450 100004a4: e8 4c 80 a0 ld r2,-32608(r12)
451 100004a8: 7d 69 03 a6 mtctr r11
452 100004ac: e9 6c 80 a8 ld r11,-32600(r12)
453 100004b0: 4e 80 04 20 bctr
454
455 - But since this is the first time that PLT entry has been used, it
456 sends control to its glink entry. That loads the number of the
457 PLT entry and jumps to the common glink0 code:
458
459 10000c98: 38 00 00 00 li r0,0
460 10000c9c: 4b ff ff dc b 10000c78
461
462 - The common glink0 code then transfers control to the dynamic
463 linker's fixup code:
464
465 10000c78: e8 41 00 28 ld r2,40(r1)
466 10000c7c: 3d 82 00 00 addis r12,r2,0
467 10000c80: e9 6c 80 80 ld r11,-32640(r12)
468 10000c84: e8 4c 80 88 ld r2,-32632(r12)
469 10000c88: 7d 69 03 a6 mtctr r11
470 10000c8c: e9 6c 80 90 ld r11,-32624(r12)
471 10000c90: 4e 80 04 20 bctr
472
473 Eventually, this code will figure out how to skip all of this,
474 including the dynamic linker. At the moment, we just get through
475 the linkage function. */
476
477 /* If the current thread is about to execute a series of instructions
478 at PC matching the ppc64_standard_linkage pattern, and INSN is the result
479 from that pattern match, return the code address to which the
480 standard linkage function will send them. (This doesn't deal with
481 dynamic linker lazy symbol resolution stubs.) */
482 static CORE_ADDR
483 ppc64_standard_linkage1_target (struct frame_info *frame,
484 CORE_ADDR pc, unsigned int *insn)
485 {
486 struct gdbarch_tdep *tdep = gdbarch_tdep (get_frame_arch (frame));
487
488 /* The address of the function descriptor this linkage function
489 references. */
490 CORE_ADDR desc
491 = ((CORE_ADDR) get_frame_register_unsigned (frame,
492 tdep->ppc_gp0_regnum + 2)
493 + (insn_d_field (insn[0]) << 16)
494 + insn_ds_field (insn[2]));
495
496 /* The first word of the descriptor is the entry point. Return that. */
497 return ppc64_desc_entry_point (desc);
498 }
499
500 static struct core_regset_section ppc_linux_vsx_regset_sections[] =
501 {
502 { ".reg", 268 },
503 { ".reg2", 264 },
504 { ".reg-ppc-vmx", 544 },
505 { ".reg-ppc-vsx", 256 },
506 { NULL, 0}
507 };
508
509 static struct core_regset_section ppc_linux_vmx_regset_sections[] =
510 {
511 { ".reg", 268 },
512 { ".reg2", 264 },
513 { ".reg-ppc-vmx", 544 },
514 { NULL, 0}
515 };
516
517 static struct core_regset_section ppc_linux_fp_regset_sections[] =
518 {
519 { ".reg", 268 },
520 { ".reg2", 264 },
521 { NULL, 0}
522 };
523
524 static CORE_ADDR
525 ppc64_standard_linkage2_target (struct frame_info *frame,
526 CORE_ADDR pc, unsigned int *insn)
527 {
528 struct gdbarch_tdep *tdep = gdbarch_tdep (get_frame_arch (frame));
529
530 /* The address of the function descriptor this linkage function
531 references. */
532 CORE_ADDR desc
533 = ((CORE_ADDR) get_frame_register_unsigned (frame,
534 tdep->ppc_gp0_regnum + 2)
535 + (insn_d_field (insn[0]) << 16)
536 + insn_ds_field (insn[2]));
537
538 /* The first word of the descriptor is the entry point. Return that. */
539 return ppc64_desc_entry_point (desc);
540 }
541
542 static CORE_ADDR
543 ppc64_standard_linkage3_target (struct frame_info *frame,
544 CORE_ADDR pc, unsigned int *insn)
545 {
546 struct gdbarch_tdep *tdep = gdbarch_tdep (get_frame_arch (frame));
547
548 /* The address of the function descriptor this linkage function
549 references. */
550 CORE_ADDR desc
551 = ((CORE_ADDR) get_frame_register_unsigned (frame,
552 tdep->ppc_gp0_regnum + 2)
553 + insn_ds_field (insn[1]));
554
555 /* The first word of the descriptor is the entry point. Return that. */
556 return ppc64_desc_entry_point (desc);
557 }
558
559
560 /* Given that we've begun executing a call trampoline at PC, return
561 the entry point of the function the trampoline will go to. */
562 static CORE_ADDR
563 ppc64_skip_trampoline_code (struct frame_info *frame, CORE_ADDR pc)
564 {
565 unsigned int ppc64_standard_linkage1_insn[PPC64_STANDARD_LINKAGE1_LEN];
566 unsigned int ppc64_standard_linkage2_insn[PPC64_STANDARD_LINKAGE2_LEN];
567 unsigned int ppc64_standard_linkage3_insn[PPC64_STANDARD_LINKAGE3_LEN];
568 CORE_ADDR target;
569
570 if (insns_match_pattern (pc, ppc64_standard_linkage1,
571 ppc64_standard_linkage1_insn))
572 pc = ppc64_standard_linkage1_target (frame, pc,
573 ppc64_standard_linkage1_insn);
574 else if (insns_match_pattern (pc, ppc64_standard_linkage2,
575 ppc64_standard_linkage2_insn))
576 pc = ppc64_standard_linkage2_target (frame, pc,
577 ppc64_standard_linkage2_insn);
578 else if (insns_match_pattern (pc, ppc64_standard_linkage3,
579 ppc64_standard_linkage3_insn))
580 pc = ppc64_standard_linkage3_target (frame, pc,
581 ppc64_standard_linkage3_insn);
582 else
583 return 0;
584
585 /* The PLT descriptor will either point to the already resolved target
586 address, or else to a glink stub. As the latter carry synthetic @plt
587 symbols, find_solib_trampoline_target should be able to resolve them. */
588 target = find_solib_trampoline_target (frame, pc);
589 return target? target : pc;
590 }
591
592
593 /* Support for convert_from_func_ptr_addr (ARCH, ADDR, TARG) on PPC64
594 GNU/Linux.
595
596 Usually a function pointer's representation is simply the address
597 of the function. On GNU/Linux on the PowerPC however, a function
598 pointer may be a pointer to a function descriptor.
599
600 For PPC64, a function descriptor is a TOC entry, in a data section,
601 which contains three words: the first word is the address of the
602 function, the second word is the TOC pointer (r2), and the third word
603 is the static chain value.
604
605 Throughout GDB it is currently assumed that a function pointer contains
606 the address of the function, which is not easy to fix. In addition, the
607 conversion of a function address to a function pointer would
608 require allocation of a TOC entry in the inferior's memory space,
609 with all its drawbacks. To be able to call C++ virtual methods in
610 the inferior (which are called via function pointers),
611 find_function_addr uses this function to get the function address
612 from a function pointer.
613
614 If ADDR points at what is clearly a function descriptor, transform
615 it into the address of the corresponding function, if needed. Be
616 conservative, otherwise GDB will do the transformation on any
617 random addresses such as occur when there is no symbol table. */
618
619 static CORE_ADDR
620 ppc64_linux_convert_from_func_ptr_addr (struct gdbarch *gdbarch,
621 CORE_ADDR addr,
622 struct target_ops *targ)
623 {
624 struct section_table *s = target_section_by_addr (targ, addr);
625
626 /* Check if ADDR points to a function descriptor. */
627 if (s && strcmp (s->the_bfd_section->name, ".opd") == 0)
628 {
629 /* There may be relocations that need to be applied to the .opd
630 section. Unfortunately, this function may be called at a time
631 where these relocations have not yet been performed -- this can
632 happen for example shortly after a library has been loaded with
633 dlopen, but ld.so has not yet applied the relocations.
634
635 To cope with both the case where the relocation has been applied,
636 and the case where it has not yet been applied, we do *not* read
637 the (maybe) relocated value from target memory, but we instead
638 read the non-relocated value from the BFD, and apply the relocation
639 offset manually.
640
641 This makes the assumption that all .opd entries are always relocated
642 by the same offset the section itself was relocated. This should
643 always be the case for GNU/Linux executables and shared libraries.
644 Note that other kind of object files (e.g. those added via
645 add-symbol-files) will currently never end up here anyway, as this
646 function accesses *target* sections only; only the main exec and
647 shared libraries are ever added to the target. */
648
649 gdb_byte buf[8];
650 int res;
651
652 res = bfd_get_section_contents (s->bfd, s->the_bfd_section,
653 &buf, addr - s->addr, 8);
654 if (res != 0)
655 return extract_unsigned_integer (buf, 8)
656 - bfd_section_vma (s->bfd, s->the_bfd_section) + s->addr;
657 }
658
659 return addr;
660 }
661
662 /* Wrappers to handle Linux-only registers. */
663
664 static void
665 ppc_linux_supply_gregset (const struct regset *regset,
666 struct regcache *regcache,
667 int regnum, const void *gregs, size_t len)
668 {
669 const struct ppc_reg_offsets *offsets = regset->descr;
670
671 ppc_supply_gregset (regset, regcache, regnum, gregs, len);
672
673 if (ppc_linux_trap_reg_p (get_regcache_arch (regcache)))
674 {
675 /* "orig_r3" is stored 2 slots after "pc". */
676 if (regnum == -1 || regnum == PPC_ORIG_R3_REGNUM)
677 ppc_supply_reg (regcache, PPC_ORIG_R3_REGNUM, gregs,
678 offsets->pc_offset + 2 * offsets->gpr_size,
679 offsets->gpr_size);
680
681 /* "trap" is stored 8 slots after "pc". */
682 if (regnum == -1 || regnum == PPC_TRAP_REGNUM)
683 ppc_supply_reg (regcache, PPC_TRAP_REGNUM, gregs,
684 offsets->pc_offset + 8 * offsets->gpr_size,
685 offsets->gpr_size);
686 }
687 }
688
689 static void
690 ppc_linux_collect_gregset (const struct regset *regset,
691 const struct regcache *regcache,
692 int regnum, void *gregs, size_t len)
693 {
694 const struct ppc_reg_offsets *offsets = regset->descr;
695
696 /* Clear areas in the linux gregset not written elsewhere. */
697 if (regnum == -1)
698 memset (gregs, 0, len);
699
700 ppc_collect_gregset (regset, regcache, regnum, gregs, len);
701
702 if (ppc_linux_trap_reg_p (get_regcache_arch (regcache)))
703 {
704 /* "orig_r3" is stored 2 slots after "pc". */
705 if (regnum == -1 || regnum == PPC_ORIG_R3_REGNUM)
706 ppc_collect_reg (regcache, PPC_ORIG_R3_REGNUM, gregs,
707 offsets->pc_offset + 2 * offsets->gpr_size,
708 offsets->gpr_size);
709
710 /* "trap" is stored 8 slots after "pc". */
711 if (regnum == -1 || regnum == PPC_TRAP_REGNUM)
712 ppc_collect_reg (regcache, PPC_TRAP_REGNUM, gregs,
713 offsets->pc_offset + 8 * offsets->gpr_size,
714 offsets->gpr_size);
715 }
716 }
717
718 /* Regset descriptions. */
719 static const struct ppc_reg_offsets ppc32_linux_reg_offsets =
720 {
721 /* General-purpose registers. */
722 /* .r0_offset = */ 0,
723 /* .gpr_size = */ 4,
724 /* .xr_size = */ 4,
725 /* .pc_offset = */ 128,
726 /* .ps_offset = */ 132,
727 /* .cr_offset = */ 152,
728 /* .lr_offset = */ 144,
729 /* .ctr_offset = */ 140,
730 /* .xer_offset = */ 148,
731 /* .mq_offset = */ 156,
732
733 /* Floating-point registers. */
734 /* .f0_offset = */ 0,
735 /* .fpscr_offset = */ 256,
736 /* .fpscr_size = */ 8,
737
738 /* AltiVec registers. */
739 /* .vr0_offset = */ 0,
740 /* .vscr_offset = */ 512 + 12,
741 /* .vrsave_offset = */ 528
742 };
743
744 static const struct ppc_reg_offsets ppc64_linux_reg_offsets =
745 {
746 /* General-purpose registers. */
747 /* .r0_offset = */ 0,
748 /* .gpr_size = */ 8,
749 /* .xr_size = */ 8,
750 /* .pc_offset = */ 256,
751 /* .ps_offset = */ 264,
752 /* .cr_offset = */ 304,
753 /* .lr_offset = */ 288,
754 /* .ctr_offset = */ 280,
755 /* .xer_offset = */ 296,
756 /* .mq_offset = */ 312,
757
758 /* Floating-point registers. */
759 /* .f0_offset = */ 0,
760 /* .fpscr_offset = */ 256,
761 /* .fpscr_size = */ 8,
762
763 /* AltiVec registers. */
764 /* .vr0_offset = */ 0,
765 /* .vscr_offset = */ 512 + 12,
766 /* .vrsave_offset = */ 528
767 };
768
769 static const struct regset ppc32_linux_gregset = {
770 &ppc32_linux_reg_offsets,
771 ppc_linux_supply_gregset,
772 ppc_linux_collect_gregset,
773 NULL
774 };
775
776 static const struct regset ppc64_linux_gregset = {
777 &ppc64_linux_reg_offsets,
778 ppc_linux_supply_gregset,
779 ppc_linux_collect_gregset,
780 NULL
781 };
782
783 static const struct regset ppc32_linux_fpregset = {
784 &ppc32_linux_reg_offsets,
785 ppc_supply_fpregset,
786 ppc_collect_fpregset,
787 NULL
788 };
789
790 static const struct regset ppc32_linux_vrregset = {
791 &ppc32_linux_reg_offsets,
792 ppc_supply_vrregset,
793 ppc_collect_vrregset,
794 NULL
795 };
796
797 static const struct regset ppc32_linux_vsxregset = {
798 &ppc32_linux_reg_offsets,
799 ppc_supply_vsxregset,
800 ppc_collect_vsxregset,
801 NULL
802 };
803
804 const struct regset *
805 ppc_linux_gregset (int wordsize)
806 {
807 return wordsize == 8 ? &ppc64_linux_gregset : &ppc32_linux_gregset;
808 }
809
810 const struct regset *
811 ppc_linux_fpregset (void)
812 {
813 return &ppc32_linux_fpregset;
814 }
815
816 static const struct regset *
817 ppc_linux_regset_from_core_section (struct gdbarch *core_arch,
818 const char *sect_name, size_t sect_size)
819 {
820 struct gdbarch_tdep *tdep = gdbarch_tdep (core_arch);
821 if (strcmp (sect_name, ".reg") == 0)
822 {
823 if (tdep->wordsize == 4)
824 return &ppc32_linux_gregset;
825 else
826 return &ppc64_linux_gregset;
827 }
828 if (strcmp (sect_name, ".reg2") == 0)
829 return &ppc32_linux_fpregset;
830 if (strcmp (sect_name, ".reg-ppc-vmx") == 0)
831 return &ppc32_linux_vrregset;
832 if (strcmp (sect_name, ".reg-ppc-vsx") == 0)
833 return &ppc32_linux_vsxregset;
834 return NULL;
835 }
836
837 static void
838 ppc_linux_sigtramp_cache (struct frame_info *this_frame,
839 struct trad_frame_cache *this_cache,
840 CORE_ADDR func, LONGEST offset,
841 int bias)
842 {
843 CORE_ADDR base;
844 CORE_ADDR regs;
845 CORE_ADDR gpregs;
846 CORE_ADDR fpregs;
847 int i;
848 struct gdbarch *gdbarch = get_frame_arch (this_frame);
849 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
850
851 base = get_frame_register_unsigned (this_frame,
852 gdbarch_sp_regnum (gdbarch));
853 if (bias > 0 && get_frame_pc (this_frame) != func)
854 /* See below, some signal trampolines increment the stack as their
855 first instruction, need to compensate for that. */
856 base -= bias;
857
858 /* Find the address of the register buffer pointer. */
859 regs = base + offset;
860 /* Use that to find the address of the corresponding register
861 buffers. */
862 gpregs = read_memory_unsigned_integer (regs, tdep->wordsize);
863 fpregs = gpregs + 48 * tdep->wordsize;
864
865 /* General purpose. */
866 for (i = 0; i < 32; i++)
867 {
868 int regnum = i + tdep->ppc_gp0_regnum;
869 trad_frame_set_reg_addr (this_cache, regnum, gpregs + i * tdep->wordsize);
870 }
871 trad_frame_set_reg_addr (this_cache,
872 gdbarch_pc_regnum (gdbarch),
873 gpregs + 32 * tdep->wordsize);
874 trad_frame_set_reg_addr (this_cache, tdep->ppc_ctr_regnum,
875 gpregs + 35 * tdep->wordsize);
876 trad_frame_set_reg_addr (this_cache, tdep->ppc_lr_regnum,
877 gpregs + 36 * tdep->wordsize);
878 trad_frame_set_reg_addr (this_cache, tdep->ppc_xer_regnum,
879 gpregs + 37 * tdep->wordsize);
880 trad_frame_set_reg_addr (this_cache, tdep->ppc_cr_regnum,
881 gpregs + 38 * tdep->wordsize);
882
883 if (ppc_linux_trap_reg_p (gdbarch))
884 {
885 trad_frame_set_reg_addr (this_cache, PPC_ORIG_R3_REGNUM,
886 gpregs + 34 * tdep->wordsize);
887 trad_frame_set_reg_addr (this_cache, PPC_TRAP_REGNUM,
888 gpregs + 40 * tdep->wordsize);
889 }
890
891 if (ppc_floating_point_unit_p (gdbarch))
892 {
893 /* Floating point registers. */
894 for (i = 0; i < 32; i++)
895 {
896 int regnum = i + gdbarch_fp0_regnum (gdbarch);
897 trad_frame_set_reg_addr (this_cache, regnum,
898 fpregs + i * tdep->wordsize);
899 }
900 trad_frame_set_reg_addr (this_cache, tdep->ppc_fpscr_regnum,
901 fpregs + 32 * tdep->wordsize);
902 }
903 trad_frame_set_id (this_cache, frame_id_build (base, func));
904 }
905
906 static void
907 ppc32_linux_sigaction_cache_init (const struct tramp_frame *self,
908 struct frame_info *this_frame,
909 struct trad_frame_cache *this_cache,
910 CORE_ADDR func)
911 {
912 ppc_linux_sigtramp_cache (this_frame, this_cache, func,
913 0xd0 /* Offset to ucontext_t. */
914 + 0x30 /* Offset to .reg. */,
915 0);
916 }
917
918 static void
919 ppc64_linux_sigaction_cache_init (const struct tramp_frame *self,
920 struct frame_info *this_frame,
921 struct trad_frame_cache *this_cache,
922 CORE_ADDR func)
923 {
924 ppc_linux_sigtramp_cache (this_frame, this_cache, func,
925 0x80 /* Offset to ucontext_t. */
926 + 0xe0 /* Offset to .reg. */,
927 128);
928 }
929
930 static void
931 ppc32_linux_sighandler_cache_init (const struct tramp_frame *self,
932 struct frame_info *this_frame,
933 struct trad_frame_cache *this_cache,
934 CORE_ADDR func)
935 {
936 ppc_linux_sigtramp_cache (this_frame, this_cache, func,
937 0x40 /* Offset to ucontext_t. */
938 + 0x1c /* Offset to .reg. */,
939 0);
940 }
941
942 static void
943 ppc64_linux_sighandler_cache_init (const struct tramp_frame *self,
944 struct frame_info *this_frame,
945 struct trad_frame_cache *this_cache,
946 CORE_ADDR func)
947 {
948 ppc_linux_sigtramp_cache (this_frame, this_cache, func,
949 0x80 /* Offset to struct sigcontext. */
950 + 0x38 /* Offset to .reg. */,
951 128);
952 }
953
954 static struct tramp_frame ppc32_linux_sigaction_tramp_frame = {
955 SIGTRAMP_FRAME,
956 4,
957 {
958 { 0x380000ac, -1 }, /* li r0, 172 */
959 { 0x44000002, -1 }, /* sc */
960 { TRAMP_SENTINEL_INSN },
961 },
962 ppc32_linux_sigaction_cache_init
963 };
964 static struct tramp_frame ppc64_linux_sigaction_tramp_frame = {
965 SIGTRAMP_FRAME,
966 4,
967 {
968 { 0x38210080, -1 }, /* addi r1,r1,128 */
969 { 0x380000ac, -1 }, /* li r0, 172 */
970 { 0x44000002, -1 }, /* sc */
971 { TRAMP_SENTINEL_INSN },
972 },
973 ppc64_linux_sigaction_cache_init
974 };
975 static struct tramp_frame ppc32_linux_sighandler_tramp_frame = {
976 SIGTRAMP_FRAME,
977 4,
978 {
979 { 0x38000077, -1 }, /* li r0,119 */
980 { 0x44000002, -1 }, /* sc */
981 { TRAMP_SENTINEL_INSN },
982 },
983 ppc32_linux_sighandler_cache_init
984 };
985 static struct tramp_frame ppc64_linux_sighandler_tramp_frame = {
986 SIGTRAMP_FRAME,
987 4,
988 {
989 { 0x38210080, -1 }, /* addi r1,r1,128 */
990 { 0x38000077, -1 }, /* li r0,119 */
991 { 0x44000002, -1 }, /* sc */
992 { TRAMP_SENTINEL_INSN },
993 },
994 ppc64_linux_sighandler_cache_init
995 };
996
997
998 /* Return 1 if PPC_ORIG_R3_REGNUM and PPC_TRAP_REGNUM are usable. */
999 int
1000 ppc_linux_trap_reg_p (struct gdbarch *gdbarch)
1001 {
1002 /* If we do not have a target description with registers, then
1003 the special registers will not be included in the register set. */
1004 if (!tdesc_has_registers (gdbarch_target_desc (gdbarch)))
1005 return 0;
1006
1007 /* If we do, then it is safe to check the size. */
1008 return register_size (gdbarch, PPC_ORIG_R3_REGNUM) > 0
1009 && register_size (gdbarch, PPC_TRAP_REGNUM) > 0;
1010 }
1011
1012 static void
1013 ppc_linux_write_pc (struct regcache *regcache, CORE_ADDR pc)
1014 {
1015 struct gdbarch *gdbarch = get_regcache_arch (regcache);
1016
1017 regcache_cooked_write_unsigned (regcache, gdbarch_pc_regnum (gdbarch), pc);
1018
1019 /* Set special TRAP register to -1 to prevent the kernel from
1020 messing with the PC we just installed, if we happen to be
1021 within an interrupted system call that the kernel wants to
1022 restart.
1023
1024 Note that after we return from the dummy call, the TRAP and
1025 ORIG_R3 registers will be automatically restored, and the
1026 kernel continues to restart the system call at this point. */
1027 if (ppc_linux_trap_reg_p (gdbarch))
1028 regcache_cooked_write_unsigned (regcache, PPC_TRAP_REGNUM, -1);
1029 }
1030
1031 static const struct target_desc *
1032 ppc_linux_core_read_description (struct gdbarch *gdbarch,
1033 struct target_ops *target,
1034 bfd *abfd)
1035 {
1036 asection *altivec = bfd_get_section_by_name (abfd, ".reg-ppc-vmx");
1037 asection *vsx = bfd_get_section_by_name (abfd, ".reg-ppc-vsx");
1038 asection *section = bfd_get_section_by_name (abfd, ".reg");
1039 if (! section)
1040 return NULL;
1041
1042 switch (bfd_section_size (abfd, section))
1043 {
1044 case 48 * 4:
1045 if (vsx)
1046 return tdesc_powerpc_vsx32l;
1047 else if (altivec)
1048 return tdesc_powerpc_altivec32l;
1049 else
1050 return tdesc_powerpc_32l;
1051
1052 case 48 * 8:
1053 if (vsx)
1054 return tdesc_powerpc_vsx64l;
1055 else if (altivec)
1056 return tdesc_powerpc_altivec64l;
1057 else
1058 return tdesc_powerpc_64l;
1059
1060 default:
1061 return NULL;
1062 }
1063 }
1064
1065 static void
1066 ppc_linux_init_abi (struct gdbarch_info info,
1067 struct gdbarch *gdbarch)
1068 {
1069 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
1070 struct tdesc_arch_data *tdesc_data = (void *) info.tdep_info;
1071
1072 /* PPC GNU/Linux uses either 64-bit or 128-bit long doubles; where
1073 128-bit, they are IBM long double, not IEEE quad long double as
1074 in the System V ABI PowerPC Processor Supplement. We can safely
1075 let them default to 128-bit, since the debug info will give the
1076 size of type actually used in each case. */
1077 set_gdbarch_long_double_bit (gdbarch, 16 * TARGET_CHAR_BIT);
1078 set_gdbarch_long_double_format (gdbarch, floatformats_ibm_long_double);
1079
1080 /* Handle inferior calls during interrupted system calls. */
1081 set_gdbarch_write_pc (gdbarch, ppc_linux_write_pc);
1082
1083 if (tdep->wordsize == 4)
1084 {
1085 /* Until November 2001, gcc did not comply with the 32 bit SysV
1086 R4 ABI requirement that structures less than or equal to 8
1087 bytes should be returned in registers. Instead GCC was using
1088 the the AIX/PowerOpen ABI - everything returned in memory
1089 (well ignoring vectors that is). When this was corrected, it
1090 wasn't fixed for GNU/Linux native platform. Use the
1091 PowerOpen struct convention. */
1092 set_gdbarch_return_value (gdbarch, ppc_linux_return_value);
1093
1094 set_gdbarch_memory_remove_breakpoint (gdbarch,
1095 ppc_linux_memory_remove_breakpoint);
1096
1097 /* Shared library handling. */
1098 set_gdbarch_skip_trampoline_code (gdbarch, find_solib_trampoline_target);
1099 set_solib_svr4_fetch_link_map_offsets
1100 (gdbarch, svr4_ilp32_fetch_link_map_offsets);
1101
1102 /* Trampolines. */
1103 tramp_frame_prepend_unwinder (gdbarch, &ppc32_linux_sigaction_tramp_frame);
1104 tramp_frame_prepend_unwinder (gdbarch, &ppc32_linux_sighandler_tramp_frame);
1105 }
1106
1107 if (tdep->wordsize == 8)
1108 {
1109 /* Handle PPC GNU/Linux 64-bit function pointers (which are really
1110 function descriptors). */
1111 set_gdbarch_convert_from_func_ptr_addr
1112 (gdbarch, ppc64_linux_convert_from_func_ptr_addr);
1113
1114 /* Shared library handling. */
1115 set_gdbarch_skip_trampoline_code (gdbarch, ppc64_skip_trampoline_code);
1116 set_solib_svr4_fetch_link_map_offsets
1117 (gdbarch, svr4_lp64_fetch_link_map_offsets);
1118
1119 /* Trampolines. */
1120 tramp_frame_prepend_unwinder (gdbarch, &ppc64_linux_sigaction_tramp_frame);
1121 tramp_frame_prepend_unwinder (gdbarch, &ppc64_linux_sighandler_tramp_frame);
1122 }
1123 set_gdbarch_regset_from_core_section (gdbarch, ppc_linux_regset_from_core_section);
1124 set_gdbarch_core_read_description (gdbarch, ppc_linux_core_read_description);
1125
1126 /* Supported register sections. */
1127 if (tdesc_find_feature (info.target_desc,
1128 "org.gnu.gdb.power.vsx"))
1129 set_gdbarch_core_regset_sections (gdbarch, ppc_linux_vsx_regset_sections);
1130 else if (tdesc_find_feature (info.target_desc,
1131 "org.gnu.gdb.power.altivec"))
1132 set_gdbarch_core_regset_sections (gdbarch, ppc_linux_vmx_regset_sections);
1133 else
1134 set_gdbarch_core_regset_sections (gdbarch, ppc_linux_fp_regset_sections);
1135
1136 /* Enable TLS support. */
1137 set_gdbarch_fetch_tls_load_module_address (gdbarch,
1138 svr4_fetch_objfile_link_map);
1139
1140 if (tdesc_data)
1141 {
1142 const struct tdesc_feature *feature;
1143
1144 /* If we have target-described registers, then we can safely
1145 reserve a number for PPC_ORIG_R3_REGNUM and PPC_TRAP_REGNUM
1146 (whether they are described or not). */
1147 gdb_assert (gdbarch_num_regs (gdbarch) <= PPC_ORIG_R3_REGNUM);
1148 set_gdbarch_num_regs (gdbarch, PPC_TRAP_REGNUM + 1);
1149
1150 /* If they are present, then assign them to the reserved number. */
1151 feature = tdesc_find_feature (info.target_desc,
1152 "org.gnu.gdb.power.linux");
1153 if (feature != NULL)
1154 {
1155 tdesc_numbered_register (feature, tdesc_data,
1156 PPC_ORIG_R3_REGNUM, "orig_r3");
1157 tdesc_numbered_register (feature, tdesc_data,
1158 PPC_TRAP_REGNUM, "trap");
1159 }
1160 }
1161 }
1162
1163 void
1164 _initialize_ppc_linux_tdep (void)
1165 {
1166 /* Register for all sub-familes of the POWER/PowerPC: 32-bit and
1167 64-bit PowerPC, and the older rs6k. */
1168 gdbarch_register_osabi (bfd_arch_powerpc, bfd_mach_ppc, GDB_OSABI_LINUX,
1169 ppc_linux_init_abi);
1170 gdbarch_register_osabi (bfd_arch_powerpc, bfd_mach_ppc64, GDB_OSABI_LINUX,
1171 ppc_linux_init_abi);
1172 gdbarch_register_osabi (bfd_arch_rs6000, bfd_mach_rs6k, GDB_OSABI_LINUX,
1173 ppc_linux_init_abi);
1174
1175 /* Initialize the Linux target descriptions. */
1176 initialize_tdesc_powerpc_32l ();
1177 initialize_tdesc_powerpc_altivec32l ();
1178 initialize_tdesc_powerpc_vsx32l ();
1179 initialize_tdesc_powerpc_isa205_32l ();
1180 initialize_tdesc_powerpc_isa205_altivec32l ();
1181 initialize_tdesc_powerpc_isa205_vsx32l ();
1182 initialize_tdesc_powerpc_64l ();
1183 initialize_tdesc_powerpc_altivec64l ();
1184 initialize_tdesc_powerpc_vsx64l ();
1185 initialize_tdesc_powerpc_isa205_64l ();
1186 initialize_tdesc_powerpc_isa205_altivec64l ();
1187 initialize_tdesc_powerpc_isa205_vsx64l ();
1188 initialize_tdesc_powerpc_e500l ();
1189 }