]> git.ipfire.org Git - thirdparty/binutils-gdb.git/blob - gdb/ppc-sysv-tdep.c
2005-02-06 Andrew Cagney <cagney@gnu.org>
[thirdparty/binutils-gdb.git] / gdb / ppc-sysv-tdep.c
1 /* Target-dependent code for PowerPC systems using the SVR4 ABI
2 for GDB, the GNU debugger.
3
4 Copyright 2000, 2001, 2002, 2003, 2005 Free Software Foundation,
5 Inc.
6
7 This file is part of GDB.
8
9 This program is free software; you can redistribute it and/or modify
10 it under the terms of the GNU General Public License as published by
11 the Free Software Foundation; either version 2 of the License, or
12 (at your option) any later version.
13
14 This program is distributed in the hope that it will be useful,
15 but WITHOUT ANY WARRANTY; without even the implied warranty of
16 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 GNU General Public License for more details.
18
19 You should have received a copy of the GNU General Public License
20 along with this program; if not, write to the Free Software
21 Foundation, Inc., 59 Temple Place - Suite 330,
22 Boston, MA 02111-1307, USA. */
23
24 #include "defs.h"
25 #include "gdbcore.h"
26 #include "inferior.h"
27 #include "regcache.h"
28 #include "value.h"
29 #include "gdb_string.h"
30 #include "gdb_assert.h"
31 #include "ppc-tdep.h"
32 #include "target.h"
33 #include "objfiles.h"
34 #include "infcall.h"
35
36 /* Pass the arguments in either registers, or in the stack. Using the
37 ppc sysv ABI, the first eight words of the argument list (that might
38 be less than eight parameters if some parameters occupy more than one
39 word) are passed in r3..r10 registers. float and double parameters are
40 passed in fpr's, in addition to that. Rest of the parameters if any
41 are passed in user stack.
42
43 If the function is returning a structure, then the return address is passed
44 in r3, then the first 7 words of the parametes can be passed in registers,
45 starting from r4. */
46
47 CORE_ADDR
48 ppc_sysv_abi_push_dummy_call (struct gdbarch *gdbarch, struct value *function,
49 struct regcache *regcache, CORE_ADDR bp_addr,
50 int nargs, struct value **args, CORE_ADDR sp,
51 int struct_return, CORE_ADDR struct_addr)
52 {
53 struct gdbarch_tdep *tdep = gdbarch_tdep (current_gdbarch);
54 const CORE_ADDR saved_sp = read_sp ();
55 int argspace = 0; /* 0 is an initial wrong guess. */
56 int write_pass;
57
58 /* Go through the argument list twice.
59
60 Pass 1: Figure out how much new stack space is required for
61 arguments and pushed values. Unlike the PowerOpen ABI, the SysV
62 ABI doesn't reserve any extra space for parameters which are put
63 in registers, but does always push structures and then pass their
64 address.
65
66 Pass 2: Replay the same computation but this time also write the
67 values out to the target. */
68
69 for (write_pass = 0; write_pass < 2; write_pass++)
70 {
71 int argno;
72 /* Next available floating point register for float and double
73 arguments. */
74 int freg = 1;
75 /* Next available general register for non-float, non-vector
76 arguments. */
77 int greg = 3;
78 /* Next available vector register for vector arguments. */
79 int vreg = 2;
80 /* Arguments start above the "LR save word" and "Back chain". */
81 int argoffset = 2 * tdep->wordsize;
82 /* Structures start after the arguments. */
83 int structoffset = argoffset + argspace;
84
85 /* If the function is returning a `struct', then the first word
86 (which will be passed in r3) is used for struct return
87 address. In that case we should advance one word and start
88 from r4 register to copy parameters. */
89 if (struct_return)
90 {
91 if (write_pass)
92 regcache_cooked_write_signed (regcache,
93 tdep->ppc_gp0_regnum + greg,
94 struct_addr);
95 greg++;
96 }
97
98 for (argno = 0; argno < nargs; argno++)
99 {
100 struct value *arg = args[argno];
101 struct type *type = check_typedef (value_type (arg));
102 int len = TYPE_LENGTH (type);
103 const bfd_byte *val = value_contents (arg);
104
105 if (TYPE_CODE (type) == TYPE_CODE_FLT
106 && ppc_floating_point_unit_p (current_gdbarch) && len <= 8)
107 {
108 /* Floating point value converted to "double" then
109 passed in an FP register, when the registers run out,
110 8 byte aligned stack is used. */
111 if (freg <= 8)
112 {
113 if (write_pass)
114 {
115 /* Always store the floating point value using
116 the register's floating-point format. */
117 char regval[MAX_REGISTER_SIZE];
118 struct type *regtype
119 = register_type (gdbarch, tdep->ppc_fp0_regnum + freg);
120 convert_typed_floating (val, type, regval, regtype);
121 regcache_cooked_write (regcache,
122 tdep->ppc_fp0_regnum + freg,
123 regval);
124 }
125 freg++;
126 }
127 else
128 {
129 /* SysV ABI converts floats to doubles before
130 writing them to an 8 byte aligned stack location. */
131 argoffset = align_up (argoffset, 8);
132 if (write_pass)
133 {
134 char memval[8];
135 struct type *memtype;
136 switch (TARGET_BYTE_ORDER)
137 {
138 case BFD_ENDIAN_BIG:
139 memtype = builtin_type_ieee_double_big;
140 break;
141 case BFD_ENDIAN_LITTLE:
142 memtype = builtin_type_ieee_double_little;
143 break;
144 default:
145 internal_error (__FILE__, __LINE__, "bad switch");
146 }
147 convert_typed_floating (val, type, memval, memtype);
148 write_memory (sp + argoffset, val, len);
149 }
150 argoffset += 8;
151 }
152 }
153 else if (len == 8 && (TYPE_CODE (type) == TYPE_CODE_INT /* long long */
154 || (!ppc_floating_point_unit_p (current_gdbarch) && TYPE_CODE (type) == TYPE_CODE_FLT))) /* double */
155 {
156 /* "long long" or "double" passed in an odd/even
157 register pair with the low addressed word in the odd
158 register and the high addressed word in the even
159 register, or when the registers run out an 8 byte
160 aligned stack location. */
161 if (greg > 9)
162 {
163 /* Just in case GREG was 10. */
164 greg = 11;
165 argoffset = align_up (argoffset, 8);
166 if (write_pass)
167 write_memory (sp + argoffset, val, len);
168 argoffset += 8;
169 }
170 else if (tdep->wordsize == 8)
171 {
172 if (write_pass)
173 regcache_cooked_write (regcache,
174 tdep->ppc_gp0_regnum + greg, val);
175 greg += 1;
176 }
177 else
178 {
179 /* Must start on an odd register - r3/r4 etc. */
180 if ((greg & 1) == 0)
181 greg++;
182 if (write_pass)
183 {
184 regcache_cooked_write (regcache,
185 tdep->ppc_gp0_regnum + greg + 0,
186 val + 0);
187 regcache_cooked_write (regcache,
188 tdep->ppc_gp0_regnum + greg + 1,
189 val + 4);
190 }
191 greg += 2;
192 }
193 }
194 else if (len == 16
195 && TYPE_CODE (type) == TYPE_CODE_ARRAY
196 && TYPE_VECTOR (type) && tdep->ppc_vr0_regnum >= 0)
197 {
198 /* Vector parameter passed in an Altivec register, or
199 when that runs out, 16 byte aligned stack location. */
200 if (vreg <= 13)
201 {
202 if (write_pass)
203 regcache_cooked_write (current_regcache,
204 tdep->ppc_vr0_regnum + vreg, val);
205 vreg++;
206 }
207 else
208 {
209 argoffset = align_up (argoffset, 16);
210 if (write_pass)
211 write_memory (sp + argoffset, val, 16);
212 argoffset += 16;
213 }
214 }
215 else if (len == 8
216 && TYPE_CODE (type) == TYPE_CODE_ARRAY
217 && TYPE_VECTOR (type) && tdep->ppc_ev0_regnum >= 0)
218 {
219 /* Vector parameter passed in an e500 register, or when
220 that runs out, 8 byte aligned stack location. Note
221 that since e500 vector and general purpose registers
222 both map onto the same underlying register set, a
223 "greg" and not a "vreg" is consumed here. A cooked
224 write stores the value in the correct locations
225 within the raw register cache. */
226 if (greg <= 10)
227 {
228 if (write_pass)
229 regcache_cooked_write (current_regcache,
230 tdep->ppc_ev0_regnum + greg, val);
231 greg++;
232 }
233 else
234 {
235 argoffset = align_up (argoffset, 8);
236 if (write_pass)
237 write_memory (sp + argoffset, val, 8);
238 argoffset += 8;
239 }
240 }
241 else
242 {
243 /* Reduce the parameter down to something that fits in a
244 "word". */
245 char word[MAX_REGISTER_SIZE];
246 memset (word, 0, MAX_REGISTER_SIZE);
247 if (len > tdep->wordsize
248 || TYPE_CODE (type) == TYPE_CODE_STRUCT
249 || TYPE_CODE (type) == TYPE_CODE_UNION)
250 {
251 /* Structs and large values are put on an 8 byte
252 aligned stack ... */
253 structoffset = align_up (structoffset, 8);
254 if (write_pass)
255 write_memory (sp + structoffset, val, len);
256 /* ... and then a "word" pointing to that address is
257 passed as the parameter. */
258 store_unsigned_integer (word, tdep->wordsize,
259 sp + structoffset);
260 structoffset += len;
261 }
262 else if (TYPE_CODE (type) == TYPE_CODE_INT)
263 /* Sign or zero extend the "int" into a "word". */
264 store_unsigned_integer (word, tdep->wordsize,
265 unpack_long (type, val));
266 else
267 /* Always goes in the low address. */
268 memcpy (word, val, len);
269 /* Store that "word" in a register, or on the stack.
270 The words have "4" byte alignment. */
271 if (greg <= 10)
272 {
273 if (write_pass)
274 regcache_cooked_write (regcache,
275 tdep->ppc_gp0_regnum + greg, word);
276 greg++;
277 }
278 else
279 {
280 argoffset = align_up (argoffset, tdep->wordsize);
281 if (write_pass)
282 write_memory (sp + argoffset, word, tdep->wordsize);
283 argoffset += tdep->wordsize;
284 }
285 }
286 }
287
288 /* Compute the actual stack space requirements. */
289 if (!write_pass)
290 {
291 /* Remember the amount of space needed by the arguments. */
292 argspace = argoffset;
293 /* Allocate space for both the arguments and the structures. */
294 sp -= (argoffset + structoffset);
295 /* Ensure that the stack is still 16 byte aligned. */
296 sp = align_down (sp, 16);
297 }
298 }
299
300 /* Update %sp. */
301 regcache_cooked_write_signed (regcache, SP_REGNUM, sp);
302
303 /* Write the backchain (it occupies WORDSIZED bytes). */
304 write_memory_signed_integer (sp, tdep->wordsize, saved_sp);
305
306 /* Point the inferior function call's return address at the dummy's
307 breakpoint. */
308 regcache_cooked_write_signed (regcache, tdep->ppc_lr_regnum, bp_addr);
309
310 return sp;
311 }
312
313 /* Handle the return-value conventions specified by the SysV 32-bit
314 PowerPC ABI (including all the supplements):
315
316 no floating-point: floating-point values returned using 32-bit
317 general-purpose registers.
318
319 Altivec: 128-bit vectors returned using vector registers.
320
321 e500: 64-bit vectors returned using the full full 64 bit EV
322 register, floating-point values returned using 32-bit
323 general-purpose registers.
324
325 GCC (broken): Small struct values right (instead of left) aligned
326 when returned in general-purpose registers. */
327
328 static enum return_value_convention
329 do_ppc_sysv_return_value (struct gdbarch *gdbarch, struct type *type,
330 struct regcache *regcache, void *readbuf,
331 const void *writebuf, int broken_gcc)
332 {
333 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
334 gdb_assert (tdep->wordsize == 4);
335 if (TYPE_CODE (type) == TYPE_CODE_FLT
336 && TYPE_LENGTH (type) <= 8
337 && ppc_floating_point_unit_p (gdbarch))
338 {
339 if (readbuf)
340 {
341 /* Floats and doubles stored in "f1". Convert the value to
342 the required type. */
343 char regval[MAX_REGISTER_SIZE];
344 struct type *regtype = register_type (gdbarch,
345 tdep->ppc_fp0_regnum + 1);
346 regcache_cooked_read (regcache, tdep->ppc_fp0_regnum + 1, regval);
347 convert_typed_floating (regval, regtype, readbuf, type);
348 }
349 if (writebuf)
350 {
351 /* Floats and doubles stored in "f1". Convert the value to
352 the register's "double" type. */
353 char regval[MAX_REGISTER_SIZE];
354 struct type *regtype = register_type (gdbarch, tdep->ppc_fp0_regnum);
355 convert_typed_floating (writebuf, type, regval, regtype);
356 regcache_cooked_write (regcache, tdep->ppc_fp0_regnum + 1, regval);
357 }
358 return RETURN_VALUE_REGISTER_CONVENTION;
359 }
360 if ((TYPE_CODE (type) == TYPE_CODE_INT && TYPE_LENGTH (type) == 8)
361 || (TYPE_CODE (type) == TYPE_CODE_FLT && TYPE_LENGTH (type) == 8))
362 {
363 if (readbuf)
364 {
365 /* A long long, or a double stored in the 32 bit r3/r4. */
366 regcache_cooked_read (regcache, tdep->ppc_gp0_regnum + 3,
367 (bfd_byte *) readbuf + 0);
368 regcache_cooked_read (regcache, tdep->ppc_gp0_regnum + 4,
369 (bfd_byte *) readbuf + 4);
370 }
371 if (writebuf)
372 {
373 /* A long long, or a double stored in the 32 bit r3/r4. */
374 regcache_cooked_write (regcache, tdep->ppc_gp0_regnum + 3,
375 (const bfd_byte *) writebuf + 0);
376 regcache_cooked_write (regcache, tdep->ppc_gp0_regnum + 4,
377 (const bfd_byte *) writebuf + 4);
378 }
379 return RETURN_VALUE_REGISTER_CONVENTION;
380 }
381 if (TYPE_CODE (type) == TYPE_CODE_INT
382 && TYPE_LENGTH (type) <= tdep->wordsize)
383 {
384 if (readbuf)
385 {
386 /* Some sort of integer stored in r3. Since TYPE isn't
387 bigger than the register, sign extension isn't a problem
388 - just do everything unsigned. */
389 ULONGEST regval;
390 regcache_cooked_read_unsigned (regcache, tdep->ppc_gp0_regnum + 3,
391 &regval);
392 store_unsigned_integer (readbuf, TYPE_LENGTH (type), regval);
393 }
394 if (writebuf)
395 {
396 /* Some sort of integer stored in r3. Use unpack_long since
397 that should handle any required sign extension. */
398 regcache_cooked_write_unsigned (regcache, tdep->ppc_gp0_regnum + 3,
399 unpack_long (type, writebuf));
400 }
401 return RETURN_VALUE_REGISTER_CONVENTION;
402 }
403 if (TYPE_LENGTH (type) == 16
404 && TYPE_CODE (type) == TYPE_CODE_ARRAY
405 && TYPE_VECTOR (type) && tdep->ppc_vr0_regnum >= 0)
406 {
407 if (readbuf)
408 {
409 /* Altivec places the return value in "v2". */
410 regcache_cooked_read (regcache, tdep->ppc_vr0_regnum + 2, readbuf);
411 }
412 if (writebuf)
413 {
414 /* Altivec places the return value in "v2". */
415 regcache_cooked_write (regcache, tdep->ppc_vr0_regnum + 2, writebuf);
416 }
417 return RETURN_VALUE_REGISTER_CONVENTION;
418 }
419 if (TYPE_LENGTH (type) == 8
420 && TYPE_CODE (type) == TYPE_CODE_ARRAY
421 && TYPE_VECTOR (type) && tdep->ppc_ev0_regnum >= 0)
422 {
423 /* The e500 ABI places return values for the 64-bit DSP types
424 (__ev64_opaque__) in r3. However, in GDB-speak, ev3
425 corresponds to the entire r3 value for e500, whereas GDB's r3
426 only corresponds to the least significant 32-bits. So place
427 the 64-bit DSP type's value in ev3. */
428 if (readbuf)
429 regcache_cooked_read (regcache, tdep->ppc_ev0_regnum + 3, readbuf);
430 if (writebuf)
431 regcache_cooked_write (regcache, tdep->ppc_ev0_regnum + 3, writebuf);
432 return RETURN_VALUE_REGISTER_CONVENTION;
433 }
434 if (broken_gcc && TYPE_LENGTH (type) <= 8)
435 {
436 if (readbuf)
437 {
438 /* GCC screwed up. The last register isn't "left" aligned.
439 Need to extract the least significant part of each
440 register and then store that. */
441 /* Transfer any full words. */
442 int word = 0;
443 while (1)
444 {
445 ULONGEST reg;
446 int len = TYPE_LENGTH (type) - word * tdep->wordsize;
447 if (len <= 0)
448 break;
449 if (len > tdep->wordsize)
450 len = tdep->wordsize;
451 regcache_cooked_read_unsigned (regcache,
452 tdep->ppc_gp0_regnum + 3 + word,
453 &reg);
454 store_unsigned_integer (((bfd_byte *) readbuf
455 + word * tdep->wordsize), len, reg);
456 word++;
457 }
458 }
459 if (writebuf)
460 {
461 /* GCC screwed up. The last register isn't "left" aligned.
462 Need to extract the least significant part of each
463 register and then store that. */
464 /* Transfer any full words. */
465 int word = 0;
466 while (1)
467 {
468 ULONGEST reg;
469 int len = TYPE_LENGTH (type) - word * tdep->wordsize;
470 if (len <= 0)
471 break;
472 if (len > tdep->wordsize)
473 len = tdep->wordsize;
474 reg = extract_unsigned_integer (((const bfd_byte *) writebuf
475 + word * tdep->wordsize), len);
476 regcache_cooked_write_unsigned (regcache,
477 tdep->ppc_gp0_regnum + 3 + word,
478 reg);
479 word++;
480 }
481 }
482 return RETURN_VALUE_REGISTER_CONVENTION;
483 }
484 if (TYPE_LENGTH (type) <= 8)
485 {
486 if (readbuf)
487 {
488 /* This matches SVr4 PPC, it does not match GCC. */
489 /* The value is right-padded to 8 bytes and then loaded, as
490 two "words", into r3/r4. */
491 char regvals[MAX_REGISTER_SIZE * 2];
492 regcache_cooked_read (regcache, tdep->ppc_gp0_regnum + 3,
493 regvals + 0 * tdep->wordsize);
494 if (TYPE_LENGTH (type) > tdep->wordsize)
495 regcache_cooked_read (regcache, tdep->ppc_gp0_regnum + 4,
496 regvals + 1 * tdep->wordsize);
497 memcpy (readbuf, regvals, TYPE_LENGTH (type));
498 }
499 if (writebuf)
500 {
501 /* This matches SVr4 PPC, it does not match GCC. */
502 /* The value is padded out to 8 bytes and then loaded, as
503 two "words" into r3/r4. */
504 char regvals[MAX_REGISTER_SIZE * 2];
505 memset (regvals, 0, sizeof regvals);
506 memcpy (regvals, writebuf, TYPE_LENGTH (type));
507 regcache_cooked_write (regcache, tdep->ppc_gp0_regnum + 3,
508 regvals + 0 * tdep->wordsize);
509 if (TYPE_LENGTH (type) > tdep->wordsize)
510 regcache_cooked_write (regcache, tdep->ppc_gp0_regnum + 4,
511 regvals + 1 * tdep->wordsize);
512 }
513 return RETURN_VALUE_REGISTER_CONVENTION;
514 }
515 return RETURN_VALUE_STRUCT_CONVENTION;
516 }
517
518 enum return_value_convention
519 ppc_sysv_abi_return_value (struct gdbarch *gdbarch, struct type *valtype,
520 struct regcache *regcache, void *readbuf,
521 const void *writebuf)
522 {
523 return do_ppc_sysv_return_value (gdbarch, valtype, regcache, readbuf,
524 writebuf, 0);
525 }
526
527 enum return_value_convention
528 ppc_sysv_abi_broken_return_value (struct gdbarch *gdbarch,
529 struct type *valtype,
530 struct regcache *regcache,
531 void *readbuf, const void *writebuf)
532 {
533 return do_ppc_sysv_return_value (gdbarch, valtype, regcache, readbuf,
534 writebuf, 1);
535 }
536
537 /* Pass the arguments in either registers, or in the stack. Using the
538 ppc 64 bit SysV ABI.
539
540 This implements a dumbed down version of the ABI. It always writes
541 values to memory, GPR and FPR, even when not necessary. Doing this
542 greatly simplifies the logic. */
543
544 CORE_ADDR
545 ppc64_sysv_abi_push_dummy_call (struct gdbarch *gdbarch, struct value *function,
546 struct regcache *regcache, CORE_ADDR bp_addr,
547 int nargs, struct value **args, CORE_ADDR sp,
548 int struct_return, CORE_ADDR struct_addr)
549 {
550 CORE_ADDR func_addr = find_function_addr (function, NULL);
551 struct gdbarch_tdep *tdep = gdbarch_tdep (current_gdbarch);
552 /* By this stage in the proceedings, SP has been decremented by "red
553 zone size" + "struct return size". Fetch the stack-pointer from
554 before this and use that as the BACK_CHAIN. */
555 const CORE_ADDR back_chain = read_sp ();
556 /* See for-loop comment below. */
557 int write_pass;
558 /* Size of the Altivec's vector parameter region, the final value is
559 computed in the for-loop below. */
560 LONGEST vparam_size = 0;
561 /* Size of the general parameter region, the final value is computed
562 in the for-loop below. */
563 LONGEST gparam_size = 0;
564 /* Kevin writes ... I don't mind seeing tdep->wordsize used in the
565 calls to align_up(), align_down(), etc. because this makes it
566 easier to reuse this code (in a copy/paste sense) in the future,
567 but it is a 64-bit ABI and asserting that the wordsize is 8 bytes
568 at some point makes it easier to verify that this function is
569 correct without having to do a non-local analysis to figure out
570 the possible values of tdep->wordsize. */
571 gdb_assert (tdep->wordsize == 8);
572
573 /* Go through the argument list twice.
574
575 Pass 1: Compute the function call's stack space and register
576 requirements.
577
578 Pass 2: Replay the same computation but this time also write the
579 values out to the target. */
580
581 for (write_pass = 0; write_pass < 2; write_pass++)
582 {
583 int argno;
584 /* Next available floating point register for float and double
585 arguments. */
586 int freg = 1;
587 /* Next available general register for non-vector (but possibly
588 float) arguments. */
589 int greg = 3;
590 /* Next available vector register for vector arguments. */
591 int vreg = 2;
592 /* The address, at which the next general purpose parameter
593 (integer, struct, float, ...) should be saved. */
594 CORE_ADDR gparam;
595 /* Address, at which the next Altivec vector parameter should be
596 saved. */
597 CORE_ADDR vparam;
598
599 if (!write_pass)
600 {
601 /* During the first pass, GPARAM and VPARAM are more like
602 offsets (start address zero) than addresses. That way
603 the accumulate the total stack space each region
604 requires. */
605 gparam = 0;
606 vparam = 0;
607 }
608 else
609 {
610 /* Decrement the stack pointer making space for the Altivec
611 and general on-stack parameters. Set vparam and gparam
612 to their corresponding regions. */
613 vparam = align_down (sp - vparam_size, 16);
614 gparam = align_down (vparam - gparam_size, 16);
615 /* Add in space for the TOC, link editor double word,
616 compiler double word, LR save area, CR save area. */
617 sp = align_down (gparam - 48, 16);
618 }
619
620 /* If the function is returning a `struct', then there is an
621 extra hidden parameter (which will be passed in r3)
622 containing the address of that struct.. In that case we
623 should advance one word and start from r4 register to copy
624 parameters. This also consumes one on-stack parameter slot. */
625 if (struct_return)
626 {
627 if (write_pass)
628 regcache_cooked_write_signed (regcache,
629 tdep->ppc_gp0_regnum + greg,
630 struct_addr);
631 greg++;
632 gparam = align_up (gparam + tdep->wordsize, tdep->wordsize);
633 }
634
635 for (argno = 0; argno < nargs; argno++)
636 {
637 struct value *arg = args[argno];
638 struct type *type = check_typedef (value_type (arg));
639 const bfd_byte *val = value_contents (arg);
640 if (TYPE_CODE (type) == TYPE_CODE_FLT && TYPE_LENGTH (type) <= 8)
641 {
642 /* Floats and Doubles go in f1 .. f13. They also
643 consume a left aligned GREG,, and can end up in
644 memory. */
645 if (write_pass)
646 {
647 if (ppc_floating_point_unit_p (current_gdbarch)
648 && freg <= 13)
649 {
650 char regval[MAX_REGISTER_SIZE];
651 struct type *regtype
652 = register_type (gdbarch, tdep->ppc_fp0_regnum);
653 convert_typed_floating (val, type, regval, regtype);
654 regcache_cooked_write (regcache,
655 tdep->ppc_fp0_regnum + freg,
656 regval);
657 }
658 if (greg <= 10)
659 {
660 /* The ABI states "Single precision floating
661 point values are mapped to the first word in
662 a single doubleword" and "... floating point
663 values mapped to the first eight doublewords
664 of the parameter save area are also passed in
665 general registers").
666
667 This code interprets that to mean: store it,
668 left aligned, in the general register. */
669 char regval[MAX_REGISTER_SIZE];
670 memset (regval, 0, sizeof regval);
671 memcpy (regval, val, TYPE_LENGTH (type));
672 regcache_cooked_write (regcache,
673 tdep->ppc_gp0_regnum + greg,
674 regval);
675 }
676 write_memory (gparam, val, TYPE_LENGTH (type));
677 }
678 /* Always consume parameter stack space. */
679 freg++;
680 greg++;
681 gparam = align_up (gparam + TYPE_LENGTH (type), tdep->wordsize);
682 }
683 else if (TYPE_LENGTH (type) == 16 && TYPE_VECTOR (type)
684 && TYPE_CODE (type) == TYPE_CODE_ARRAY
685 && tdep->ppc_vr0_regnum >= 0)
686 {
687 /* In the Altivec ABI, vectors go in the vector
688 registers v2 .. v13, or when that runs out, a vector
689 annex which goes above all the normal parameters.
690 NOTE: cagney/2003-09-21: This is a guess based on the
691 PowerOpen Altivec ABI. */
692 if (vreg <= 13)
693 {
694 if (write_pass)
695 regcache_cooked_write (regcache,
696 tdep->ppc_vr0_regnum + vreg, val);
697 vreg++;
698 }
699 else
700 {
701 if (write_pass)
702 write_memory (vparam, val, TYPE_LENGTH (type));
703 vparam = align_up (vparam + TYPE_LENGTH (type), 16);
704 }
705 }
706 else if ((TYPE_CODE (type) == TYPE_CODE_INT
707 || TYPE_CODE (type) == TYPE_CODE_ENUM)
708 && TYPE_LENGTH (type) <= 8)
709 {
710 /* Scalars get sign[un]extended and go in gpr3 .. gpr10.
711 They can also end up in memory. */
712 if (write_pass)
713 {
714 /* Sign extend the value, then store it unsigned. */
715 ULONGEST word = unpack_long (type, val);
716 if (greg <= 10)
717 regcache_cooked_write_unsigned (regcache,
718 tdep->ppc_gp0_regnum +
719 greg, word);
720 write_memory_unsigned_integer (gparam, tdep->wordsize,
721 word);
722 }
723 greg++;
724 gparam = align_up (gparam + TYPE_LENGTH (type), tdep->wordsize);
725 }
726 else
727 {
728 int byte;
729 for (byte = 0; byte < TYPE_LENGTH (type);
730 byte += tdep->wordsize)
731 {
732 if (write_pass && greg <= 10)
733 {
734 char regval[MAX_REGISTER_SIZE];
735 int len = TYPE_LENGTH (type) - byte;
736 if (len > tdep->wordsize)
737 len = tdep->wordsize;
738 memset (regval, 0, sizeof regval);
739 /* WARNING: cagney/2003-09-21: As best I can
740 tell, the ABI specifies that the value should
741 be left aligned. Unfortunately, GCC doesn't
742 do this - it instead right aligns even sized
743 values and puts odd sized values on the
744 stack. Work around that by putting both a
745 left and right aligned value into the
746 register (hopefully no one notices :-^).
747 Arrrgh! */
748 /* Left aligned (8 byte values such as pointers
749 fill the buffer). */
750 memcpy (regval, val + byte, len);
751 /* Right aligned (but only if even). */
752 if (len == 1 || len == 2 || len == 4)
753 memcpy (regval + tdep->wordsize - len,
754 val + byte, len);
755 regcache_cooked_write (regcache, greg, regval);
756 }
757 greg++;
758 }
759 if (write_pass)
760 /* WARNING: cagney/2003-09-21: Strictly speaking, this
761 isn't necessary, unfortunately, GCC appears to get
762 "struct convention" parameter passing wrong putting
763 odd sized structures in memory instead of in a
764 register. Work around this by always writing the
765 value to memory. Fortunately, doing this
766 simplifies the code. */
767 write_memory (gparam, val, TYPE_LENGTH (type));
768 /* Always consume parameter stack space. */
769 gparam = align_up (gparam + TYPE_LENGTH (type), tdep->wordsize);
770 }
771 }
772
773 if (!write_pass)
774 {
775 /* Save the true region sizes ready for the second pass. */
776 vparam_size = vparam;
777 /* Make certain that the general parameter save area is at
778 least the minimum 8 registers (or doublewords) in size. */
779 if (greg < 8)
780 gparam_size = 8 * tdep->wordsize;
781 else
782 gparam_size = gparam;
783 }
784 }
785
786 /* Update %sp. */
787 regcache_cooked_write_signed (regcache, SP_REGNUM, sp);
788
789 /* Write the backchain (it occupies WORDSIZED bytes). */
790 write_memory_signed_integer (sp, tdep->wordsize, back_chain);
791
792 /* Point the inferior function call's return address at the dummy's
793 breakpoint. */
794 regcache_cooked_write_signed (regcache, tdep->ppc_lr_regnum, bp_addr);
795
796 /* Find a value for the TOC register. Every symbol should have both
797 ".FN" and "FN" in the minimal symbol table. "FN" points at the
798 FN's descriptor, while ".FN" points at the entry point (which
799 matches FUNC_ADDR). Need to reverse from FUNC_ADDR back to the
800 FN's descriptor address (while at the same time being careful to
801 find "FN" in the same object file as ".FN"). */
802 {
803 /* Find the minimal symbol that corresponds to FUNC_ADDR (should
804 have the name ".FN"). */
805 struct minimal_symbol *dot_fn = lookup_minimal_symbol_by_pc (func_addr);
806 if (dot_fn != NULL && SYMBOL_LINKAGE_NAME (dot_fn)[0] == '.')
807 {
808 /* Get the section that contains FUNC_ADR. Need this for the
809 "objfile" that it contains. */
810 struct obj_section *dot_fn_section = find_pc_section (func_addr);
811 if (dot_fn_section != NULL && dot_fn_section->objfile != NULL)
812 {
813 /* Now find the corresponding "FN" (dropping ".") minimal
814 symbol's address. Only look for the minimal symbol in
815 ".FN"'s object file - avoids problems when two object
816 files (i.e., shared libraries) contain a minimal symbol
817 with the same name. */
818 struct minimal_symbol *fn =
819 lookup_minimal_symbol (SYMBOL_LINKAGE_NAME (dot_fn) + 1, NULL,
820 dot_fn_section->objfile);
821 if (fn != NULL)
822 {
823 /* Got the address of that descriptor. The TOC is the
824 second double word. */
825 CORE_ADDR toc =
826 read_memory_unsigned_integer (SYMBOL_VALUE_ADDRESS (fn)
827 + tdep->wordsize,
828 tdep->wordsize);
829 regcache_cooked_write_unsigned (regcache,
830 tdep->ppc_gp0_regnum + 2, toc);
831 }
832 }
833 }
834 }
835
836 return sp;
837 }
838
839
840 /* The 64 bit ABI retun value convention.
841
842 Return non-zero if the return-value is stored in a register, return
843 0 if the return-value is instead stored on the stack (a.k.a.,
844 struct return convention).
845
846 For a return-value stored in a register: when WRITEBUF is non-NULL,
847 copy the buffer to the corresponding register return-value location
848 location; when READBUF is non-NULL, fill the buffer from the
849 corresponding register return-value location. */
850 enum return_value_convention
851 ppc64_sysv_abi_return_value (struct gdbarch *gdbarch, struct type *valtype,
852 struct regcache *regcache, void *readbuf,
853 const void *writebuf)
854 {
855 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
856
857 /* This function exists to support a calling convention that
858 requires floating-point registers. It shouldn't be used on
859 processors that lack them. */
860 gdb_assert (ppc_floating_point_unit_p (gdbarch));
861
862 /* Floats and doubles in F1. */
863 if (TYPE_CODE (valtype) == TYPE_CODE_FLT && TYPE_LENGTH (valtype) <= 8)
864 {
865 char regval[MAX_REGISTER_SIZE];
866 struct type *regtype = register_type (gdbarch, tdep->ppc_fp0_regnum);
867 if (writebuf != NULL)
868 {
869 convert_typed_floating (writebuf, valtype, regval, regtype);
870 regcache_cooked_write (regcache, tdep->ppc_fp0_regnum + 1, regval);
871 }
872 if (readbuf != NULL)
873 {
874 regcache_cooked_read (regcache, tdep->ppc_fp0_regnum + 1, regval);
875 convert_typed_floating (regval, regtype, readbuf, valtype);
876 }
877 return RETURN_VALUE_REGISTER_CONVENTION;
878 }
879 if (TYPE_CODE (valtype) == TYPE_CODE_INT && TYPE_LENGTH (valtype) <= 8)
880 {
881 /* Integers in r3. */
882 if (writebuf != NULL)
883 {
884 /* Be careful to sign extend the value. */
885 regcache_cooked_write_unsigned (regcache, tdep->ppc_gp0_regnum + 3,
886 unpack_long (valtype, writebuf));
887 }
888 if (readbuf != NULL)
889 {
890 /* Extract the integer from r3. Since this is truncating the
891 value, there isn't a sign extension problem. */
892 ULONGEST regval;
893 regcache_cooked_read_unsigned (regcache, tdep->ppc_gp0_regnum + 3,
894 &regval);
895 store_unsigned_integer (readbuf, TYPE_LENGTH (valtype), regval);
896 }
897 return RETURN_VALUE_REGISTER_CONVENTION;
898 }
899 /* All pointers live in r3. */
900 if (TYPE_CODE (valtype) == TYPE_CODE_PTR)
901 {
902 /* All pointers live in r3. */
903 if (writebuf != NULL)
904 regcache_cooked_write (regcache, tdep->ppc_gp0_regnum + 3, writebuf);
905 if (readbuf != NULL)
906 regcache_cooked_read (regcache, tdep->ppc_gp0_regnum + 3, readbuf);
907 return RETURN_VALUE_REGISTER_CONVENTION;
908 }
909 if (TYPE_CODE (valtype) == TYPE_CODE_ARRAY
910 && TYPE_LENGTH (valtype) <= 8
911 && TYPE_CODE (TYPE_TARGET_TYPE (valtype)) == TYPE_CODE_INT
912 && TYPE_LENGTH (TYPE_TARGET_TYPE (valtype)) == 1)
913 {
914 /* Small character arrays are returned, right justified, in r3. */
915 int offset = (register_size (gdbarch, tdep->ppc_gp0_regnum + 3)
916 - TYPE_LENGTH (valtype));
917 if (writebuf != NULL)
918 regcache_cooked_write_part (regcache, tdep->ppc_gp0_regnum + 3,
919 offset, TYPE_LENGTH (valtype), writebuf);
920 if (readbuf != NULL)
921 regcache_cooked_read_part (regcache, tdep->ppc_gp0_regnum + 3,
922 offset, TYPE_LENGTH (valtype), readbuf);
923 return RETURN_VALUE_REGISTER_CONVENTION;
924 }
925 /* Big floating point values get stored in adjacent floating
926 point registers. */
927 if (TYPE_CODE (valtype) == TYPE_CODE_FLT
928 && (TYPE_LENGTH (valtype) == 16 || TYPE_LENGTH (valtype) == 32))
929 {
930 if (writebuf || readbuf != NULL)
931 {
932 int i;
933 for (i = 0; i < TYPE_LENGTH (valtype) / 8; i++)
934 {
935 if (writebuf != NULL)
936 regcache_cooked_write (regcache, tdep->ppc_fp0_regnum + 1 + i,
937 (const bfd_byte *) writebuf + i * 8);
938 if (readbuf != NULL)
939 regcache_cooked_read (regcache, tdep->ppc_fp0_regnum + 1 + i,
940 (bfd_byte *) readbuf + i * 8);
941 }
942 }
943 return RETURN_VALUE_REGISTER_CONVENTION;
944 }
945 /* Complex values get returned in f1:f2, need to convert. */
946 if (TYPE_CODE (valtype) == TYPE_CODE_COMPLEX
947 && (TYPE_LENGTH (valtype) == 8 || TYPE_LENGTH (valtype) == 16))
948 {
949 if (regcache != NULL)
950 {
951 int i;
952 for (i = 0; i < 2; i++)
953 {
954 char regval[MAX_REGISTER_SIZE];
955 struct type *regtype =
956 register_type (current_gdbarch, tdep->ppc_fp0_regnum);
957 if (writebuf != NULL)
958 {
959 convert_typed_floating ((const bfd_byte *) writebuf +
960 i * (TYPE_LENGTH (valtype) / 2),
961 valtype, regval, regtype);
962 regcache_cooked_write (regcache,
963 tdep->ppc_fp0_regnum + 1 + i,
964 regval);
965 }
966 if (readbuf != NULL)
967 {
968 regcache_cooked_read (regcache,
969 tdep->ppc_fp0_regnum + 1 + i,
970 regval);
971 convert_typed_floating (regval, regtype,
972 (bfd_byte *) readbuf +
973 i * (TYPE_LENGTH (valtype) / 2),
974 valtype);
975 }
976 }
977 }
978 return RETURN_VALUE_REGISTER_CONVENTION;
979 }
980 /* Big complex values get stored in f1:f4. */
981 if (TYPE_CODE (valtype) == TYPE_CODE_COMPLEX && TYPE_LENGTH (valtype) == 32)
982 {
983 if (regcache != NULL)
984 {
985 int i;
986 for (i = 0; i < 4; i++)
987 {
988 if (writebuf != NULL)
989 regcache_cooked_write (regcache, tdep->ppc_fp0_regnum + 1 + i,
990 (const bfd_byte *) writebuf + i * 8);
991 if (readbuf != NULL)
992 regcache_cooked_read (regcache, tdep->ppc_fp0_regnum + 1 + i,
993 (bfd_byte *) readbuf + i * 8);
994 }
995 }
996 return RETURN_VALUE_REGISTER_CONVENTION;
997 }
998 return RETURN_VALUE_STRUCT_CONVENTION;
999 }
1000
1001 CORE_ADDR
1002 ppc64_sysv_abi_adjust_breakpoint_address (struct gdbarch *gdbarch,
1003 CORE_ADDR bpaddr)
1004 {
1005 /* PPC64 SYSV specifies that the minimal-symbol "FN" should point at
1006 a function-descriptor while the corresponding minimal-symbol
1007 ".FN" should point at the entry point. Consequently, a command
1008 like "break FN" applied to an object file with only minimal
1009 symbols, will insert the breakpoint into the descriptor at "FN"
1010 and not the function at ".FN". Avoid this confusion by adjusting
1011 any attempt to set a descriptor breakpoint into a corresponding
1012 function breakpoint. Note that GDB warns the user when this
1013 adjustment is applied - that's ok as otherwise the user will have
1014 no way of knowing why their breakpoint at "FN" resulted in the
1015 program stopping at ".FN". */
1016 return gdbarch_convert_from_func_ptr_addr (gdbarch, bpaddr, &current_target);
1017 }