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1 /* Target-dependent code for PowerPC systems using the SVR4 ABI
2 for GDB, the GNU debugger.
3
4 Copyright (C) 2000, 2001, 2002, 2003, 2005, 2007
5 Free Software Foundation, Inc.
6
7 This file is part of GDB.
8
9 This program is free software; you can redistribute it and/or modify
10 it under the terms of the GNU General Public License as published by
11 the Free Software Foundation; either version 2 of the License, or
12 (at your option) any later version.
13
14 This program is distributed in the hope that it will be useful,
15 but WITHOUT ANY WARRANTY; without even the implied warranty of
16 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 GNU General Public License for more details.
18
19 You should have received a copy of the GNU General Public License
20 along with this program; if not, write to the Free Software
21 Foundation, Inc., 51 Franklin Street, Fifth Floor,
22 Boston, MA 02110-1301, USA. */
23
24 #include "defs.h"
25 #include "gdbcore.h"
26 #include "inferior.h"
27 #include "regcache.h"
28 #include "value.h"
29 #include "gdb_string.h"
30 #include "gdb_assert.h"
31 #include "ppc-tdep.h"
32 #include "target.h"
33 #include "objfiles.h"
34 #include "infcall.h"
35
36 /* Pass the arguments in either registers, or in the stack. Using the
37 ppc sysv ABI, the first eight words of the argument list (that might
38 be less than eight parameters if some parameters occupy more than one
39 word) are passed in r3..r10 registers. float and double parameters are
40 passed in fpr's, in addition to that. Rest of the parameters if any
41 are passed in user stack.
42
43 If the function is returning a structure, then the return address is passed
44 in r3, then the first 7 words of the parametes can be passed in registers,
45 starting from r4. */
46
47 CORE_ADDR
48 ppc_sysv_abi_push_dummy_call (struct gdbarch *gdbarch, struct value *function,
49 struct regcache *regcache, CORE_ADDR bp_addr,
50 int nargs, struct value **args, CORE_ADDR sp,
51 int struct_return, CORE_ADDR struct_addr)
52 {
53 struct gdbarch_tdep *tdep = gdbarch_tdep (current_gdbarch);
54 const CORE_ADDR saved_sp = read_sp ();
55 int argspace = 0; /* 0 is an initial wrong guess. */
56 int write_pass;
57
58 /* Go through the argument list twice.
59
60 Pass 1: Figure out how much new stack space is required for
61 arguments and pushed values. Unlike the PowerOpen ABI, the SysV
62 ABI doesn't reserve any extra space for parameters which are put
63 in registers, but does always push structures and then pass their
64 address.
65
66 Pass 2: Replay the same computation but this time also write the
67 values out to the target. */
68
69 for (write_pass = 0; write_pass < 2; write_pass++)
70 {
71 int argno;
72 /* Next available floating point register for float and double
73 arguments. */
74 int freg = 1;
75 /* Next available general register for non-float, non-vector
76 arguments. */
77 int greg = 3;
78 /* Next available vector register for vector arguments. */
79 int vreg = 2;
80 /* Arguments start above the "LR save word" and "Back chain". */
81 int argoffset = 2 * tdep->wordsize;
82 /* Structures start after the arguments. */
83 int structoffset = argoffset + argspace;
84
85 /* If the function is returning a `struct', then the first word
86 (which will be passed in r3) is used for struct return
87 address. In that case we should advance one word and start
88 from r4 register to copy parameters. */
89 if (struct_return)
90 {
91 if (write_pass)
92 regcache_cooked_write_signed (regcache,
93 tdep->ppc_gp0_regnum + greg,
94 struct_addr);
95 greg++;
96 }
97
98 for (argno = 0; argno < nargs; argno++)
99 {
100 struct value *arg = args[argno];
101 struct type *type = check_typedef (value_type (arg));
102 int len = TYPE_LENGTH (type);
103 const bfd_byte *val = value_contents (arg);
104
105 if (TYPE_CODE (type) == TYPE_CODE_FLT
106 && ppc_floating_point_unit_p (current_gdbarch) && len <= 8)
107 {
108 /* Floating point value converted to "double" then
109 passed in an FP register, when the registers run out,
110 8 byte aligned stack is used. */
111 if (freg <= 8)
112 {
113 if (write_pass)
114 {
115 /* Always store the floating point value using
116 the register's floating-point format. */
117 gdb_byte regval[MAX_REGISTER_SIZE];
118 struct type *regtype
119 = register_type (gdbarch, tdep->ppc_fp0_regnum + freg);
120 convert_typed_floating (val, type, regval, regtype);
121 regcache_cooked_write (regcache,
122 tdep->ppc_fp0_regnum + freg,
123 regval);
124 }
125 freg++;
126 }
127 else
128 {
129 /* SysV ABI converts floats to doubles before
130 writing them to an 8 byte aligned stack location. */
131 argoffset = align_up (argoffset, 8);
132 if (write_pass)
133 {
134 char memval[8];
135 convert_typed_floating (val, type, memval,
136 builtin_type_ieee_double);
137 write_memory (sp + argoffset, val, len);
138 }
139 argoffset += 8;
140 }
141 }
142 else if (len == 8 && (TYPE_CODE (type) == TYPE_CODE_INT /* long long */
143 || (!ppc_floating_point_unit_p (current_gdbarch) && TYPE_CODE (type) == TYPE_CODE_FLT))) /* double */
144 {
145 /* "long long" or "double" passed in an odd/even
146 register pair with the low addressed word in the odd
147 register and the high addressed word in the even
148 register, or when the registers run out an 8 byte
149 aligned stack location. */
150 if (greg > 9)
151 {
152 /* Just in case GREG was 10. */
153 greg = 11;
154 argoffset = align_up (argoffset, 8);
155 if (write_pass)
156 write_memory (sp + argoffset, val, len);
157 argoffset += 8;
158 }
159 else if (tdep->wordsize == 8)
160 {
161 if (write_pass)
162 regcache_cooked_write (regcache,
163 tdep->ppc_gp0_regnum + greg, val);
164 greg += 1;
165 }
166 else
167 {
168 /* Must start on an odd register - r3/r4 etc. */
169 if ((greg & 1) == 0)
170 greg++;
171 if (write_pass)
172 {
173 regcache_cooked_write (regcache,
174 tdep->ppc_gp0_regnum + greg + 0,
175 val + 0);
176 regcache_cooked_write (regcache,
177 tdep->ppc_gp0_regnum + greg + 1,
178 val + 4);
179 }
180 greg += 2;
181 }
182 }
183 else if (len == 16
184 && TYPE_CODE (type) == TYPE_CODE_ARRAY
185 && TYPE_VECTOR (type) && tdep->ppc_vr0_regnum >= 0)
186 {
187 /* Vector parameter passed in an Altivec register, or
188 when that runs out, 16 byte aligned stack location. */
189 if (vreg <= 13)
190 {
191 if (write_pass)
192 regcache_cooked_write (current_regcache,
193 tdep->ppc_vr0_regnum + vreg, val);
194 vreg++;
195 }
196 else
197 {
198 argoffset = align_up (argoffset, 16);
199 if (write_pass)
200 write_memory (sp + argoffset, val, 16);
201 argoffset += 16;
202 }
203 }
204 else if (len == 8
205 && TYPE_CODE (type) == TYPE_CODE_ARRAY
206 && TYPE_VECTOR (type) && tdep->ppc_ev0_regnum >= 0)
207 {
208 /* Vector parameter passed in an e500 register, or when
209 that runs out, 8 byte aligned stack location. Note
210 that since e500 vector and general purpose registers
211 both map onto the same underlying register set, a
212 "greg" and not a "vreg" is consumed here. A cooked
213 write stores the value in the correct locations
214 within the raw register cache. */
215 if (greg <= 10)
216 {
217 if (write_pass)
218 regcache_cooked_write (current_regcache,
219 tdep->ppc_ev0_regnum + greg, val);
220 greg++;
221 }
222 else
223 {
224 argoffset = align_up (argoffset, 8);
225 if (write_pass)
226 write_memory (sp + argoffset, val, 8);
227 argoffset += 8;
228 }
229 }
230 else
231 {
232 /* Reduce the parameter down to something that fits in a
233 "word". */
234 gdb_byte word[MAX_REGISTER_SIZE];
235 memset (word, 0, MAX_REGISTER_SIZE);
236 if (len > tdep->wordsize
237 || TYPE_CODE (type) == TYPE_CODE_STRUCT
238 || TYPE_CODE (type) == TYPE_CODE_UNION)
239 {
240 /* Structs and large values are put on an 8 byte
241 aligned stack ... */
242 structoffset = align_up (structoffset, 8);
243 if (write_pass)
244 write_memory (sp + structoffset, val, len);
245 /* ... and then a "word" pointing to that address is
246 passed as the parameter. */
247 store_unsigned_integer (word, tdep->wordsize,
248 sp + structoffset);
249 structoffset += len;
250 }
251 else if (TYPE_CODE (type) == TYPE_CODE_INT)
252 /* Sign or zero extend the "int" into a "word". */
253 store_unsigned_integer (word, tdep->wordsize,
254 unpack_long (type, val));
255 else
256 /* Always goes in the low address. */
257 memcpy (word, val, len);
258 /* Store that "word" in a register, or on the stack.
259 The words have "4" byte alignment. */
260 if (greg <= 10)
261 {
262 if (write_pass)
263 regcache_cooked_write (regcache,
264 tdep->ppc_gp0_regnum + greg, word);
265 greg++;
266 }
267 else
268 {
269 argoffset = align_up (argoffset, tdep->wordsize);
270 if (write_pass)
271 write_memory (sp + argoffset, word, tdep->wordsize);
272 argoffset += tdep->wordsize;
273 }
274 }
275 }
276
277 /* Compute the actual stack space requirements. */
278 if (!write_pass)
279 {
280 /* Remember the amount of space needed by the arguments. */
281 argspace = argoffset;
282 /* Allocate space for both the arguments and the structures. */
283 sp -= (argoffset + structoffset);
284 /* Ensure that the stack is still 16 byte aligned. */
285 sp = align_down (sp, 16);
286 }
287
288 /* The psABI says that "A caller of a function that takes a
289 variable argument list shall set condition register bit 6 to
290 1 if it passes one or more arguments in the floating-point
291 registers. It is strongly recommended that the caller set the
292 bit to 0 otherwise..." Doing this for normal functions too
293 shouldn't hurt. */
294 if (write_pass)
295 {
296 ULONGEST cr;
297
298 regcache_cooked_read_unsigned (regcache, tdep->ppc_cr_regnum, &cr);
299 if (freg > 1)
300 cr |= 0x02000000;
301 else
302 cr &= ~0x02000000;
303 regcache_cooked_write_unsigned (regcache, tdep->ppc_cr_regnum, cr);
304 }
305 }
306
307 /* Update %sp. */
308 regcache_cooked_write_signed (regcache, SP_REGNUM, sp);
309
310 /* Write the backchain (it occupies WORDSIZED bytes). */
311 write_memory_signed_integer (sp, tdep->wordsize, saved_sp);
312
313 /* Point the inferior function call's return address at the dummy's
314 breakpoint. */
315 regcache_cooked_write_signed (regcache, tdep->ppc_lr_regnum, bp_addr);
316
317 return sp;
318 }
319
320 /* Handle the return-value conventions specified by the SysV 32-bit
321 PowerPC ABI (including all the supplements):
322
323 no floating-point: floating-point values returned using 32-bit
324 general-purpose registers.
325
326 Altivec: 128-bit vectors returned using vector registers.
327
328 e500: 64-bit vectors returned using the full full 64 bit EV
329 register, floating-point values returned using 32-bit
330 general-purpose registers.
331
332 GCC (broken): Small struct values right (instead of left) aligned
333 when returned in general-purpose registers. */
334
335 static enum return_value_convention
336 do_ppc_sysv_return_value (struct gdbarch *gdbarch, struct type *type,
337 struct regcache *regcache, void *readbuf,
338 const void *writebuf, int broken_gcc)
339 {
340 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
341 gdb_assert (tdep->wordsize == 4);
342 if (TYPE_CODE (type) == TYPE_CODE_FLT
343 && TYPE_LENGTH (type) <= 8
344 && ppc_floating_point_unit_p (gdbarch))
345 {
346 if (readbuf)
347 {
348 /* Floats and doubles stored in "f1". Convert the value to
349 the required type. */
350 gdb_byte regval[MAX_REGISTER_SIZE];
351 struct type *regtype = register_type (gdbarch,
352 tdep->ppc_fp0_regnum + 1);
353 regcache_cooked_read (regcache, tdep->ppc_fp0_regnum + 1, regval);
354 convert_typed_floating (regval, regtype, readbuf, type);
355 }
356 if (writebuf)
357 {
358 /* Floats and doubles stored in "f1". Convert the value to
359 the register's "double" type. */
360 gdb_byte regval[MAX_REGISTER_SIZE];
361 struct type *regtype = register_type (gdbarch, tdep->ppc_fp0_regnum);
362 convert_typed_floating (writebuf, type, regval, regtype);
363 regcache_cooked_write (regcache, tdep->ppc_fp0_regnum + 1, regval);
364 }
365 return RETURN_VALUE_REGISTER_CONVENTION;
366 }
367 if ((TYPE_CODE (type) == TYPE_CODE_INT && TYPE_LENGTH (type) == 8)
368 || (TYPE_CODE (type) == TYPE_CODE_FLT && TYPE_LENGTH (type) == 8))
369 {
370 if (readbuf)
371 {
372 /* A long long, or a double stored in the 32 bit r3/r4. */
373 regcache_cooked_read (regcache, tdep->ppc_gp0_regnum + 3,
374 (bfd_byte *) readbuf + 0);
375 regcache_cooked_read (regcache, tdep->ppc_gp0_regnum + 4,
376 (bfd_byte *) readbuf + 4);
377 }
378 if (writebuf)
379 {
380 /* A long long, or a double stored in the 32 bit r3/r4. */
381 regcache_cooked_write (regcache, tdep->ppc_gp0_regnum + 3,
382 (const bfd_byte *) writebuf + 0);
383 regcache_cooked_write (regcache, tdep->ppc_gp0_regnum + 4,
384 (const bfd_byte *) writebuf + 4);
385 }
386 return RETURN_VALUE_REGISTER_CONVENTION;
387 }
388 if (TYPE_CODE (type) == TYPE_CODE_INT
389 && TYPE_LENGTH (type) <= tdep->wordsize)
390 {
391 if (readbuf)
392 {
393 /* Some sort of integer stored in r3. Since TYPE isn't
394 bigger than the register, sign extension isn't a problem
395 - just do everything unsigned. */
396 ULONGEST regval;
397 regcache_cooked_read_unsigned (regcache, tdep->ppc_gp0_regnum + 3,
398 &regval);
399 store_unsigned_integer (readbuf, TYPE_LENGTH (type), regval);
400 }
401 if (writebuf)
402 {
403 /* Some sort of integer stored in r3. Use unpack_long since
404 that should handle any required sign extension. */
405 regcache_cooked_write_unsigned (regcache, tdep->ppc_gp0_regnum + 3,
406 unpack_long (type, writebuf));
407 }
408 return RETURN_VALUE_REGISTER_CONVENTION;
409 }
410 if (TYPE_LENGTH (type) == 16
411 && TYPE_CODE (type) == TYPE_CODE_ARRAY
412 && TYPE_VECTOR (type) && tdep->ppc_vr0_regnum >= 0)
413 {
414 if (readbuf)
415 {
416 /* Altivec places the return value in "v2". */
417 regcache_cooked_read (regcache, tdep->ppc_vr0_regnum + 2, readbuf);
418 }
419 if (writebuf)
420 {
421 /* Altivec places the return value in "v2". */
422 regcache_cooked_write (regcache, tdep->ppc_vr0_regnum + 2, writebuf);
423 }
424 return RETURN_VALUE_REGISTER_CONVENTION;
425 }
426 if (TYPE_LENGTH (type) == 8
427 && TYPE_CODE (type) == TYPE_CODE_ARRAY
428 && TYPE_VECTOR (type) && tdep->ppc_ev0_regnum >= 0)
429 {
430 /* The e500 ABI places return values for the 64-bit DSP types
431 (__ev64_opaque__) in r3. However, in GDB-speak, ev3
432 corresponds to the entire r3 value for e500, whereas GDB's r3
433 only corresponds to the least significant 32-bits. So place
434 the 64-bit DSP type's value in ev3. */
435 if (readbuf)
436 regcache_cooked_read (regcache, tdep->ppc_ev0_regnum + 3, readbuf);
437 if (writebuf)
438 regcache_cooked_write (regcache, tdep->ppc_ev0_regnum + 3, writebuf);
439 return RETURN_VALUE_REGISTER_CONVENTION;
440 }
441 if (broken_gcc && TYPE_LENGTH (type) <= 8)
442 {
443 /* GCC screwed up for structures or unions whose size is less
444 than or equal to 8 bytes.. Instead of left-aligning, it
445 right-aligns the data into the buffer formed by r3, r4. */
446 gdb_byte regvals[MAX_REGISTER_SIZE * 2];
447 int len = TYPE_LENGTH (type);
448 int offset = (2 * tdep->wordsize - len) % tdep->wordsize;
449
450 if (readbuf)
451 {
452 regcache_cooked_read (regcache, tdep->ppc_gp0_regnum + 3,
453 regvals + 0 * tdep->wordsize);
454 if (len > tdep->wordsize)
455 regcache_cooked_read (regcache, tdep->ppc_gp0_regnum + 4,
456 regvals + 1 * tdep->wordsize);
457 memcpy (readbuf, regvals + offset, len);
458 }
459 if (writebuf)
460 {
461 memset (regvals, 0, sizeof regvals);
462 memcpy (regvals + offset, writebuf, len);
463 regcache_cooked_write (regcache, tdep->ppc_gp0_regnum + 3,
464 regvals + 0 * tdep->wordsize);
465 if (len > tdep->wordsize)
466 regcache_cooked_write (regcache, tdep->ppc_gp0_regnum + 4,
467 regvals + 1 * tdep->wordsize);
468 }
469
470 return RETURN_VALUE_REGISTER_CONVENTION;
471 }
472 if (TYPE_LENGTH (type) <= 8)
473 {
474 if (readbuf)
475 {
476 /* This matches SVr4 PPC, it does not match GCC. */
477 /* The value is right-padded to 8 bytes and then loaded, as
478 two "words", into r3/r4. */
479 gdb_byte regvals[MAX_REGISTER_SIZE * 2];
480 regcache_cooked_read (regcache, tdep->ppc_gp0_regnum + 3,
481 regvals + 0 * tdep->wordsize);
482 if (TYPE_LENGTH (type) > tdep->wordsize)
483 regcache_cooked_read (regcache, tdep->ppc_gp0_regnum + 4,
484 regvals + 1 * tdep->wordsize);
485 memcpy (readbuf, regvals, TYPE_LENGTH (type));
486 }
487 if (writebuf)
488 {
489 /* This matches SVr4 PPC, it does not match GCC. */
490 /* The value is padded out to 8 bytes and then loaded, as
491 two "words" into r3/r4. */
492 gdb_byte regvals[MAX_REGISTER_SIZE * 2];
493 memset (regvals, 0, sizeof regvals);
494 memcpy (regvals, writebuf, TYPE_LENGTH (type));
495 regcache_cooked_write (regcache, tdep->ppc_gp0_regnum + 3,
496 regvals + 0 * tdep->wordsize);
497 if (TYPE_LENGTH (type) > tdep->wordsize)
498 regcache_cooked_write (regcache, tdep->ppc_gp0_regnum + 4,
499 regvals + 1 * tdep->wordsize);
500 }
501 return RETURN_VALUE_REGISTER_CONVENTION;
502 }
503 return RETURN_VALUE_STRUCT_CONVENTION;
504 }
505
506 enum return_value_convention
507 ppc_sysv_abi_return_value (struct gdbarch *gdbarch, struct type *valtype,
508 struct regcache *regcache, gdb_byte *readbuf,
509 const gdb_byte *writebuf)
510 {
511 return do_ppc_sysv_return_value (gdbarch, valtype, regcache, readbuf,
512 writebuf, 0);
513 }
514
515 enum return_value_convention
516 ppc_sysv_abi_broken_return_value (struct gdbarch *gdbarch,
517 struct type *valtype,
518 struct regcache *regcache,
519 gdb_byte *readbuf, const gdb_byte *writebuf)
520 {
521 return do_ppc_sysv_return_value (gdbarch, valtype, regcache, readbuf,
522 writebuf, 1);
523 }
524
525 /* The helper function for 64-bit SYSV push_dummy_call. Converts the
526 function's code address back into the function's descriptor
527 address.
528
529 Find a value for the TOC register. Every symbol should have both
530 ".FN" and "FN" in the minimal symbol table. "FN" points at the
531 FN's descriptor, while ".FN" points at the entry point (which
532 matches FUNC_ADDR). Need to reverse from FUNC_ADDR back to the
533 FN's descriptor address (while at the same time being careful to
534 find "FN" in the same object file as ".FN"). */
535
536 static int
537 convert_code_addr_to_desc_addr (CORE_ADDR code_addr, CORE_ADDR *desc_addr)
538 {
539 struct obj_section *dot_fn_section;
540 struct minimal_symbol *dot_fn;
541 struct minimal_symbol *fn;
542 CORE_ADDR toc;
543 /* Find the minimal symbol that corresponds to CODE_ADDR (should
544 have a name of the form ".FN"). */
545 dot_fn = lookup_minimal_symbol_by_pc (code_addr);
546 if (dot_fn == NULL || SYMBOL_LINKAGE_NAME (dot_fn)[0] != '.')
547 return 0;
548 /* Get the section that contains CODE_ADDR. Need this for the
549 "objfile" that it contains. */
550 dot_fn_section = find_pc_section (code_addr);
551 if (dot_fn_section == NULL || dot_fn_section->objfile == NULL)
552 return 0;
553 /* Now find the corresponding "FN" (dropping ".") minimal symbol's
554 address. Only look for the minimal symbol in ".FN"'s object file
555 - avoids problems when two object files (i.e., shared libraries)
556 contain a minimal symbol with the same name. */
557 fn = lookup_minimal_symbol (SYMBOL_LINKAGE_NAME (dot_fn) + 1, NULL,
558 dot_fn_section->objfile);
559 if (fn == NULL)
560 return 0;
561 /* Found a descriptor. */
562 (*desc_addr) = SYMBOL_VALUE_ADDRESS (fn);
563 return 1;
564 }
565
566 /* Pass the arguments in either registers, or in the stack. Using the
567 ppc 64 bit SysV ABI.
568
569 This implements a dumbed down version of the ABI. It always writes
570 values to memory, GPR and FPR, even when not necessary. Doing this
571 greatly simplifies the logic. */
572
573 CORE_ADDR
574 ppc64_sysv_abi_push_dummy_call (struct gdbarch *gdbarch, struct value *function,
575 struct regcache *regcache, CORE_ADDR bp_addr,
576 int nargs, struct value **args, CORE_ADDR sp,
577 int struct_return, CORE_ADDR struct_addr)
578 {
579 CORE_ADDR func_addr = find_function_addr (function, NULL);
580 struct gdbarch_tdep *tdep = gdbarch_tdep (current_gdbarch);
581 /* By this stage in the proceedings, SP has been decremented by "red
582 zone size" + "struct return size". Fetch the stack-pointer from
583 before this and use that as the BACK_CHAIN. */
584 const CORE_ADDR back_chain = read_sp ();
585 /* See for-loop comment below. */
586 int write_pass;
587 /* Size of the Altivec's vector parameter region, the final value is
588 computed in the for-loop below. */
589 LONGEST vparam_size = 0;
590 /* Size of the general parameter region, the final value is computed
591 in the for-loop below. */
592 LONGEST gparam_size = 0;
593 /* Kevin writes ... I don't mind seeing tdep->wordsize used in the
594 calls to align_up(), align_down(), etc. because this makes it
595 easier to reuse this code (in a copy/paste sense) in the future,
596 but it is a 64-bit ABI and asserting that the wordsize is 8 bytes
597 at some point makes it easier to verify that this function is
598 correct without having to do a non-local analysis to figure out
599 the possible values of tdep->wordsize. */
600 gdb_assert (tdep->wordsize == 8);
601
602 /* Go through the argument list twice.
603
604 Pass 1: Compute the function call's stack space and register
605 requirements.
606
607 Pass 2: Replay the same computation but this time also write the
608 values out to the target. */
609
610 for (write_pass = 0; write_pass < 2; write_pass++)
611 {
612 int argno;
613 /* Next available floating point register for float and double
614 arguments. */
615 int freg = 1;
616 /* Next available general register for non-vector (but possibly
617 float) arguments. */
618 int greg = 3;
619 /* Next available vector register for vector arguments. */
620 int vreg = 2;
621 /* The address, at which the next general purpose parameter
622 (integer, struct, float, ...) should be saved. */
623 CORE_ADDR gparam;
624 /* Address, at which the next Altivec vector parameter should be
625 saved. */
626 CORE_ADDR vparam;
627
628 if (!write_pass)
629 {
630 /* During the first pass, GPARAM and VPARAM are more like
631 offsets (start address zero) than addresses. That way
632 the accumulate the total stack space each region
633 requires. */
634 gparam = 0;
635 vparam = 0;
636 }
637 else
638 {
639 /* Decrement the stack pointer making space for the Altivec
640 and general on-stack parameters. Set vparam and gparam
641 to their corresponding regions. */
642 vparam = align_down (sp - vparam_size, 16);
643 gparam = align_down (vparam - gparam_size, 16);
644 /* Add in space for the TOC, link editor double word,
645 compiler double word, LR save area, CR save area. */
646 sp = align_down (gparam - 48, 16);
647 }
648
649 /* If the function is returning a `struct', then there is an
650 extra hidden parameter (which will be passed in r3)
651 containing the address of that struct.. In that case we
652 should advance one word and start from r4 register to copy
653 parameters. This also consumes one on-stack parameter slot. */
654 if (struct_return)
655 {
656 if (write_pass)
657 regcache_cooked_write_signed (regcache,
658 tdep->ppc_gp0_regnum + greg,
659 struct_addr);
660 greg++;
661 gparam = align_up (gparam + tdep->wordsize, tdep->wordsize);
662 }
663
664 for (argno = 0; argno < nargs; argno++)
665 {
666 struct value *arg = args[argno];
667 struct type *type = check_typedef (value_type (arg));
668 const bfd_byte *val = value_contents (arg);
669 if (TYPE_CODE (type) == TYPE_CODE_FLT && TYPE_LENGTH (type) <= 8)
670 {
671 /* Floats and Doubles go in f1 .. f13. They also
672 consume a left aligned GREG,, and can end up in
673 memory. */
674 if (write_pass)
675 {
676 if (ppc_floating_point_unit_p (current_gdbarch)
677 && freg <= 13)
678 {
679 gdb_byte regval[MAX_REGISTER_SIZE];
680 struct type *regtype
681 = register_type (gdbarch, tdep->ppc_fp0_regnum);
682 convert_typed_floating (val, type, regval, regtype);
683 regcache_cooked_write (regcache,
684 tdep->ppc_fp0_regnum + freg,
685 regval);
686 }
687 if (greg <= 10)
688 {
689 /* The ABI states "Single precision floating
690 point values are mapped to the first word in
691 a single doubleword" and "... floating point
692 values mapped to the first eight doublewords
693 of the parameter save area are also passed in
694 general registers").
695
696 This code interprets that to mean: store it,
697 left aligned, in the general register. */
698 gdb_byte regval[MAX_REGISTER_SIZE];
699 memset (regval, 0, sizeof regval);
700 memcpy (regval, val, TYPE_LENGTH (type));
701 regcache_cooked_write (regcache,
702 tdep->ppc_gp0_regnum + greg,
703 regval);
704 }
705 write_memory (gparam, val, TYPE_LENGTH (type));
706 }
707 /* Always consume parameter stack space. */
708 freg++;
709 greg++;
710 gparam = align_up (gparam + TYPE_LENGTH (type), tdep->wordsize);
711 }
712 else if (TYPE_LENGTH (type) == 16 && TYPE_VECTOR (type)
713 && TYPE_CODE (type) == TYPE_CODE_ARRAY
714 && tdep->ppc_vr0_regnum >= 0)
715 {
716 /* In the Altivec ABI, vectors go in the vector
717 registers v2 .. v13, or when that runs out, a vector
718 annex which goes above all the normal parameters.
719 NOTE: cagney/2003-09-21: This is a guess based on the
720 PowerOpen Altivec ABI. */
721 if (vreg <= 13)
722 {
723 if (write_pass)
724 regcache_cooked_write (regcache,
725 tdep->ppc_vr0_regnum + vreg, val);
726 vreg++;
727 }
728 else
729 {
730 if (write_pass)
731 write_memory (vparam, val, TYPE_LENGTH (type));
732 vparam = align_up (vparam + TYPE_LENGTH (type), 16);
733 }
734 }
735 else if ((TYPE_CODE (type) == TYPE_CODE_INT
736 || TYPE_CODE (type) == TYPE_CODE_ENUM
737 || TYPE_CODE (type) == TYPE_CODE_PTR)
738 && TYPE_LENGTH (type) <= 8)
739 {
740 /* Scalars and Pointers get sign[un]extended and go in
741 gpr3 .. gpr10. They can also end up in memory. */
742 if (write_pass)
743 {
744 /* Sign extend the value, then store it unsigned. */
745 ULONGEST word = unpack_long (type, val);
746 /* Convert any function code addresses into
747 descriptors. */
748 if (TYPE_CODE (type) == TYPE_CODE_PTR
749 && TYPE_CODE (TYPE_TARGET_TYPE (type)) == TYPE_CODE_FUNC)
750 {
751 CORE_ADDR desc = word;
752 convert_code_addr_to_desc_addr (word, &desc);
753 word = desc;
754 }
755 if (greg <= 10)
756 regcache_cooked_write_unsigned (regcache,
757 tdep->ppc_gp0_regnum +
758 greg, word);
759 write_memory_unsigned_integer (gparam, tdep->wordsize,
760 word);
761 }
762 greg++;
763 gparam = align_up (gparam + TYPE_LENGTH (type), tdep->wordsize);
764 }
765 else
766 {
767 int byte;
768 for (byte = 0; byte < TYPE_LENGTH (type);
769 byte += tdep->wordsize)
770 {
771 if (write_pass && greg <= 10)
772 {
773 gdb_byte regval[MAX_REGISTER_SIZE];
774 int len = TYPE_LENGTH (type) - byte;
775 if (len > tdep->wordsize)
776 len = tdep->wordsize;
777 memset (regval, 0, sizeof regval);
778 /* WARNING: cagney/2003-09-21: As best I can
779 tell, the ABI specifies that the value should
780 be left aligned. Unfortunately, GCC doesn't
781 do this - it instead right aligns even sized
782 values and puts odd sized values on the
783 stack. Work around that by putting both a
784 left and right aligned value into the
785 register (hopefully no one notices :-^).
786 Arrrgh! */
787 /* Left aligned (8 byte values such as pointers
788 fill the buffer). */
789 memcpy (regval, val + byte, len);
790 /* Right aligned (but only if even). */
791 if (len == 1 || len == 2 || len == 4)
792 memcpy (regval + tdep->wordsize - len,
793 val + byte, len);
794 regcache_cooked_write (regcache, greg, regval);
795 }
796 greg++;
797 }
798 if (write_pass)
799 /* WARNING: cagney/2003-09-21: Strictly speaking, this
800 isn't necessary, unfortunately, GCC appears to get
801 "struct convention" parameter passing wrong putting
802 odd sized structures in memory instead of in a
803 register. Work around this by always writing the
804 value to memory. Fortunately, doing this
805 simplifies the code. */
806 write_memory (gparam, val, TYPE_LENGTH (type));
807 if (write_pass)
808 /* WARNING: cagney/2004-06-20: It appears that GCC
809 likes to put structures containing a single
810 floating-point member in an FP register instead of
811 general general purpose. */
812 /* Always consume parameter stack space. */
813 gparam = align_up (gparam + TYPE_LENGTH (type), tdep->wordsize);
814 }
815 }
816
817 if (!write_pass)
818 {
819 /* Save the true region sizes ready for the second pass. */
820 vparam_size = vparam;
821 /* Make certain that the general parameter save area is at
822 least the minimum 8 registers (or doublewords) in size. */
823 if (greg < 8)
824 gparam_size = 8 * tdep->wordsize;
825 else
826 gparam_size = gparam;
827 }
828 }
829
830 /* Update %sp. */
831 regcache_cooked_write_signed (regcache, SP_REGNUM, sp);
832
833 /* Write the backchain (it occupies WORDSIZED bytes). */
834 write_memory_signed_integer (sp, tdep->wordsize, back_chain);
835
836 /* Point the inferior function call's return address at the dummy's
837 breakpoint. */
838 regcache_cooked_write_signed (regcache, tdep->ppc_lr_regnum, bp_addr);
839
840 /* Use the func_addr to find the descriptor, and use that to find
841 the TOC. */
842 {
843 CORE_ADDR desc_addr;
844 if (convert_code_addr_to_desc_addr (func_addr, &desc_addr))
845 {
846 /* The TOC is the second double word in the descriptor. */
847 CORE_ADDR toc =
848 read_memory_unsigned_integer (desc_addr + tdep->wordsize,
849 tdep->wordsize);
850 regcache_cooked_write_unsigned (regcache,
851 tdep->ppc_gp0_regnum + 2, toc);
852 }
853 }
854
855 return sp;
856 }
857
858
859 /* The 64 bit ABI retun value convention.
860
861 Return non-zero if the return-value is stored in a register, return
862 0 if the return-value is instead stored on the stack (a.k.a.,
863 struct return convention).
864
865 For a return-value stored in a register: when WRITEBUF is non-NULL,
866 copy the buffer to the corresponding register return-value location
867 location; when READBUF is non-NULL, fill the buffer from the
868 corresponding register return-value location. */
869 enum return_value_convention
870 ppc64_sysv_abi_return_value (struct gdbarch *gdbarch, struct type *valtype,
871 struct regcache *regcache, gdb_byte *readbuf,
872 const gdb_byte *writebuf)
873 {
874 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
875
876 /* This function exists to support a calling convention that
877 requires floating-point registers. It shouldn't be used on
878 processors that lack them. */
879 gdb_assert (ppc_floating_point_unit_p (gdbarch));
880
881 /* Floats and doubles in F1. */
882 if (TYPE_CODE (valtype) == TYPE_CODE_FLT && TYPE_LENGTH (valtype) <= 8)
883 {
884 gdb_byte regval[MAX_REGISTER_SIZE];
885 struct type *regtype = register_type (gdbarch, tdep->ppc_fp0_regnum);
886 if (writebuf != NULL)
887 {
888 convert_typed_floating (writebuf, valtype, regval, regtype);
889 regcache_cooked_write (regcache, tdep->ppc_fp0_regnum + 1, regval);
890 }
891 if (readbuf != NULL)
892 {
893 regcache_cooked_read (regcache, tdep->ppc_fp0_regnum + 1, regval);
894 convert_typed_floating (regval, regtype, readbuf, valtype);
895 }
896 return RETURN_VALUE_REGISTER_CONVENTION;
897 }
898 /* Integers in r3. */
899 if ((TYPE_CODE (valtype) == TYPE_CODE_INT
900 || TYPE_CODE (valtype) == TYPE_CODE_ENUM)
901 && TYPE_LENGTH (valtype) <= 8)
902 {
903 if (writebuf != NULL)
904 {
905 /* Be careful to sign extend the value. */
906 regcache_cooked_write_unsigned (regcache, tdep->ppc_gp0_regnum + 3,
907 unpack_long (valtype, writebuf));
908 }
909 if (readbuf != NULL)
910 {
911 /* Extract the integer from r3. Since this is truncating the
912 value, there isn't a sign extension problem. */
913 ULONGEST regval;
914 regcache_cooked_read_unsigned (regcache, tdep->ppc_gp0_regnum + 3,
915 &regval);
916 store_unsigned_integer (readbuf, TYPE_LENGTH (valtype), regval);
917 }
918 return RETURN_VALUE_REGISTER_CONVENTION;
919 }
920 /* All pointers live in r3. */
921 if (TYPE_CODE (valtype) == TYPE_CODE_PTR)
922 {
923 /* All pointers live in r3. */
924 if (writebuf != NULL)
925 regcache_cooked_write (regcache, tdep->ppc_gp0_regnum + 3, writebuf);
926 if (readbuf != NULL)
927 regcache_cooked_read (regcache, tdep->ppc_gp0_regnum + 3, readbuf);
928 return RETURN_VALUE_REGISTER_CONVENTION;
929 }
930 /* Array type has more than one use. */
931 if (TYPE_CODE (valtype) == TYPE_CODE_ARRAY)
932 {
933 /* Small character arrays are returned, right justified, in r3. */
934 if (TYPE_LENGTH (valtype) <= 8
935 && TYPE_CODE (TYPE_TARGET_TYPE (valtype)) == TYPE_CODE_INT
936 && TYPE_LENGTH (TYPE_TARGET_TYPE (valtype)) == 1)
937 {
938 int offset = (register_size (gdbarch, tdep->ppc_gp0_regnum + 3)
939 - TYPE_LENGTH (valtype));
940 if (writebuf != NULL)
941 regcache_cooked_write_part (regcache, tdep->ppc_gp0_regnum + 3,
942 offset, TYPE_LENGTH (valtype), writebuf);
943 if (readbuf != NULL)
944 regcache_cooked_read_part (regcache, tdep->ppc_gp0_regnum + 3,
945 offset, TYPE_LENGTH (valtype), readbuf);
946 return RETURN_VALUE_REGISTER_CONVENTION;
947 }
948 /* A VMX vector is returned in v2. */
949 if (TYPE_CODE (valtype) == TYPE_CODE_ARRAY
950 && TYPE_VECTOR (valtype) && tdep->ppc_vr0_regnum >= 0)
951 {
952 if (readbuf)
953 regcache_cooked_read (regcache, tdep->ppc_vr0_regnum + 2, readbuf);
954 if (writebuf)
955 regcache_cooked_write (regcache, tdep->ppc_vr0_regnum + 2, writebuf);
956 return RETURN_VALUE_REGISTER_CONVENTION;
957 }
958 }
959 /* Big floating point values get stored in adjacent floating
960 point registers, starting with F1. */
961 if (TYPE_CODE (valtype) == TYPE_CODE_FLT
962 && (TYPE_LENGTH (valtype) == 16 || TYPE_LENGTH (valtype) == 32))
963 {
964 if (writebuf || readbuf != NULL)
965 {
966 int i;
967 for (i = 0; i < TYPE_LENGTH (valtype) / 8; i++)
968 {
969 if (writebuf != NULL)
970 regcache_cooked_write (regcache, tdep->ppc_fp0_regnum + 1 + i,
971 (const bfd_byte *) writebuf + i * 8);
972 if (readbuf != NULL)
973 regcache_cooked_read (regcache, tdep->ppc_fp0_regnum + 1 + i,
974 (bfd_byte *) readbuf + i * 8);
975 }
976 }
977 return RETURN_VALUE_REGISTER_CONVENTION;
978 }
979 /* Complex values get returned in f1:f2, need to convert. */
980 if (TYPE_CODE (valtype) == TYPE_CODE_COMPLEX
981 && (TYPE_LENGTH (valtype) == 8 || TYPE_LENGTH (valtype) == 16))
982 {
983 if (regcache != NULL)
984 {
985 int i;
986 for (i = 0; i < 2; i++)
987 {
988 gdb_byte regval[MAX_REGISTER_SIZE];
989 struct type *regtype =
990 register_type (current_gdbarch, tdep->ppc_fp0_regnum);
991 if (writebuf != NULL)
992 {
993 convert_typed_floating ((const bfd_byte *) writebuf +
994 i * (TYPE_LENGTH (valtype) / 2),
995 valtype, regval, regtype);
996 regcache_cooked_write (regcache,
997 tdep->ppc_fp0_regnum + 1 + i,
998 regval);
999 }
1000 if (readbuf != NULL)
1001 {
1002 regcache_cooked_read (regcache,
1003 tdep->ppc_fp0_regnum + 1 + i,
1004 regval);
1005 convert_typed_floating (regval, regtype,
1006 (bfd_byte *) readbuf +
1007 i * (TYPE_LENGTH (valtype) / 2),
1008 valtype);
1009 }
1010 }
1011 }
1012 return RETURN_VALUE_REGISTER_CONVENTION;
1013 }
1014 /* Big complex values get stored in f1:f4. */
1015 if (TYPE_CODE (valtype) == TYPE_CODE_COMPLEX && TYPE_LENGTH (valtype) == 32)
1016 {
1017 if (regcache != NULL)
1018 {
1019 int i;
1020 for (i = 0; i < 4; i++)
1021 {
1022 if (writebuf != NULL)
1023 regcache_cooked_write (regcache, tdep->ppc_fp0_regnum + 1 + i,
1024 (const bfd_byte *) writebuf + i * 8);
1025 if (readbuf != NULL)
1026 regcache_cooked_read (regcache, tdep->ppc_fp0_regnum + 1 + i,
1027 (bfd_byte *) readbuf + i * 8);
1028 }
1029 }
1030 return RETURN_VALUE_REGISTER_CONVENTION;
1031 }
1032 return RETURN_VALUE_STRUCT_CONVENTION;
1033 }
1034
1035 CORE_ADDR
1036 ppc64_sysv_abi_adjust_breakpoint_address (struct gdbarch *gdbarch,
1037 CORE_ADDR bpaddr)
1038 {
1039 /* PPC64 SYSV specifies that the minimal-symbol "FN" should point at
1040 a function-descriptor while the corresponding minimal-symbol
1041 ".FN" should point at the entry point. Consequently, a command
1042 like "break FN" applied to an object file with only minimal
1043 symbols, will insert the breakpoint into the descriptor at "FN"
1044 and not the function at ".FN". Avoid this confusion by adjusting
1045 any attempt to set a descriptor breakpoint into a corresponding
1046 function breakpoint. Note that GDB warns the user when this
1047 adjustment is applied - that's ok as otherwise the user will have
1048 no way of knowing why their breakpoint at "FN" resulted in the
1049 program stopping at ".FN". */
1050 return gdbarch_convert_from_func_ptr_addr (gdbarch, bpaddr, &current_target);
1051 }