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1 /* Target-dependent code for GDB, the GNU debugger.
2 Copyright 1986, 1987, 1989, 1991, 1992, 1993, 1994, 1995, 1996, 1997
3 Free Software Foundation, Inc.
4
5 This file is part of GDB.
6
7 This program is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 2 of the License, or
10 (at your option) any later version.
11
12 This program is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
16
17 You should have received a copy of the GNU General Public License
18 along with this program; if not, write to the Free Software
19 Foundation, Inc., 59 Temple Place - Suite 330,
20 Boston, MA 02111-1307, USA. */
21
22 #include "defs.h"
23 #include "frame.h"
24 #include "inferior.h"
25 #include "symtab.h"
26 #include "target.h"
27 #include "gdbcore.h"
28 #include "gdbcmd.h"
29 #include "symfile.h"
30 #include "objfiles.h"
31 #include "xcoffsolib.h"
32
33 extern int errno;
34
35 /* Breakpoint shadows for the single step instructions will be kept here. */
36
37 static struct sstep_breaks
38 {
39 /* Address, or 0 if this is not in use. */
40 CORE_ADDR address;
41 /* Shadow contents. */
42 char data[4];
43 }
44 stepBreaks[2];
45
46 /* Hook for determining the TOC address when calling functions in the
47 inferior under AIX. The initialization code in rs6000-nat.c sets
48 this hook to point to find_toc_address. */
49
50 CORE_ADDR (*find_toc_address_hook) PARAMS ((CORE_ADDR)) = NULL;
51
52 /* Static function prototypes */
53
54 static CORE_ADDR branch_dest PARAMS ((int opcode, int instr, CORE_ADDR pc,
55 CORE_ADDR safety));
56
57 static void frame_get_saved_regs PARAMS ((struct frame_info * fi,
58 struct rs6000_framedata * fdatap));
59
60 static void pop_dummy_frame PARAMS ((void));
61
62 static CORE_ADDR frame_initial_stack_address PARAMS ((struct frame_info *));
63
64 CORE_ADDR
65 rs6000_skip_prologue (pc)
66 CORE_ADDR pc;
67 {
68 struct rs6000_framedata frame;
69 pc = skip_prologue (pc, &frame);
70 return pc;
71 }
72
73
74 /* Fill in fi->saved_regs */
75
76 struct frame_extra_info
77 {
78 /* Functions calling alloca() change the value of the stack
79 pointer. We need to use initial stack pointer (which is saved in
80 r31 by gcc) in such cases. If a compiler emits traceback table,
81 then we should use the alloca register specified in traceback
82 table. FIXME. */
83 CORE_ADDR initial_sp; /* initial stack pointer. */
84 };
85
86 void
87 rs6000_init_extra_frame_info (fromleaf, fi)
88 int fromleaf;
89 struct frame_info *fi;
90 {
91 fi->extra_info = (struct frame_extra_info *)
92 frame_obstack_alloc (sizeof (struct frame_extra_info));
93 fi->extra_info->initial_sp = 0;
94 if (fi->next != (CORE_ADDR) 0
95 && fi->pc < TEXT_SEGMENT_BASE)
96 /* We're in get_prev_frame */
97 /* and this is a special signal frame. */
98 /* (fi->pc will be some low address in the kernel, */
99 /* to which the signal handler returns). */
100 fi->signal_handler_caller = 1;
101 }
102
103
104 void
105 rs6000_frame_init_saved_regs (fi)
106 struct frame_info *fi;
107 {
108 frame_get_saved_regs (fi, NULL);
109 }
110
111 CORE_ADDR
112 rs6000_frame_args_address (fi)
113 struct frame_info *fi;
114 {
115 if (fi->extra_info->initial_sp != 0)
116 return fi->extra_info->initial_sp;
117 else
118 return frame_initial_stack_address (fi);
119 }
120
121
122 /* Calculate the destination of a branch/jump. Return -1 if not a branch. */
123
124 static CORE_ADDR
125 branch_dest (opcode, instr, pc, safety)
126 int opcode;
127 int instr;
128 CORE_ADDR pc;
129 CORE_ADDR safety;
130 {
131 CORE_ADDR dest;
132 int immediate;
133 int absolute;
134 int ext_op;
135
136 absolute = (int) ((instr >> 1) & 1);
137
138 switch (opcode)
139 {
140 case 18:
141 immediate = ((instr & ~3) << 6) >> 6; /* br unconditional */
142 if (absolute)
143 dest = immediate;
144 else
145 dest = pc + immediate;
146 break;
147
148 case 16:
149 immediate = ((instr & ~3) << 16) >> 16; /* br conditional */
150 if (absolute)
151 dest = immediate;
152 else
153 dest = pc + immediate;
154 break;
155
156 case 19:
157 ext_op = (instr >> 1) & 0x3ff;
158
159 if (ext_op == 16) /* br conditional register */
160 {
161 dest = read_register (LR_REGNUM) & ~3;
162
163 /* If we are about to return from a signal handler, dest is
164 something like 0x3c90. The current frame is a signal handler
165 caller frame, upon completion of the sigreturn system call
166 execution will return to the saved PC in the frame. */
167 if (dest < TEXT_SEGMENT_BASE)
168 {
169 struct frame_info *fi;
170
171 fi = get_current_frame ();
172 if (fi != NULL)
173 dest = read_memory_integer (fi->frame + SIG_FRAME_PC_OFFSET,
174 4);
175 }
176 }
177
178 else if (ext_op == 528) /* br cond to count reg */
179 {
180 dest = read_register (CTR_REGNUM) & ~3;
181
182 /* If we are about to execute a system call, dest is something
183 like 0x22fc or 0x3b00. Upon completion the system call
184 will return to the address in the link register. */
185 if (dest < TEXT_SEGMENT_BASE)
186 dest = read_register (LR_REGNUM) & ~3;
187 }
188 else
189 return -1;
190 break;
191
192 default:
193 return -1;
194 }
195 return (dest < TEXT_SEGMENT_BASE) ? safety : dest;
196 }
197
198
199 /* Sequence of bytes for breakpoint instruction. */
200
201 #define BIG_BREAKPOINT { 0x7d, 0x82, 0x10, 0x08 }
202 #define LITTLE_BREAKPOINT { 0x08, 0x10, 0x82, 0x7d }
203
204 unsigned char *
205 rs6000_breakpoint_from_pc (bp_addr, bp_size)
206 CORE_ADDR *bp_addr;
207 int *bp_size;
208 {
209 static unsigned char big_breakpoint[] = BIG_BREAKPOINT;
210 static unsigned char little_breakpoint[] = LITTLE_BREAKPOINT;
211 *bp_size = 4;
212 if (TARGET_BYTE_ORDER == BIG_ENDIAN)
213 return big_breakpoint;
214 else
215 return little_breakpoint;
216 }
217
218
219 /* AIX does not support PT_STEP. Simulate it. */
220
221 void
222 rs6000_software_single_step (signal, insert_breakpoints_p)
223 unsigned int signal;
224 int insert_breakpoints_p;
225 {
226 #define INSNLEN(OPCODE) 4
227
228 static char le_breakp[] = LITTLE_BREAKPOINT;
229 static char be_breakp[] = BIG_BREAKPOINT;
230 char *breakp = TARGET_BYTE_ORDER == BIG_ENDIAN ? be_breakp : le_breakp;
231 int ii, insn;
232 CORE_ADDR loc;
233 CORE_ADDR breaks[2];
234 int opcode;
235
236 if (insert_breakpoints_p)
237 {
238
239 loc = read_pc ();
240
241 insn = read_memory_integer (loc, 4);
242
243 breaks[0] = loc + INSNLEN (insn);
244 opcode = insn >> 26;
245 breaks[1] = branch_dest (opcode, insn, loc, breaks[0]);
246
247 /* Don't put two breakpoints on the same address. */
248 if (breaks[1] == breaks[0])
249 breaks[1] = -1;
250
251 stepBreaks[1].address = 0;
252
253 for (ii = 0; ii < 2; ++ii)
254 {
255
256 /* ignore invalid breakpoint. */
257 if (breaks[ii] == -1)
258 continue;
259
260 read_memory (breaks[ii], stepBreaks[ii].data, 4);
261
262 write_memory (breaks[ii], breakp, 4);
263 stepBreaks[ii].address = breaks[ii];
264 }
265
266 }
267 else
268 {
269
270 /* remove step breakpoints. */
271 for (ii = 0; ii < 2; ++ii)
272 if (stepBreaks[ii].address != 0)
273 write_memory
274 (stepBreaks[ii].address, stepBreaks[ii].data, 4);
275
276 }
277 errno = 0; /* FIXME, don't ignore errors! */
278 /* What errors? {read,write}_memory call error(). */
279 }
280
281
282 /* return pc value after skipping a function prologue and also return
283 information about a function frame.
284
285 in struct rs6000_framedata fdata:
286 - frameless is TRUE, if function does not have a frame.
287 - nosavedpc is TRUE, if function does not save %pc value in its frame.
288 - offset is the initial size of this stack frame --- the amount by
289 which we decrement the sp to allocate the frame.
290 - saved_gpr is the number of the first saved gpr.
291 - saved_fpr is the number of the first saved fpr.
292 - alloca_reg is the number of the register used for alloca() handling.
293 Otherwise -1.
294 - gpr_offset is the offset of the first saved gpr from the previous frame.
295 - fpr_offset is the offset of the first saved fpr from the previous frame.
296 - lr_offset is the offset of the saved lr
297 - cr_offset is the offset of the saved cr
298 */
299
300 #define SIGNED_SHORT(x) \
301 ((sizeof (short) == 2) \
302 ? ((int)(short)(x)) \
303 : ((int)((((x) & 0xffff) ^ 0x8000) - 0x8000)))
304
305 #define GET_SRC_REG(x) (((x) >> 21) & 0x1f)
306
307 CORE_ADDR
308 skip_prologue (pc, fdata)
309 CORE_ADDR pc;
310 struct rs6000_framedata *fdata;
311 {
312 CORE_ADDR orig_pc = pc;
313 char buf[4];
314 unsigned long op;
315 long offset = 0;
316 int lr_reg = 0;
317 int cr_reg = 0;
318 int reg;
319 int framep = 0;
320 int minimal_toc_loaded = 0;
321 static struct rs6000_framedata zero_frame;
322
323 *fdata = zero_frame;
324 fdata->saved_gpr = -1;
325 fdata->saved_fpr = -1;
326 fdata->alloca_reg = -1;
327 fdata->frameless = 1;
328 fdata->nosavedpc = 1;
329
330 if (target_read_memory (pc, buf, 4))
331 return pc; /* Can't access it -- assume no prologue. */
332
333 /* Assume that subsequent fetches can fail with low probability. */
334 pc -= 4;
335 for (;;)
336 {
337 pc += 4;
338 op = read_memory_integer (pc, 4);
339
340 if ((op & 0xfc1fffff) == 0x7c0802a6)
341 { /* mflr Rx */
342 lr_reg = (op & 0x03e00000) | 0x90010000;
343 continue;
344
345 }
346 else if ((op & 0xfc1fffff) == 0x7c000026)
347 { /* mfcr Rx */
348 cr_reg = (op & 0x03e00000) | 0x90010000;
349 continue;
350
351 }
352 else if ((op & 0xfc1f0000) == 0xd8010000)
353 { /* stfd Rx,NUM(r1) */
354 reg = GET_SRC_REG (op);
355 if (fdata->saved_fpr == -1 || fdata->saved_fpr > reg)
356 {
357 fdata->saved_fpr = reg;
358 fdata->fpr_offset = SIGNED_SHORT (op) + offset;
359 }
360 continue;
361
362 }
363 else if (((op & 0xfc1f0000) == 0xbc010000) || /* stm Rx, NUM(r1) */
364 ((op & 0xfc1f0000) == 0x90010000 && /* st rx,NUM(r1),
365 rx >= r13 */
366 (op & 0x03e00000) >= 0x01a00000))
367 {
368
369 reg = GET_SRC_REG (op);
370 if (fdata->saved_gpr == -1 || fdata->saved_gpr > reg)
371 {
372 fdata->saved_gpr = reg;
373 fdata->gpr_offset = SIGNED_SHORT (op) + offset;
374 }
375 continue;
376
377 }
378 else if ((op & 0xffff0000) == 0x3c000000)
379 { /* addis 0,0,NUM, used
380 for >= 32k frames */
381 fdata->offset = (op & 0x0000ffff) << 16;
382 fdata->frameless = 0;
383 continue;
384
385 }
386 else if ((op & 0xffff0000) == 0x60000000)
387 { /* ori 0,0,NUM, 2nd ha
388 lf of >= 32k frames */
389 fdata->offset |= (op & 0x0000ffff);
390 fdata->frameless = 0;
391 continue;
392
393 }
394 else if ((op & 0xffff0000) == lr_reg)
395 { /* st Rx,NUM(r1)
396 where Rx == lr */
397 fdata->lr_offset = SIGNED_SHORT (op) + offset;
398 fdata->nosavedpc = 0;
399 lr_reg = 0;
400 continue;
401
402 }
403 else if ((op & 0xffff0000) == cr_reg)
404 { /* st Rx,NUM(r1)
405 where Rx == cr */
406 fdata->cr_offset = SIGNED_SHORT (op) + offset;
407 cr_reg = 0;
408 continue;
409
410 }
411 else if (op == 0x48000005)
412 { /* bl .+4 used in
413 -mrelocatable */
414 continue;
415
416 }
417 else if (op == 0x48000004)
418 { /* b .+4 (xlc) */
419 break;
420
421 }
422 else if (((op & 0xffff0000) == 0x801e0000 || /* lwz 0,NUM(r30), used
423 in V.4 -mrelocatable */
424 op == 0x7fc0f214) && /* add r30,r0,r30, used
425 in V.4 -mrelocatable */
426 lr_reg == 0x901e0000)
427 {
428 continue;
429
430 }
431 else if ((op & 0xffff0000) == 0x3fc00000 || /* addis 30,0,foo@ha, used
432 in V.4 -mminimal-toc */
433 (op & 0xffff0000) == 0x3bde0000)
434 { /* addi 30,30,foo@l */
435 continue;
436
437 }
438 else if ((op & 0xfc000001) == 0x48000001)
439 { /* bl foo,
440 to save fprs??? */
441
442 fdata->frameless = 0;
443 /* Don't skip over the subroutine call if it is not within the first
444 three instructions of the prologue. */
445 if ((pc - orig_pc) > 8)
446 break;
447
448 op = read_memory_integer (pc + 4, 4);
449
450 /* At this point, make sure this is not a trampoline function
451 (a function that simply calls another functions, and nothing else).
452 If the next is not a nop, this branch was part of the function
453 prologue. */
454
455 if (op == 0x4def7b82 || op == 0) /* crorc 15, 15, 15 */
456 break; /* don't skip over
457 this branch */
458 continue;
459
460 /* update stack pointer */
461 }
462 else if ((op & 0xffff0000) == 0x94210000)
463 { /* stu r1,NUM(r1) */
464 fdata->frameless = 0;
465 fdata->offset = SIGNED_SHORT (op);
466 offset = fdata->offset;
467 continue;
468
469 }
470 else if (op == 0x7c21016e)
471 { /* stwux 1,1,0 */
472 fdata->frameless = 0;
473 offset = fdata->offset;
474 continue;
475
476 /* Load up minimal toc pointer */
477 }
478 else if ((op >> 22) == 0x20f
479 && !minimal_toc_loaded)
480 { /* l r31,... or l r30,... */
481 minimal_toc_loaded = 1;
482 continue;
483
484 /* store parameters in stack */
485 }
486 else if ((op & 0xfc1f0000) == 0x90010000 || /* st rx,NUM(r1) */
487 (op & 0xfc1f0000) == 0xd8010000 || /* stfd Rx,NUM(r1) */
488 (op & 0xfc1f0000) == 0xfc010000)
489 { /* frsp, fp?,NUM(r1) */
490 continue;
491
492 /* store parameters in stack via frame pointer */
493 }
494 else if (framep &&
495 ((op & 0xfc1f0000) == 0x901f0000 || /* st rx,NUM(r1) */
496 (op & 0xfc1f0000) == 0xd81f0000 || /* stfd Rx,NUM(r1) */
497 (op & 0xfc1f0000) == 0xfc1f0000))
498 { /* frsp, fp?,NUM(r1) */
499 continue;
500
501 /* Set up frame pointer */
502 }
503 else if (op == 0x603f0000 /* oril r31, r1, 0x0 */
504 || op == 0x7c3f0b78)
505 { /* mr r31, r1 */
506 fdata->frameless = 0;
507 framep = 1;
508 fdata->alloca_reg = 31;
509 continue;
510
511 /* Another way to set up the frame pointer. */
512 }
513 else if ((op & 0xfc1fffff) == 0x38010000)
514 { /* addi rX, r1, 0x0 */
515 fdata->frameless = 0;
516 framep = 1;
517 fdata->alloca_reg = (op & ~0x38010000) >> 21;
518 continue;
519
520 }
521 else
522 {
523 break;
524 }
525 }
526
527 #if 0
528 /* I have problems with skipping over __main() that I need to address
529 * sometime. Previously, I used to use misc_function_vector which
530 * didn't work as well as I wanted to be. -MGO */
531
532 /* If the first thing after skipping a prolog is a branch to a function,
533 this might be a call to an initializer in main(), introduced by gcc2.
534 We'd like to skip over it as well. Fortunately, xlc does some extra
535 work before calling a function right after a prologue, thus we can
536 single out such gcc2 behaviour. */
537
538
539 if ((op & 0xfc000001) == 0x48000001)
540 { /* bl foo, an initializer function? */
541 op = read_memory_integer (pc + 4, 4);
542
543 if (op == 0x4def7b82)
544 { /* cror 0xf, 0xf, 0xf (nop) */
545
546 /* check and see if we are in main. If so, skip over this initializer
547 function as well. */
548
549 tmp = find_pc_misc_function (pc);
550 if (tmp >= 0 && STREQ (misc_function_vector[tmp].name, "main"))
551 return pc + 8;
552 }
553 }
554 #endif /* 0 */
555
556 fdata->offset = -fdata->offset;
557 return pc;
558 }
559
560
561 /*************************************************************************
562 Support for creating pushind a dummy frame into the stack, and popping
563 frames, etc.
564 *************************************************************************/
565
566 /* The total size of dummy frame is 436, which is;
567
568 32 gpr's - 128 bytes
569 32 fpr's - 256 "
570 7 the rest - 28 "
571 and 24 extra bytes for the callee's link area. The last 24 bytes
572 for the link area might not be necessary, since it will be taken
573 care of by push_arguments(). */
574
575 #define DUMMY_FRAME_SIZE 436
576
577 #define DUMMY_FRAME_ADDR_SIZE 10
578
579 /* Make sure you initialize these in somewhere, in case gdb gives up what it
580 was debugging and starts debugging something else. FIXMEibm */
581
582 static int dummy_frame_count = 0;
583 static int dummy_frame_size = 0;
584 static CORE_ADDR *dummy_frame_addr = 0;
585
586 extern int stop_stack_dummy;
587
588 /* push a dummy frame into stack, save all register. Currently we are saving
589 only gpr's and fpr's, which is not good enough! FIXMEmgo */
590
591 void
592 push_dummy_frame ()
593 {
594 /* stack pointer. */
595 CORE_ADDR sp;
596 /* Same thing, target byte order. */
597 char sp_targ[4];
598
599 /* link register. */
600 CORE_ADDR pc;
601 /* Same thing, target byte order. */
602 char pc_targ[4];
603
604 /* Needed to figure out where to save the dummy link area.
605 FIXME: There should be an easier way to do this, no? tiemann 9/9/95. */
606 struct rs6000_framedata fdata;
607
608 int ii;
609
610 target_fetch_registers (-1);
611
612 if (dummy_frame_count >= dummy_frame_size)
613 {
614 dummy_frame_size += DUMMY_FRAME_ADDR_SIZE;
615 if (dummy_frame_addr)
616 dummy_frame_addr = (CORE_ADDR *) xrealloc
617 (dummy_frame_addr, sizeof (CORE_ADDR) * (dummy_frame_size));
618 else
619 dummy_frame_addr = (CORE_ADDR *)
620 xmalloc (sizeof (CORE_ADDR) * (dummy_frame_size));
621 }
622
623 sp = read_register (SP_REGNUM);
624 pc = read_register (PC_REGNUM);
625 store_address (pc_targ, 4, pc);
626
627 skip_prologue (get_pc_function_start (pc), &fdata);
628
629 dummy_frame_addr[dummy_frame_count++] = sp;
630
631 /* Be careful! If the stack pointer is not decremented first, then kernel
632 thinks he is free to use the space underneath it. And kernel actually
633 uses that area for IPC purposes when executing ptrace(2) calls. So
634 before writing register values into the new frame, decrement and update
635 %sp first in order to secure your frame. */
636
637 /* FIXME: We don't check if the stack really has this much space.
638 This is a problem on the ppc simulator (which only grants one page
639 (4096 bytes) by default. */
640
641 write_register (SP_REGNUM, sp - DUMMY_FRAME_SIZE);
642
643 /* gdb relies on the state of current_frame. We'd better update it,
644 otherwise things like do_registers_info() wouldn't work properly! */
645
646 flush_cached_frames ();
647
648 /* save program counter in link register's space. */
649 write_memory (sp + (fdata.lr_offset ? fdata.lr_offset : DEFAULT_LR_SAVE),
650 pc_targ, 4);
651
652 /* save all floating point and general purpose registers here. */
653
654 /* fpr's, f0..f31 */
655 for (ii = 0; ii < 32; ++ii)
656 write_memory (sp - 8 - (ii * 8), &registers[REGISTER_BYTE (31 - ii + FP0_REGNUM)], 8);
657
658 /* gpr's r0..r31 */
659 for (ii = 1; ii <= 32; ++ii)
660 write_memory (sp - 256 - (ii * 4), &registers[REGISTER_BYTE (32 - ii)], 4);
661
662 /* so far, 32*2 + 32 words = 384 bytes have been written.
663 7 extra registers in our register set: pc, ps, cnd, lr, cnt, xer, mq */
664
665 for (ii = 1; ii <= (LAST_UISA_SP_REGNUM - FIRST_UISA_SP_REGNUM + 1); ++ii)
666 {
667 write_memory (sp - 384 - (ii * 4),
668 &registers[REGISTER_BYTE (FPLAST_REGNUM + ii)], 4);
669 }
670
671 /* Save sp or so called back chain right here. */
672 store_address (sp_targ, 4, sp);
673 write_memory (sp - DUMMY_FRAME_SIZE, sp_targ, 4);
674 sp -= DUMMY_FRAME_SIZE;
675
676 /* And finally, this is the back chain. */
677 write_memory (sp + 8, pc_targ, 4);
678 }
679
680
681 /* Pop a dummy frame.
682
683 In rs6000 when we push a dummy frame, we save all of the registers. This
684 is usually done before user calls a function explicitly.
685
686 After a dummy frame is pushed, some instructions are copied into stack,
687 and stack pointer is decremented even more. Since we don't have a frame
688 pointer to get back to the parent frame of the dummy, we start having
689 trouble poping it. Therefore, we keep a dummy frame stack, keeping
690 addresses of dummy frames as such. When poping happens and when we
691 detect that was a dummy frame, we pop it back to its parent by using
692 dummy frame stack (`dummy_frame_addr' array).
693
694 FIXME: This whole concept is broken. You should be able to detect
695 a dummy stack frame *on the user's stack itself*. When you do,
696 then you know the format of that stack frame -- including its
697 saved SP register! There should *not* be a separate stack in the
698 GDB process that keeps track of these dummy frames! -- gnu@cygnus.com Aug92
699 */
700
701 static void
702 pop_dummy_frame ()
703 {
704 CORE_ADDR sp, pc;
705 int ii;
706 sp = dummy_frame_addr[--dummy_frame_count];
707
708 /* restore all fpr's. */
709 for (ii = 1; ii <= 32; ++ii)
710 read_memory (sp - (ii * 8), &registers[REGISTER_BYTE (32 - ii + FP0_REGNUM)], 8);
711
712 /* restore all gpr's */
713 for (ii = 1; ii <= 32; ++ii)
714 {
715 read_memory (sp - 256 - (ii * 4), &registers[REGISTER_BYTE (32 - ii)], 4);
716 }
717
718 /* restore the rest of the registers. */
719 for (ii = 1; ii <= (LAST_UISA_SP_REGNUM - FIRST_UISA_SP_REGNUM + 1); ++ii)
720 read_memory (sp - 384 - (ii * 4),
721 &registers[REGISTER_BYTE (FPLAST_REGNUM + ii)], 4);
722
723 read_memory (sp - (DUMMY_FRAME_SIZE - 8),
724 &registers[REGISTER_BYTE (PC_REGNUM)], 4);
725
726 /* when a dummy frame was being pushed, we had to decrement %sp first, in
727 order to secure astack space. Thus, saved %sp (or %r1) value, is not the
728 one we should restore. Change it with the one we need. */
729
730 memcpy (&registers[REGISTER_BYTE (FP_REGNUM)], (char *) &sp, sizeof (int));
731
732 /* Now we can restore all registers. */
733
734 target_store_registers (-1);
735 pc = read_pc ();
736 flush_cached_frames ();
737 }
738
739
740 /* pop the innermost frame, go back to the caller. */
741
742 void
743 pop_frame ()
744 {
745 CORE_ADDR pc, lr, sp, prev_sp; /* %pc, %lr, %sp */
746 struct rs6000_framedata fdata;
747 struct frame_info *frame = get_current_frame ();
748 int addr, ii;
749
750 pc = read_pc ();
751 sp = FRAME_FP (frame);
752
753 if (stop_stack_dummy)
754 {
755 if (USE_GENERIC_DUMMY_FRAMES)
756 {
757 generic_pop_dummy_frame ();
758 flush_cached_frames ();
759 return;
760 }
761 else
762 {
763 if (dummy_frame_count)
764 pop_dummy_frame ();
765 return;
766 }
767 }
768
769 /* Make sure that all registers are valid. */
770 read_register_bytes (0, NULL, REGISTER_BYTES);
771
772 /* figure out previous %pc value. If the function is frameless, it is
773 still in the link register, otherwise walk the frames and retrieve the
774 saved %pc value in the previous frame. */
775
776 addr = get_pc_function_start (frame->pc);
777 (void) skip_prologue (addr, &fdata);
778
779 if (fdata.frameless)
780 prev_sp = sp;
781 else
782 prev_sp = read_memory_integer (sp, 4);
783 if (fdata.lr_offset == 0)
784 lr = read_register (LR_REGNUM);
785 else
786 lr = read_memory_integer (prev_sp + fdata.lr_offset, 4);
787
788 /* reset %pc value. */
789 write_register (PC_REGNUM, lr);
790
791 /* reset register values if any was saved earlier. */
792
793 if (fdata.saved_gpr != -1)
794 {
795 addr = prev_sp + fdata.gpr_offset;
796 for (ii = fdata.saved_gpr; ii <= 31; ++ii)
797 {
798 read_memory (addr, &registers[REGISTER_BYTE (ii)], 4);
799 addr += 4;
800 }
801 }
802
803 if (fdata.saved_fpr != -1)
804 {
805 addr = prev_sp + fdata.fpr_offset;
806 for (ii = fdata.saved_fpr; ii <= 31; ++ii)
807 {
808 read_memory (addr, &registers[REGISTER_BYTE (ii + FP0_REGNUM)], 8);
809 addr += 8;
810 }
811 }
812
813 write_register (SP_REGNUM, prev_sp);
814 target_store_registers (-1);
815 flush_cached_frames ();
816 }
817
818 /* fixup the call sequence of a dummy function, with the real function address.
819 its argumets will be passed by gdb. */
820
821 void
822 rs6000_fix_call_dummy (dummyname, pc, fun, nargs, args, type, gcc_p)
823 char *dummyname;
824 CORE_ADDR pc;
825 CORE_ADDR fun;
826 int nargs;
827 value_ptr *args;
828 struct type *type;
829 int gcc_p;
830 {
831 #define TOC_ADDR_OFFSET 20
832 #define TARGET_ADDR_OFFSET 28
833
834 int ii;
835 CORE_ADDR target_addr;
836
837 if (find_toc_address_hook != NULL)
838 {
839 CORE_ADDR tocvalue;
840
841 tocvalue = (*find_toc_address_hook) (fun);
842 ii = *(int *) ((char *) dummyname + TOC_ADDR_OFFSET);
843 ii = (ii & 0xffff0000) | (tocvalue >> 16);
844 *(int *) ((char *) dummyname + TOC_ADDR_OFFSET) = ii;
845
846 ii = *(int *) ((char *) dummyname + TOC_ADDR_OFFSET + 4);
847 ii = (ii & 0xffff0000) | (tocvalue & 0x0000ffff);
848 *(int *) ((char *) dummyname + TOC_ADDR_OFFSET + 4) = ii;
849 }
850
851 target_addr = fun;
852 ii = *(int *) ((char *) dummyname + TARGET_ADDR_OFFSET);
853 ii = (ii & 0xffff0000) | (target_addr >> 16);
854 *(int *) ((char *) dummyname + TARGET_ADDR_OFFSET) = ii;
855
856 ii = *(int *) ((char *) dummyname + TARGET_ADDR_OFFSET + 4);
857 ii = (ii & 0xffff0000) | (target_addr & 0x0000ffff);
858 *(int *) ((char *) dummyname + TARGET_ADDR_OFFSET + 4) = ii;
859 }
860
861 /* Pass the arguments in either registers, or in the stack. In RS6000,
862 the first eight words of the argument list (that might be less than
863 eight parameters if some parameters occupy more than one word) are
864 passed in r3..r11 registers. float and double parameters are
865 passed in fpr's, in addition to that. Rest of the parameters if any
866 are passed in user stack. There might be cases in which half of the
867 parameter is copied into registers, the other half is pushed into
868 stack.
869
870 If the function is returning a structure, then the return address is passed
871 in r3, then the first 7 words of the parameters can be passed in registers,
872 starting from r4. */
873
874 CORE_ADDR
875 rs6000_push_arguments (nargs, args, sp, struct_return, struct_addr)
876 int nargs;
877 value_ptr *args;
878 CORE_ADDR sp;
879 int struct_return;
880 CORE_ADDR struct_addr;
881 {
882 int ii;
883 int len = 0;
884 int argno; /* current argument number */
885 int argbytes; /* current argument byte */
886 char tmp_buffer[50];
887 int f_argno = 0; /* current floating point argno */
888
889 value_ptr arg = 0;
890 struct type *type;
891
892 CORE_ADDR saved_sp;
893
894 if (!USE_GENERIC_DUMMY_FRAMES)
895 {
896 if (dummy_frame_count <= 0)
897 printf_unfiltered ("FATAL ERROR -push_arguments()! frame not found!!\n");
898 }
899
900 /* The first eight words of ther arguments are passed in registers. Copy
901 them appropriately.
902
903 If the function is returning a `struct', then the first word (which
904 will be passed in r3) is used for struct return address. In that
905 case we should advance one word and start from r4 register to copy
906 parameters. */
907
908 ii = struct_return ? 1 : 0;
909
910 /*
911 effectively indirect call... gcc does...
912
913 return_val example( float, int);
914
915 eabi:
916 float in fp0, int in r3
917 offset of stack on overflow 8/16
918 for varargs, must go by type.
919 power open:
920 float in r3&r4, int in r5
921 offset of stack on overflow different
922 both:
923 return in r3 or f0. If no float, must study how gcc emulates floats;
924 pay attention to arg promotion.
925 User may have to cast\args to handle promotion correctly
926 since gdb won't know if prototype supplied or not.
927 */
928
929 for (argno = 0, argbytes = 0; argno < nargs && ii < 8; ++ii)
930 {
931
932 arg = args[argno];
933 type = check_typedef (VALUE_TYPE (arg));
934 len = TYPE_LENGTH (type);
935
936 if (TYPE_CODE (type) == TYPE_CODE_FLT)
937 {
938
939 /* floating point arguments are passed in fpr's, as well as gpr's.
940 There are 13 fpr's reserved for passing parameters. At this point
941 there is no way we would run out of them. */
942
943 if (len > 8)
944 printf_unfiltered (
945 "Fatal Error: a floating point parameter #%d with a size > 8 is found!\n", argno);
946
947 memcpy (&registers[REGISTER_BYTE (FP0_REGNUM + 1 + f_argno)],
948 VALUE_CONTENTS (arg),
949 len);
950 ++f_argno;
951 }
952
953 if (len > 4)
954 {
955
956 /* Argument takes more than one register. */
957 while (argbytes < len)
958 {
959 memset (&registers[REGISTER_BYTE (ii + 3)], 0, sizeof (int));
960 memcpy (&registers[REGISTER_BYTE (ii + 3)],
961 ((char *) VALUE_CONTENTS (arg)) + argbytes,
962 (len - argbytes) > 4 ? 4 : len - argbytes);
963 ++ii, argbytes += 4;
964
965 if (ii >= 8)
966 goto ran_out_of_registers_for_arguments;
967 }
968 argbytes = 0;
969 --ii;
970 }
971 else
972 { /* Argument can fit in one register. No problem. */
973 memset (&registers[REGISTER_BYTE (ii + 3)], 0, sizeof (int));
974 memcpy (&registers[REGISTER_BYTE (ii + 3)], VALUE_CONTENTS (arg), len);
975 }
976 ++argno;
977 }
978
979 ran_out_of_registers_for_arguments:
980
981 if (USE_GENERIC_DUMMY_FRAMES)
982 {
983 saved_sp = read_sp ();
984 }
985 else
986 {
987 /* location for 8 parameters are always reserved. */
988 sp -= 4 * 8;
989
990 /* another six words for back chain, TOC register, link register, etc. */
991 sp -= 24;
992 }
993
994 /* if there are more arguments, allocate space for them in
995 the stack, then push them starting from the ninth one. */
996
997 if ((argno < nargs) || argbytes)
998 {
999 int space = 0, jj;
1000
1001 if (argbytes)
1002 {
1003 space += ((len - argbytes + 3) & -4);
1004 jj = argno + 1;
1005 }
1006 else
1007 jj = argno;
1008
1009 for (; jj < nargs; ++jj)
1010 {
1011 value_ptr val = args[jj];
1012 space += ((TYPE_LENGTH (VALUE_TYPE (val))) + 3) & -4;
1013 }
1014
1015 /* add location required for the rest of the parameters */
1016 space = (space + 7) & -8;
1017 sp -= space;
1018
1019 /* This is another instance we need to be concerned about securing our
1020 stack space. If we write anything underneath %sp (r1), we might conflict
1021 with the kernel who thinks he is free to use this area. So, update %sp
1022 first before doing anything else. */
1023
1024 write_register (SP_REGNUM, sp);
1025
1026 /* if the last argument copied into the registers didn't fit there
1027 completely, push the rest of it into stack. */
1028
1029 if (argbytes)
1030 {
1031 write_memory (sp + 24 + (ii * 4),
1032 ((char *) VALUE_CONTENTS (arg)) + argbytes,
1033 len - argbytes);
1034 ++argno;
1035 ii += ((len - argbytes + 3) & -4) / 4;
1036 }
1037
1038 /* push the rest of the arguments into stack. */
1039 for (; argno < nargs; ++argno)
1040 {
1041
1042 arg = args[argno];
1043 type = check_typedef (VALUE_TYPE (arg));
1044 len = TYPE_LENGTH (type);
1045
1046
1047 /* float types should be passed in fpr's, as well as in the stack. */
1048 if (TYPE_CODE (type) == TYPE_CODE_FLT && f_argno < 13)
1049 {
1050
1051 if (len > 8)
1052 printf_unfiltered (
1053 "Fatal Error: a floating point parameter #%d with a size > 8 is found!\n", argno);
1054
1055 memcpy (&registers[REGISTER_BYTE (FP0_REGNUM + 1 + f_argno)],
1056 VALUE_CONTENTS (arg),
1057 len);
1058 ++f_argno;
1059 }
1060
1061 write_memory (sp + 24 + (ii * 4), (char *) VALUE_CONTENTS (arg), len);
1062 ii += ((len + 3) & -4) / 4;
1063 }
1064 }
1065 else
1066 /* Secure stack areas first, before doing anything else. */
1067 write_register (SP_REGNUM, sp);
1068
1069 if (!USE_GENERIC_DUMMY_FRAMES)
1070 {
1071 /* we want to copy 24 bytes of target's frame to dummy's frame,
1072 then set back chain to point to new frame. */
1073
1074 saved_sp = dummy_frame_addr[dummy_frame_count - 1];
1075 read_memory (saved_sp, tmp_buffer, 24);
1076 write_memory (sp, tmp_buffer, 24);
1077 }
1078
1079 /* set back chain properly */
1080 store_address (tmp_buffer, 4, saved_sp);
1081 write_memory (sp, tmp_buffer, 4);
1082
1083 target_store_registers (-1);
1084 return sp;
1085 }
1086 #ifdef ELF_OBJECT_FORMAT
1087
1088 /* Function: ppc_push_return_address (pc, sp)
1089 Set up the return address for the inferior function call. */
1090
1091 CORE_ADDR
1092 ppc_push_return_address (pc, sp)
1093 CORE_ADDR pc;
1094 CORE_ADDR sp;
1095 {
1096 write_register (LR_REGNUM, CALL_DUMMY_ADDRESS ());
1097 return sp;
1098 }
1099
1100 #endif
1101
1102 /* a given return value in `regbuf' with a type `valtype', extract and copy its
1103 value into `valbuf' */
1104
1105 void
1106 extract_return_value (valtype, regbuf, valbuf)
1107 struct type *valtype;
1108 char regbuf[REGISTER_BYTES];
1109 char *valbuf;
1110 {
1111 int offset = 0;
1112
1113 if (TYPE_CODE (valtype) == TYPE_CODE_FLT)
1114 {
1115
1116 double dd;
1117 float ff;
1118 /* floats and doubles are returned in fpr1. fpr's have a size of 8 bytes.
1119 We need to truncate the return value into float size (4 byte) if
1120 necessary. */
1121
1122 if (TYPE_LENGTH (valtype) > 4) /* this is a double */
1123 memcpy (valbuf,
1124 &regbuf[REGISTER_BYTE (FP0_REGNUM + 1)],
1125 TYPE_LENGTH (valtype));
1126 else
1127 { /* float */
1128 memcpy (&dd, &regbuf[REGISTER_BYTE (FP0_REGNUM + 1)], 8);
1129 ff = (float) dd;
1130 memcpy (valbuf, &ff, sizeof (float));
1131 }
1132 }
1133 else
1134 {
1135 /* return value is copied starting from r3. */
1136 if (TARGET_BYTE_ORDER == BIG_ENDIAN
1137 && TYPE_LENGTH (valtype) < REGISTER_RAW_SIZE (3))
1138 offset = REGISTER_RAW_SIZE (3) - TYPE_LENGTH (valtype);
1139
1140 memcpy (valbuf,
1141 regbuf + REGISTER_BYTE (3) + offset,
1142 TYPE_LENGTH (valtype));
1143 }
1144 }
1145
1146
1147 /* keep structure return address in this variable.
1148 FIXME: This is a horrid kludge which should not be allowed to continue
1149 living. This only allows a single nested call to a structure-returning
1150 function. Come on, guys! -- gnu@cygnus.com, Aug 92 */
1151
1152 CORE_ADDR rs6000_struct_return_address;
1153
1154
1155 /* Indirect function calls use a piece of trampoline code to do context
1156 switching, i.e. to set the new TOC table. Skip such code if we are on
1157 its first instruction (as when we have single-stepped to here).
1158 Also skip shared library trampoline code (which is different from
1159 indirect function call trampolines).
1160 Result is desired PC to step until, or NULL if we are not in
1161 trampoline code. */
1162
1163 CORE_ADDR
1164 skip_trampoline_code (pc)
1165 CORE_ADDR pc;
1166 {
1167 register unsigned int ii, op;
1168 CORE_ADDR solib_target_pc;
1169
1170 static unsigned trampoline_code[] =
1171 {
1172 0x800b0000, /* l r0,0x0(r11) */
1173 0x90410014, /* st r2,0x14(r1) */
1174 0x7c0903a6, /* mtctr r0 */
1175 0x804b0004, /* l r2,0x4(r11) */
1176 0x816b0008, /* l r11,0x8(r11) */
1177 0x4e800420, /* bctr */
1178 0x4e800020, /* br */
1179 0
1180 };
1181
1182 /* If pc is in a shared library trampoline, return its target. */
1183 solib_target_pc = find_solib_trampoline_target (pc);
1184 if (solib_target_pc)
1185 return solib_target_pc;
1186
1187 for (ii = 0; trampoline_code[ii]; ++ii)
1188 {
1189 op = read_memory_integer (pc + (ii * 4), 4);
1190 if (op != trampoline_code[ii])
1191 return 0;
1192 }
1193 ii = read_register (11); /* r11 holds destination addr */
1194 pc = read_memory_integer (ii, 4); /* (r11) value */
1195 return pc;
1196 }
1197
1198 /* Determines whether the function FI has a frame on the stack or not. */
1199
1200 int
1201 frameless_function_invocation (fi)
1202 struct frame_info *fi;
1203 {
1204 CORE_ADDR func_start;
1205 struct rs6000_framedata fdata;
1206
1207 /* Don't even think about framelessness except on the innermost frame
1208 or if the function was interrupted by a signal. */
1209 if (fi->next != NULL && !fi->next->signal_handler_caller)
1210 return 0;
1211
1212 func_start = get_pc_function_start (fi->pc);
1213
1214 /* If we failed to find the start of the function, it is a mistake
1215 to inspect the instructions. */
1216
1217 if (!func_start)
1218 {
1219 /* A frame with a zero PC is usually created by dereferencing a NULL
1220 function pointer, normally causing an immediate core dump of the
1221 inferior. Mark function as frameless, as the inferior has no chance
1222 of setting up a stack frame. */
1223 if (fi->pc == 0)
1224 return 1;
1225 else
1226 return 0;
1227 }
1228
1229 (void) skip_prologue (func_start, &fdata);
1230 return fdata.frameless;
1231 }
1232
1233 /* Return the PC saved in a frame */
1234
1235 unsigned long
1236 frame_saved_pc (fi)
1237 struct frame_info *fi;
1238 {
1239 CORE_ADDR func_start;
1240 struct rs6000_framedata fdata;
1241
1242 if (fi->signal_handler_caller)
1243 return read_memory_integer (fi->frame + SIG_FRAME_PC_OFFSET, 4);
1244
1245 if (USE_GENERIC_DUMMY_FRAMES)
1246 {
1247 if (PC_IN_CALL_DUMMY (fi->pc, fi->frame, fi->frame))
1248 return generic_read_register_dummy (fi->pc, fi->frame, PC_REGNUM);
1249 }
1250
1251 func_start = get_pc_function_start (fi->pc);
1252
1253 /* If we failed to find the start of the function, it is a mistake
1254 to inspect the instructions. */
1255 if (!func_start)
1256 return 0;
1257
1258 (void) skip_prologue (func_start, &fdata);
1259
1260 if (fdata.lr_offset == 0 && fi->next != NULL)
1261 {
1262 if (fi->next->signal_handler_caller)
1263 return read_memory_integer (fi->next->frame + SIG_FRAME_LR_OFFSET, 4);
1264 else
1265 return read_memory_integer (rs6000_frame_chain (fi) + DEFAULT_LR_SAVE,
1266 4);
1267 }
1268
1269 if (fdata.lr_offset == 0)
1270 return read_register (LR_REGNUM);
1271
1272 return read_memory_integer (rs6000_frame_chain (fi) + fdata.lr_offset, 4);
1273 }
1274
1275 /* If saved registers of frame FI are not known yet, read and cache them.
1276 &FDATAP contains rs6000_framedata; TDATAP can be NULL,
1277 in which case the framedata are read. */
1278
1279 static void
1280 frame_get_saved_regs (fi, fdatap)
1281 struct frame_info *fi;
1282 struct rs6000_framedata *fdatap;
1283 {
1284 int ii;
1285 CORE_ADDR frame_addr;
1286 struct rs6000_framedata work_fdata;
1287
1288 if (fi->saved_regs)
1289 return;
1290
1291 if (fdatap == NULL)
1292 {
1293 fdatap = &work_fdata;
1294 (void) skip_prologue (get_pc_function_start (fi->pc), fdatap);
1295 }
1296
1297 frame_saved_regs_zalloc (fi);
1298
1299 /* If there were any saved registers, figure out parent's stack
1300 pointer. */
1301 /* The following is true only if the frame doesn't have a call to
1302 alloca(), FIXME. */
1303
1304 if (fdatap->saved_fpr == 0 && fdatap->saved_gpr == 0
1305 && fdatap->lr_offset == 0 && fdatap->cr_offset == 0)
1306 frame_addr = 0;
1307 else if (fi->prev && fi->prev->frame)
1308 frame_addr = fi->prev->frame;
1309 else
1310 frame_addr = read_memory_integer (fi->frame, 4);
1311
1312 /* if != -1, fdatap->saved_fpr is the smallest number of saved_fpr.
1313 All fpr's from saved_fpr to fp31 are saved. */
1314
1315 if (fdatap->saved_fpr >= 0)
1316 {
1317 int i;
1318 int fpr_offset = frame_addr + fdatap->fpr_offset;
1319 for (i = fdatap->saved_fpr; i < 32; i++)
1320 {
1321 fi->saved_regs[FP0_REGNUM + i] = fpr_offset;
1322 fpr_offset += 8;
1323 }
1324 }
1325
1326 /* if != -1, fdatap->saved_gpr is the smallest number of saved_gpr.
1327 All gpr's from saved_gpr to gpr31 are saved. */
1328
1329 if (fdatap->saved_gpr >= 0)
1330 {
1331 int i;
1332 int gpr_offset = frame_addr + fdatap->gpr_offset;
1333 for (i = fdatap->saved_gpr; i < 32; i++)
1334 {
1335 fi->saved_regs[i] = gpr_offset;
1336 gpr_offset += 4;
1337 }
1338 }
1339
1340 /* If != 0, fdatap->cr_offset is the offset from the frame that holds
1341 the CR. */
1342 if (fdatap->cr_offset != 0)
1343 fi->saved_regs[CR_REGNUM] = frame_addr + fdatap->cr_offset;
1344
1345 /* If != 0, fdatap->lr_offset is the offset from the frame that holds
1346 the LR. */
1347 if (fdatap->lr_offset != 0)
1348 fi->saved_regs[LR_REGNUM] = frame_addr + fdatap->lr_offset;
1349 }
1350
1351 /* Return the address of a frame. This is the inital %sp value when the frame
1352 was first allocated. For functions calling alloca(), it might be saved in
1353 an alloca register. */
1354
1355 static CORE_ADDR
1356 frame_initial_stack_address (fi)
1357 struct frame_info *fi;
1358 {
1359 CORE_ADDR tmpaddr;
1360 struct rs6000_framedata fdata;
1361 struct frame_info *callee_fi;
1362
1363 /* if the initial stack pointer (frame address) of this frame is known,
1364 just return it. */
1365
1366 if (fi->extra_info->initial_sp)
1367 return fi->extra_info->initial_sp;
1368
1369 /* find out if this function is using an alloca register.. */
1370
1371 (void) skip_prologue (get_pc_function_start (fi->pc), &fdata);
1372
1373 /* if saved registers of this frame are not known yet, read and cache them. */
1374
1375 if (!fi->saved_regs)
1376 frame_get_saved_regs (fi, &fdata);
1377
1378 /* If no alloca register used, then fi->frame is the value of the %sp for
1379 this frame, and it is good enough. */
1380
1381 if (fdata.alloca_reg < 0)
1382 {
1383 fi->extra_info->initial_sp = fi->frame;
1384 return fi->extra_info->initial_sp;
1385 }
1386
1387 /* This function has an alloca register. If this is the top-most frame
1388 (with the lowest address), the value in alloca register is good. */
1389
1390 if (!fi->next)
1391 return fi->extra_info->initial_sp = read_register (fdata.alloca_reg);
1392
1393 /* Otherwise, this is a caller frame. Callee has usually already saved
1394 registers, but there are exceptions (such as when the callee
1395 has no parameters). Find the address in which caller's alloca
1396 register is saved. */
1397
1398 for (callee_fi = fi->next; callee_fi; callee_fi = callee_fi->next)
1399 {
1400
1401 if (!callee_fi->saved_regs)
1402 frame_get_saved_regs (callee_fi, NULL);
1403
1404 /* this is the address in which alloca register is saved. */
1405
1406 tmpaddr = callee_fi->saved_regs[fdata.alloca_reg];
1407 if (tmpaddr)
1408 {
1409 fi->extra_info->initial_sp = read_memory_integer (tmpaddr, 4);
1410 return fi->extra_info->initial_sp;
1411 }
1412
1413 /* Go look into deeper levels of the frame chain to see if any one of
1414 the callees has saved alloca register. */
1415 }
1416
1417 /* If alloca register was not saved, by the callee (or any of its callees)
1418 then the value in the register is still good. */
1419
1420 fi->extra_info->initial_sp = read_register (fdata.alloca_reg);
1421 return fi->extra_info->initial_sp;
1422 }
1423
1424 CORE_ADDR
1425 rs6000_frame_chain (thisframe)
1426 struct frame_info *thisframe;
1427 {
1428 CORE_ADDR fp;
1429
1430 if (USE_GENERIC_DUMMY_FRAMES)
1431 {
1432 if (PC_IN_CALL_DUMMY (thisframe->pc, thisframe->frame, thisframe->frame))
1433 return thisframe->frame; /* dummy frame same as caller's frame */
1434 }
1435
1436 if (inside_entry_file (thisframe->pc) ||
1437 thisframe->pc == entry_point_address ())
1438 return 0;
1439
1440 if (thisframe->signal_handler_caller)
1441 fp = read_memory_integer (thisframe->frame + SIG_FRAME_FP_OFFSET, 4);
1442 else if (thisframe->next != NULL
1443 && thisframe->next->signal_handler_caller
1444 && frameless_function_invocation (thisframe))
1445 /* A frameless function interrupted by a signal did not change the
1446 frame pointer. */
1447 fp = FRAME_FP (thisframe);
1448 else
1449 fp = read_memory_integer ((thisframe)->frame, 4);
1450
1451 if (USE_GENERIC_DUMMY_FRAMES)
1452 {
1453 CORE_ADDR fpp, lr;
1454
1455 lr = read_register (LR_REGNUM);
1456 if (lr == entry_point_address ())
1457 if (fp != 0 && (fpp = read_memory_integer (fp, 4)) != 0)
1458 if (PC_IN_CALL_DUMMY (lr, fpp, fpp))
1459 return fpp;
1460 }
1461
1462 return fp;
1463 }
1464 \f
1465 /* Return nonzero if ADDR (a function pointer) is in the data space and
1466 is therefore a special function pointer. */
1467
1468 int
1469 is_magic_function_pointer (addr)
1470 CORE_ADDR addr;
1471 {
1472 struct obj_section *s;
1473
1474 s = find_pc_section (addr);
1475 if (s && s->the_bfd_section->flags & SEC_CODE)
1476 return 0;
1477 else
1478 return 1;
1479 }
1480
1481 #ifdef GDB_TARGET_POWERPC
1482 int
1483 gdb_print_insn_powerpc (memaddr, info)
1484 bfd_vma memaddr;
1485 disassemble_info *info;
1486 {
1487 if (TARGET_BYTE_ORDER == BIG_ENDIAN)
1488 return print_insn_big_powerpc (memaddr, info);
1489 else
1490 return print_insn_little_powerpc (memaddr, info);
1491 }
1492 #endif
1493 \f
1494
1495 /* Handling the various PowerPC/RS6000 variants. */
1496
1497
1498 /* The arrays here called register_names_MUMBLE hold names that
1499 the rs6000_register_name function returns.
1500
1501 For each family of PPC variants, I've tried to isolate out the
1502 common registers and put them up front, so that as long as you get
1503 the general family right, GDB will correctly identify the registers
1504 common to that family. The common register sets are:
1505
1506 For the 60x family: hid0 hid1 iabr dabr pir
1507
1508 For the 505 and 860 family: eie eid nri
1509
1510 For the 403 and 403GC: icdbdr esr dear evpr cdbcr tsr tcr pit tbhi
1511 tblo srr2 srr3 dbsr dbcr iac1 iac2 dac1 dac2 dccr iccr pbl1
1512 pbu1 pbl2 pbu2
1513
1514 Most of these register groups aren't anything formal. I arrived at
1515 them by looking at the registers that occurred in more than one
1516 processor. */
1517
1518 /* UISA register names common across all architectures, including POWER. */
1519
1520 #define COMMON_UISA_REG_NAMES \
1521 /* 0 */ "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7", \
1522 /* 8 */ "r8", "r9", "r10","r11","r12","r13","r14","r15", \
1523 /* 16 */ "r16","r17","r18","r19","r20","r21","r22","r23", \
1524 /* 24 */ "r24","r25","r26","r27","r28","r29","r30","r31", \
1525 /* 32 */ "f0", "f1", "f2", "f3", "f4", "f5", "f6", "f7", \
1526 /* 40 */ "f8", "f9", "f10","f11","f12","f13","f14","f15", \
1527 /* 48 */ "f16","f17","f18","f19","f20","f21","f22","f23", \
1528 /* 56 */ "f24","f25","f26","f27","f28","f29","f30","f31", \
1529 /* 64 */ "pc", "ps"
1530
1531 /* UISA-level SPR names for PowerPC. */
1532 #define PPC_UISA_SPR_NAMES \
1533 /* 66 */ "cr", "lr", "ctr", "xer", ""
1534
1535 /* Segment register names, for PowerPC. */
1536 #define PPC_SEGMENT_REG_NAMES \
1537 /* 71 */ "sr0", "sr1", "sr2", "sr3", "sr4", "sr5", "sr6", "sr7", \
1538 /* 79 */ "sr8", "sr9", "sr10", "sr11", "sr12", "sr13", "sr14", "sr15"
1539
1540 /* OEA SPR names for 32-bit PowerPC implementations.
1541 The blank space is for "asr", which is only present on 64-bit
1542 implementations. */
1543 #define PPC_32_OEA_SPR_NAMES \
1544 /* 87 */ "pvr", \
1545 /* 88 */ "ibat0u", "ibat0l", "ibat1u", "ibat1l", \
1546 /* 92 */ "ibat2u", "ibat2l", "ibat3u", "ibat3l", \
1547 /* 96 */ "dbat0u", "dbat0l", "dbat1u", "dbat1l", \
1548 /* 100 */ "dbat2u", "dbat2l", "dbat3u", "dbat3l", \
1549 /* 104 */ "sdr1", "", "dar", "dsisr", "sprg0", "sprg1", "sprg2", "sprg3",\
1550 /* 112 */ "srr0", "srr1", "tbl", "tbu", "dec", "dabr", "ear"
1551
1552 /* For the RS6000, we only cover user-level SPR's. */
1553 char *register_names_rs6000[] =
1554 {
1555 COMMON_UISA_REG_NAMES,
1556 /* 66 */ "cnd", "lr", "cnt", "xer", "mq"
1557 };
1558
1559 /* a UISA-only view of the PowerPC. */
1560 char *register_names_uisa[] =
1561 {
1562 COMMON_UISA_REG_NAMES,
1563 PPC_UISA_SPR_NAMES
1564 };
1565
1566 char *register_names_403[] =
1567 {
1568 COMMON_UISA_REG_NAMES,
1569 PPC_UISA_SPR_NAMES,
1570 PPC_SEGMENT_REG_NAMES,
1571 PPC_32_OEA_SPR_NAMES,
1572 /* 119 */ "icdbdr", "esr", "dear", "evpr", "cdbcr", "tsr", "tcr", "pit",
1573 /* 127 */ "tbhi", "tblo", "srr2", "srr3", "dbsr", "dbcr", "iac1", "iac2",
1574 /* 135 */ "dac1", "dac2", "dccr", "iccr", "pbl1", "pbu1", "pbl2", "pbu2"
1575 };
1576
1577 char *register_names_403GC[] =
1578 {
1579 COMMON_UISA_REG_NAMES,
1580 PPC_UISA_SPR_NAMES,
1581 PPC_SEGMENT_REG_NAMES,
1582 PPC_32_OEA_SPR_NAMES,
1583 /* 119 */ "icdbdr", "esr", "dear", "evpr", "cdbcr", "tsr", "tcr", "pit",
1584 /* 127 */ "tbhi", "tblo", "srr2", "srr3", "dbsr", "dbcr", "iac1", "iac2",
1585 /* 135 */ "dac1", "dac2", "dccr", "iccr", "pbl1", "pbu1", "pbl2", "pbu2",
1586 /* 143 */ "zpr", "pid", "sgr", "dcwr", "tbhu", "tblu"
1587 };
1588
1589 char *register_names_505[] =
1590 {
1591 COMMON_UISA_REG_NAMES,
1592 PPC_UISA_SPR_NAMES,
1593 PPC_SEGMENT_REG_NAMES,
1594 PPC_32_OEA_SPR_NAMES,
1595 /* 119 */ "eie", "eid", "nri"
1596 };
1597
1598 char *register_names_860[] =
1599 {
1600 COMMON_UISA_REG_NAMES,
1601 PPC_UISA_SPR_NAMES,
1602 PPC_SEGMENT_REG_NAMES,
1603 PPC_32_OEA_SPR_NAMES,
1604 /* 119 */ "eie", "eid", "nri", "cmpa", "cmpb", "cmpc", "cmpd", "icr",
1605 /* 127 */ "der", "counta", "countb", "cmpe", "cmpf", "cmpg", "cmph",
1606 /* 134 */ "lctrl1", "lctrl2", "ictrl", "bar", "ic_cst", "ic_adr", "ic_dat",
1607 /* 141 */ "dc_cst", "dc_adr", "dc_dat", "dpdr", "dpir", "immr", "mi_ctr",
1608 /* 148 */ "mi_ap", "mi_epn", "mi_twc", "mi_rpn", "md_ctr", "m_casid",
1609 /* 154 */ "md_ap", "md_epn", "md_twb", "md_twc", "md_rpn", "m_tw",
1610 /* 160 */ "mi_dbcam", "mi_dbram0", "mi_dbram1", "md_dbcam", "md_dbram0",
1611 /* 165 */ "md_dbram1"
1612 };
1613
1614 /* Note that the 601 has different register numbers for reading and
1615 writing RTCU and RTCL. However, how one reads and writes a
1616 register is the stub's problem. */
1617 char *register_names_601[] =
1618 {
1619 COMMON_UISA_REG_NAMES,
1620 PPC_UISA_SPR_NAMES,
1621 PPC_SEGMENT_REG_NAMES,
1622 PPC_32_OEA_SPR_NAMES,
1623 /* 119 */ "hid0", "hid1", "iabr", "dabr", "pir", "mq", "rtcu",
1624 /* 126 */ "rtcl"
1625 };
1626
1627 char *register_names_602[] =
1628 {
1629 COMMON_UISA_REG_NAMES,
1630 PPC_UISA_SPR_NAMES,
1631 PPC_SEGMENT_REG_NAMES,
1632 PPC_32_OEA_SPR_NAMES,
1633 /* 119 */ "hid0", "hid1", "iabr", "", "", "tcr", "ibr", "esassr", "sebr",
1634 /* 128 */ "ser", "sp", "lt"
1635 };
1636
1637 char *register_names_603[] =
1638 {
1639 COMMON_UISA_REG_NAMES,
1640 PPC_UISA_SPR_NAMES,
1641 PPC_SEGMENT_REG_NAMES,
1642 PPC_32_OEA_SPR_NAMES,
1643 /* 119 */ "hid0", "hid1", "iabr", "", "", "dmiss", "dcmp", "hash1",
1644 /* 127 */ "hash2", "imiss", "icmp", "rpa"
1645 };
1646
1647 char *register_names_604[] =
1648 {
1649 COMMON_UISA_REG_NAMES,
1650 PPC_UISA_SPR_NAMES,
1651 PPC_SEGMENT_REG_NAMES,
1652 PPC_32_OEA_SPR_NAMES,
1653 /* 119 */ "hid0", "hid1", "iabr", "dabr", "pir", "mmcr0", "pmc1", "pmc2",
1654 /* 127 */ "sia", "sda"
1655 };
1656
1657 char *register_names_750[] =
1658 {
1659 COMMON_UISA_REG_NAMES,
1660 PPC_UISA_SPR_NAMES,
1661 PPC_SEGMENT_REG_NAMES,
1662 PPC_32_OEA_SPR_NAMES,
1663 /* 119 */ "hid0", "hid1", "iabr", "dabr", "", "ummcr0", "upmc1", "upmc2",
1664 /* 127 */ "usia", "ummcr1", "upmc3", "upmc4", "mmcr0", "pmc1", "pmc2",
1665 /* 134 */ "sia", "mmcr1", "pmc3", "pmc4", "l2cr", "ictc", "thrm1", "thrm2",
1666 /* 142 */ "thrm3"
1667 };
1668
1669
1670 /* Information about a particular processor variant. */
1671 struct variant
1672 {
1673 /* Name of this variant. */
1674 char *name;
1675
1676 /* English description of the variant. */
1677 char *description;
1678
1679 /* Table of register names; registers[R] is the name of the register
1680 number R. */
1681 int num_registers;
1682 char **registers;
1683 };
1684
1685 #define num_registers(list) (sizeof (list) / sizeof((list)[0]))
1686
1687
1688 /* Information in this table comes from the following web sites:
1689 IBM: http://www.chips.ibm.com:80/products/embedded/
1690 Motorola: http://www.mot.com/SPS/PowerPC/
1691
1692 I'm sure I've got some of the variant descriptions not quite right.
1693 Please report any inaccuracies you find to GDB's maintainer.
1694
1695 If you add entries to this table, please be sure to allow the new
1696 value as an argument to the --with-cpu flag, in configure.in. */
1697
1698 static struct variant
1699 variants[] =
1700 {
1701 {"ppc-uisa", "PowerPC UISA - a PPC processor as viewed by user-level code",
1702 num_registers (register_names_uisa), register_names_uisa},
1703 {"rs6000", "IBM RS6000 (\"POWER\") architecture, user-level view",
1704 num_registers (register_names_rs6000), register_names_rs6000},
1705 {"403", "IBM PowerPC 403",
1706 num_registers (register_names_403), register_names_403},
1707 {"403GC", "IBM PowerPC 403GC",
1708 num_registers (register_names_403GC), register_names_403GC},
1709 {"505", "Motorola PowerPC 505",
1710 num_registers (register_names_505), register_names_505},
1711 {"860", "Motorola PowerPC 860 or 850",
1712 num_registers (register_names_860), register_names_860},
1713 {"601", "Motorola PowerPC 601",
1714 num_registers (register_names_601), register_names_601},
1715 {"602", "Motorola PowerPC 602",
1716 num_registers (register_names_602), register_names_602},
1717 {"603", "Motorola/IBM PowerPC 603 or 603e",
1718 num_registers (register_names_603), register_names_603},
1719 {"604", "Motorola PowerPC 604 or 604e",
1720 num_registers (register_names_604), register_names_604},
1721 {"750", "Motorola/IBM PowerPC 750 or 740",
1722 num_registers (register_names_750), register_names_750},
1723 {0, 0, 0, 0}
1724 };
1725
1726
1727 static struct variant *current_variant;
1728
1729 char *
1730 rs6000_register_name (int i)
1731 {
1732 if (i < 0 || i >= NUM_REGS)
1733 error ("GDB bug: rs6000-tdep.c (rs6000_register_name): strange register number");
1734
1735 return ((i < current_variant->num_registers)
1736 ? current_variant->registers[i]
1737 : "");
1738 }
1739
1740
1741 static void
1742 install_variant (struct variant *v)
1743 {
1744 current_variant = v;
1745 }
1746
1747
1748 /* Look up the variant named NAME in the `variants' table. Return a
1749 pointer to the struct variant, or null if we couldn't find it. */
1750 static struct variant *
1751 find_variant_by_name (char *name)
1752 {
1753 int i;
1754
1755 for (i = 0; variants[i].name; i++)
1756 if (!strcmp (name, variants[i].name))
1757 return &variants[i];
1758
1759 return 0;
1760 }
1761
1762
1763 /* Install the PPC/RS6000 variant named NAME in the `variants' table.
1764 Return zero if we installed it successfully, or a non-zero value if
1765 we couldn't do it.
1766
1767 This might be useful to code outside this file, which doesn't want
1768 to depend on the exact indices of the entries in the `variants'
1769 table. Just make it non-static if you want that. */
1770 static int
1771 install_variant_by_name (char *name)
1772 {
1773 struct variant *v = find_variant_by_name (name);
1774
1775 if (v)
1776 {
1777 install_variant (v);
1778 return 0;
1779 }
1780 else
1781 return 1;
1782 }
1783
1784
1785 static void
1786 list_variants ()
1787 {
1788 int i;
1789
1790 printf_filtered ("GDB knows about the following PowerPC and RS6000 variants:\n");
1791
1792 for (i = 0; variants[i].name; i++)
1793 printf_filtered (" %-8s %s\n",
1794 variants[i].name, variants[i].description);
1795 }
1796
1797
1798 static void
1799 show_current_variant ()
1800 {
1801 printf_filtered ("PowerPC / RS6000 processor variant is set to `%s'.\n",
1802 current_variant->name);
1803 }
1804
1805
1806 static void
1807 set_processor (char *arg, int from_tty)
1808 {
1809 int i;
1810
1811 if (!arg || arg[0] == '\0')
1812 {
1813 list_variants ();
1814 return;
1815 }
1816
1817 if (install_variant_by_name (arg))
1818 {
1819 error_begin ();
1820 fprintf_filtered (gdb_stderr,
1821 "`%s' is not a recognized PowerPC / RS6000 variant name.\n\n", arg);
1822 list_variants ();
1823 return_to_top_level (RETURN_ERROR);
1824 }
1825
1826 show_current_variant ();
1827 }
1828
1829 static void
1830 show_processor (char *arg, int from_tty)
1831 {
1832 show_current_variant ();
1833 }
1834 \f
1835
1836
1837 /* Initialization code. */
1838
1839 void
1840 _initialize_rs6000_tdep ()
1841 {
1842 /* FIXME, this should not be decided via ifdef. */
1843 #ifdef GDB_TARGET_POWERPC
1844 tm_print_insn = gdb_print_insn_powerpc;
1845 #else
1846 tm_print_insn = print_insn_rs6000;
1847 #endif
1848
1849 /* I don't think we should use the set/show command arrangement
1850 here, because the way that's implemented makes it hard to do the
1851 error checking we want in a reasonable way. So we just add them
1852 as two separate commands. */
1853 add_cmd ("processor", class_support, set_processor,
1854 "`set processor NAME' sets the PowerPC/RS6000 variant to NAME.\n\
1855 If you set this, GDB will know about the special-purpose registers that are\n\
1856 available on the given variant.\n\
1857 Type `set processor' alone for a list of recognized variant names.",
1858 &setlist);
1859 add_cmd ("processor", class_support, show_processor,
1860 "Show the variant of the PowerPC or RS6000 processor in use.\n\
1861 Use `set processor' to change this.",
1862 &showlist);
1863
1864 /* Set the current PPC processor variant. */
1865 {
1866 int status = 1;
1867
1868 #ifdef TARGET_CPU_DEFAULT
1869 status = install_variant_by_name (TARGET_CPU_DEFAULT);
1870 #endif
1871
1872 if (status)
1873 {
1874 #ifdef GDB_TARGET_POWERPC
1875 install_variant_by_name ("ppc-uisa");
1876 #else
1877 install_variant_by_name ("rs6000");
1878 #endif
1879 }
1880 }
1881 }