1 /* Target-dependent code for the S12Z, for the GDB.
2 Copyright (C) 2018-2022 Free Software Foundation, Inc.
4 This file is part of GDB.
6 This program is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 3 of the License, or
9 (at your option) any later version.
11 This program is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
16 You should have received a copy of the GNU General Public License
17 along with this program. If not, see <http://www.gnu.org/licenses/>. */
19 /* Much of this file is shamelessly copied from or1k-tdep.c and others. */
23 #include "arch-utils.h"
24 #include "dwarf2/frame.h"
25 #include "gdbsupport/errors.h"
26 #include "frame-unwind.h"
30 #include "opcode/s12z.h"
31 #include "trad-frame.h"
33 #include "opcodes/s12z-opc.h"
36 /* Two of the registers included in S12Z_N_REGISTERS are
37 the CCH and CCL "registers" which are just views into
39 #define N_PHYSICAL_REGISTERS (S12Z_N_REGISTERS - 2)
42 /* A permutation of all the physical registers. Indexing this array
43 with an integer from gdb's internal representation will return the
45 static const int reg_perm
[N_PHYSICAL_REGISTERS
] =
62 /* The inverse of the above permutation. Indexing this
63 array with a register enum (e.g. REG_D2) will return the register
64 number in gdb's internal representation. */
65 static const int inv_reg_perm
[N_PHYSICAL_REGISTERS
] =
67 2, 3, 4, 5, /* d2, d3, d4, d5 */
70 8, 9, 10, 11, 12 /* x, y, s, p, ccw */
73 /* Return the name of the register REGNUM. */
75 s12z_register_name (struct gdbarch
*gdbarch
, int regnum
)
77 /* Registers is declared in opcodes/s12z.h. */
78 return registers
[reg_perm
[regnum
]].name
;
82 s12z_skip_prologue (struct gdbarch
*gdbarch
, CORE_ADDR pc
)
84 CORE_ADDR start_pc
= 0;
86 if (find_pc_partial_function (pc
, NULL
, &start_pc
, NULL
))
88 CORE_ADDR prologue_end
= skip_prologue_using_sal (gdbarch
, pc
);
90 if (prologue_end
!= 0)
94 warning (_("%s Failed to find end of prologue PC = %08x"),
95 __FUNCTION__
, (unsigned int) pc
);
101 s12z_register_type (struct gdbarch
*gdbarch
, int reg_nr
)
103 switch (registers
[reg_perm
[reg_nr
]].bytes
)
106 return builtin_type (gdbarch
)->builtin_uint8
;
108 return builtin_type (gdbarch
)->builtin_uint16
;
110 return builtin_type (gdbarch
)->builtin_uint24
;
112 return builtin_type (gdbarch
)->builtin_uint32
;
114 return builtin_type (gdbarch
)->builtin_uint32
;
116 return builtin_type (gdbarch
)->builtin_int0
;
121 s12z_dwarf_reg_to_regnum (struct gdbarch
*gdbarch
, int num
)
125 case 15: return REG_S
;
126 case 7: return REG_X
;
127 case 8: return REG_Y
;
128 case 42: return REG_D0
;
129 case 43: return REG_D1
;
130 case 44: return REG_D2
;
131 case 45: return REG_D3
;
132 case 46: return REG_D4
;
133 case 47: return REG_D5
;
134 case 48: return REG_D6
;
135 case 49: return REG_D7
;
141 /* Support functions for frame handling. */
144 /* Return a disassemble_info initialized for s12z disassembly, however,
145 the disassembler will not actually print anything. */
147 static struct disassemble_info
148 s12z_disassemble_info (struct gdbarch
*gdbarch
)
150 struct disassemble_info di
;
151 init_disassemble_info_for_no_printing (&di
);
152 di
.arch
= gdbarch_bfd_arch_info (gdbarch
)->arch
;
153 di
.mach
= gdbarch_bfd_arch_info (gdbarch
)->mach
;
154 di
.endian
= gdbarch_byte_order (gdbarch
);
155 di
.read_memory_func
= [](bfd_vma memaddr
, gdb_byte
*myaddr
,
156 unsigned int len
, struct disassemble_info
*info
)
158 return target_read_code (memaddr
, myaddr
, len
);
164 /* A struct (based on mem_read_abstraction_base) to read memory
165 through the disassemble_info API. */
166 struct mem_read_abstraction
168 struct mem_read_abstraction_base base
; /* The parent struct. */
169 bfd_vma memaddr
; /* Where to read from. */
170 struct disassemble_info
* info
; /* The disassembler to use for reading. */
173 /* Advance the reader by one byte. */
175 advance (struct mem_read_abstraction_base
*b
)
177 struct mem_read_abstraction
*mra
= (struct mem_read_abstraction
*) b
;
181 /* Return the current position of the reader. */
183 posn (struct mem_read_abstraction_base
*b
)
185 struct mem_read_abstraction
*mra
= (struct mem_read_abstraction
*) b
;
189 /* Read the N bytes at OFFSET using B. The bytes read are stored in BYTES.
190 It is the caller's responsibility to ensure that this is of at least N
193 abstract_read_memory (struct mem_read_abstraction_base
*b
,
195 size_t n
, bfd_byte
*bytes
)
197 struct mem_read_abstraction
*mra
= (struct mem_read_abstraction
*) b
;
200 (*mra
->info
->read_memory_func
) (mra
->memaddr
+ offset
,
201 bytes
, n
, mra
->info
);
205 (*mra
->info
->memory_error_func
) (status
, mra
->memaddr
, mra
->info
);
213 /* Return the stack adjustment caused by a push or pull instruction. */
215 push_pull_get_stack_adjustment (int n_operands
,
216 struct operand
*const *operands
)
218 int stack_adjustment
= 0;
219 gdb_assert (n_operands
> 0);
220 if (operands
[0]->cl
== OPND_CL_REGISTER_ALL
)
221 stack_adjustment
= 26; /* All the regs are involved. */
222 else if (operands
[0]->cl
== OPND_CL_REGISTER_ALL16
)
223 stack_adjustment
= 4 * 2; /* All four 16 bit regs are involved. */
225 for (int i
= 0; i
< n_operands
; ++i
)
227 if (operands
[i
]->cl
!= OPND_CL_REGISTER
)
228 continue; /* I don't think this can ever happen. */
229 const struct register_operand
*op
230 = (const struct register_operand
*) operands
[i
];
235 stack_adjustment
+= 3;
239 stack_adjustment
+= 4;
245 stack_adjustment
+= 2;
251 stack_adjustment
+= 1;
254 gdb_assert_not_reached ("Invalid register in push/pull operation.");
258 return stack_adjustment
;
261 /* Initialize a prologue cache. */
263 static struct trad_frame_cache
*
264 s12z_frame_cache (struct frame_info
*this_frame
, void **prologue_cache
)
266 struct trad_frame_cache
*info
;
269 CORE_ADDR this_sp_for_id
;
271 CORE_ADDR start_addr
;
274 /* Nothing to do if we already have this info. */
275 if (NULL
!= *prologue_cache
)
276 return (struct trad_frame_cache
*) *prologue_cache
;
278 /* Get a new prologue cache and populate it with default values. */
279 info
= trad_frame_cache_zalloc (this_frame
);
280 *prologue_cache
= info
;
282 /* Find the start address of this function (which is a normal frame, even
283 if the next frame is the sentinel frame) and the end of its prologue. */
284 CORE_ADDR this_pc
= get_frame_pc (this_frame
);
285 struct gdbarch
*gdbarch
= get_frame_arch (this_frame
);
286 find_pc_partial_function (this_pc
, NULL
, &start_addr
, NULL
);
288 /* Get the stack pointer if we have one (if there's no process executing
289 yet we won't have a frame. */
290 this_sp
= (NULL
== this_frame
) ? 0 :
291 get_frame_register_unsigned (this_frame
, REG_S
);
293 /* Return early if GDB couldn't find the function. */
296 warning (_("Couldn't find function including address %s SP is %s"),
297 paddress (gdbarch
, this_pc
),
298 paddress (gdbarch
, this_sp
));
300 /* JPB: 28-Apr-11. This is a temporary patch, to get round GDB
301 crashing right at the beginning. Build the frame ID as best we
303 trad_frame_set_id (info
, frame_id_build (this_sp
, this_pc
));
308 /* The default frame base of this frame (for ID purposes only - frame
309 base is an overloaded term) is its stack pointer. For now we use the
310 value of the SP register in this frame. However if the PC is in the
311 prologue of this frame, before the SP has been set up, then the value
312 will actually be that of the prev frame, and we'll need to adjust it
314 trad_frame_set_this_base (info
, this_sp
);
315 this_sp_for_id
= this_sp
;
317 /* We should only examine code that is in the prologue. This is all code
318 up to (but not including) end_addr. We should only populate the cache
319 while the address is up to (but not including) the PC or end_addr,
320 whichever is first. */
321 end_addr
= s12z_skip_prologue (gdbarch
, start_addr
);
323 /* All the following analysis only occurs if we are in the prologue and
324 have executed the code. Check we have a sane prologue size, and if
325 zero we are frameless and can give up here. */
326 if (end_addr
< start_addr
)
327 error (_("end addr %s is less than start addr %s"),
328 paddress (gdbarch
, end_addr
), paddress (gdbarch
, start_addr
));
330 CORE_ADDR addr
= start_addr
; /* Where we have got to? */
332 int saved_frame_size
= 0;
334 struct disassemble_info di
= s12z_disassemble_info (gdbarch
);
337 struct mem_read_abstraction mra
;
338 mra
.base
.read
= (int (*)(mem_read_abstraction_base
*,
339 int, size_t, bfd_byte
*)) abstract_read_memory
;
340 mra
.base
.advance
= advance
;
341 mra
.base
.posn
= posn
;
344 while (this_pc
> addr
)
346 enum optr optr
= OP_INVALID
;
349 struct operand
*operands
[6];
352 decode_s12z (&optr
, &osize
, &n_operands
, operands
,
353 (mem_read_abstraction_base
*) &mra
);
368 /* Conditional Branches. If any of these are encountered, then
369 it is likely that a RTS will terminate it. So we need to save
370 the frame size so it can be restored. */
371 saved_frame_size
= frame_size
;
374 /* Restore the frame size from a previously saved value. */
375 frame_size
= saved_frame_size
;
378 frame_size
+= push_pull_get_stack_adjustment (n_operands
, operands
);
381 frame_size
-= push_pull_get_stack_adjustment (n_operands
, operands
);
384 if (operands
[0]->cl
== OPND_CL_REGISTER
)
386 int reg
= ((struct register_operand
*) (operands
[0]))->reg
;
387 if ((reg
== REG_S
) && (operands
[1]->cl
== OPND_CL_MEMORY
))
389 const struct memory_operand
*mo
390 = (const struct memory_operand
* ) operands
[1];
391 if (mo
->n_regs
== 1 && !mo
->indirect
392 && mo
->regs
[0] == REG_S
393 && mo
->mutation
== OPND_RM_NONE
)
395 /* LEA S, (xxx, S) -- Decrement the stack. This is
396 almost certainly the start of a frame. */
397 int simm
= (signed char) mo
->base_offset
;
407 for (int o
= 0; o
< n_operands
; ++o
)
411 /* If the PC has not actually got to this point, then the frame
412 base will be wrong, and we adjust it. */
415 /* Only do if executing. */
418 this_sp_for_id
= this_sp
- frame_size
;
419 trad_frame_set_this_base (info
, this_sp_for_id
);
421 trad_frame_set_reg_value (info
, REG_S
, this_sp
+ 3);
422 trad_frame_set_reg_addr (info
, REG_P
, this_sp
);
426 gdb_assert (this_sp
== this_sp_for_id
);
427 /* The stack pointer of the prev frame is frame_size greater
428 than the stack pointer of this frame plus one address
429 size (caused by the JSR or BSR). */
430 trad_frame_set_reg_value (info
, REG_S
,
431 this_sp
+ frame_size
+ 3);
432 trad_frame_set_reg_addr (info
, REG_P
, this_sp
+ frame_size
);
436 /* Build the frame ID. */
437 trad_frame_set_id (info
, frame_id_build (this_sp_for_id
, start_addr
));
442 /* Implement the this_id function for the stub unwinder. */
444 s12z_frame_this_id (struct frame_info
*this_frame
,
445 void **prologue_cache
, struct frame_id
*this_id
)
447 struct trad_frame_cache
*info
= s12z_frame_cache (this_frame
,
450 trad_frame_get_id (info
, this_id
);
454 /* Implement the prev_register function for the stub unwinder. */
455 static struct value
*
456 s12z_frame_prev_register (struct frame_info
*this_frame
,
457 void **prologue_cache
, int regnum
)
459 struct trad_frame_cache
*info
= s12z_frame_cache (this_frame
,
462 return trad_frame_get_register (info
, this_frame
, regnum
);
465 /* Data structures for the normal prologue-analysis-based unwinder. */
466 static const struct frame_unwind s12z_frame_unwind
= {
469 default_frame_unwind_stop_reason
,
471 s12z_frame_prev_register
,
473 default_frame_sniffer
,
478 constexpr gdb_byte s12z_break_insn
[] = {0x00};
480 typedef BP_MANIPULATION (s12z_break_insn
) s12z_breakpoint
;
482 struct s12z_gdbarch_tdep
: gdbarch_tdep
486 /* A vector of human readable characters representing the
487 bits in the CCW register. Unused bits are represented as '-'.
488 Lowest significant bit comes first. */
489 static const char ccw_bits
[] =
492 'V', /* Two's Complement Overflow */
497 'X', /* Non-Maskable Interrupt */
498 'S', /* STOP Disable */
499 '0', /* Interrupt priority level */
506 'U' /* User/Supervisor State. */
509 /* Print a human readable representation of the CCW register.
510 For example: "u----000SX-Inzvc" corresponds to the value
513 s12z_print_ccw_info (struct gdbarch
*gdbarch
,
514 struct ui_file
*file
,
515 struct frame_info
*frame
,
518 struct value
*v
= value_of_register (reg
, frame
);
519 const char *name
= gdbarch_register_name (gdbarch
, reg
);
520 uint32_t ccw
= value_as_long (v
);
521 gdb_puts (name
, file
);
522 size_t len
= strlen (name
);
523 const int stop_1
= 15;
524 const int stop_2
= 17;
525 for (int i
= 0; i
< stop_1
- len
; ++i
)
526 gdb_putc (' ', file
);
527 gdb_printf (file
, "0x%04x", ccw
);
528 for (int i
= 0; i
< stop_2
- len
; ++i
)
529 gdb_putc (' ', file
);
530 for (int b
= 15; b
>= 0; --b
)
532 if (ccw
& (0x1u
<< b
))
534 if (ccw_bits
[b
] == 0)
535 gdb_putc ('1', file
);
537 gdb_putc (ccw_bits
[b
], file
);
540 gdb_putc (tolower (ccw_bits
[b
]), file
);
542 gdb_putc ('\n', file
);
546 s12z_print_registers_info (struct gdbarch
*gdbarch
,
547 struct ui_file
*file
,
548 struct frame_info
*frame
,
549 int regnum
, int print_all
)
551 const int numregs
= (gdbarch_num_regs (gdbarch
)
552 + gdbarch_num_pseudo_regs (gdbarch
));
556 for (int reg
= 0; reg
< numregs
; reg
++)
558 if (REG_CCW
== reg_perm
[reg
])
560 s12z_print_ccw_info (gdbarch
, file
, frame
, reg
);
563 default_print_registers_info (gdbarch
, file
, frame
, reg
, print_all
);
566 else if (REG_CCW
== reg_perm
[regnum
])
567 s12z_print_ccw_info (gdbarch
, file
, frame
, regnum
);
569 default_print_registers_info (gdbarch
, file
, frame
, regnum
, print_all
);
576 s12z_extract_return_value (struct type
*type
, struct regcache
*regcache
,
581 switch (TYPE_LENGTH (type
))
583 case 0: /* Nothing to do */
603 error (_("bad size for return value"));
607 regcache
->cooked_read (inv_reg_perm
[reg
], (gdb_byte
*) valbuf
);
610 static enum return_value_convention
611 s12z_return_value (struct gdbarch
*gdbarch
, struct value
*function
,
612 struct type
*type
, struct regcache
*regcache
,
613 gdb_byte
*readbuf
, const gdb_byte
*writebuf
)
615 if (type
->code () == TYPE_CODE_STRUCT
616 || type
->code () == TYPE_CODE_UNION
617 || type
->code () == TYPE_CODE_ARRAY
618 || TYPE_LENGTH (type
) > 4)
619 return RETURN_VALUE_STRUCT_CONVENTION
;
622 s12z_extract_return_value (type
, regcache
, readbuf
);
624 return RETURN_VALUE_REGISTER_CONVENTION
;
629 show_bdccsr_command (const char *args
, int from_tty
)
631 struct string_file output
;
632 target_rcmd ("bdccsr", &output
);
634 gdb_printf ("The current BDCCSR value is %s\n", output
.string().c_str());
637 static struct gdbarch
*
638 s12z_gdbarch_init (struct gdbarch_info info
, struct gdbarch_list
*arches
)
640 s12z_gdbarch_tdep
*tdep
= new s12z_gdbarch_tdep
;
641 struct gdbarch
*gdbarch
= gdbarch_alloc (&info
, tdep
);
643 add_cmd ("bdccsr", class_support
, show_bdccsr_command
,
644 _("Show the current value of the microcontroller's BDCCSR."),
645 &maintenanceinfolist
);
647 /* Target data types. */
648 set_gdbarch_short_bit (gdbarch
, 16);
649 set_gdbarch_int_bit (gdbarch
, 16);
650 set_gdbarch_long_bit (gdbarch
, 32);
651 set_gdbarch_long_long_bit (gdbarch
, 32);
652 set_gdbarch_ptr_bit (gdbarch
, 24);
653 set_gdbarch_addr_bit (gdbarch
, 24);
654 set_gdbarch_char_signed (gdbarch
, 0);
656 set_gdbarch_ps_regnum (gdbarch
, REG_CCW
);
657 set_gdbarch_pc_regnum (gdbarch
, REG_P
);
658 set_gdbarch_sp_regnum (gdbarch
, REG_S
);
661 set_gdbarch_print_registers_info (gdbarch
, s12z_print_registers_info
);
663 set_gdbarch_breakpoint_kind_from_pc (gdbarch
,
664 s12z_breakpoint::kind_from_pc
);
665 set_gdbarch_sw_breakpoint_from_kind (gdbarch
,
666 s12z_breakpoint::bp_from_kind
);
668 set_gdbarch_num_regs (gdbarch
, N_PHYSICAL_REGISTERS
);
669 set_gdbarch_register_name (gdbarch
, s12z_register_name
);
670 set_gdbarch_skip_prologue (gdbarch
, s12z_skip_prologue
);
671 set_gdbarch_inner_than (gdbarch
, core_addr_lessthan
);
672 set_gdbarch_dwarf2_reg_to_regnum (gdbarch
, s12z_dwarf_reg_to_regnum
);
674 set_gdbarch_register_type (gdbarch
, s12z_register_type
);
676 frame_unwind_append_unwinder (gdbarch
, &s12z_frame_unwind
);
677 /* Currently, the only known producer for this architecture, produces buggy
678 dwarf CFI. So don't append a dwarf unwinder until the situation is
679 better understood. */
681 set_gdbarch_return_value (gdbarch
, s12z_return_value
);
686 void _initialize_s12z_tdep ();
688 _initialize_s12z_tdep ()
690 gdbarch_register (bfd_arch_s12z
, s12z_gdbarch_init
, NULL
);