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1 /* Target-dependent code for Hitachi Super-H, for GDB.
2 Copyright (C) 1993, 1994, 1995, 1996 Free Software Foundation, Inc.
3
4 This file is part of GDB.
5
6 This program is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 2 of the License, or
9 (at your option) any later version.
10
11 This program is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
15
16 You should have received a copy of the GNU General Public License
17 along with this program; if not, write to the Free Software
18 Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
19
20 /*
21 Contributed by Steve Chamberlain
22 sac@cygnus.com
23 */
24
25 #include "defs.h"
26 #include "frame.h"
27 #include "obstack.h"
28 #include "symtab.h"
29 #include "symfile.h"
30 #include "gdbtypes.h"
31 #include "gdbcmd.h"
32 #include "gdbcore.h"
33 #include "value.h"
34 #include "dis-asm.h"
35 #include "inferior.h" /* for BEFORE_TEXT_END etc. */
36 #include "gdb_string.h"
37
38 extern int remote_write_size; /* in remote.c */
39
40 /* Default to the original SH. */
41
42 #define DEFAULT_SH_TYPE "sh"
43
44 /* This value is the model of SH in use. */
45
46 char *sh_processor_type;
47
48 char *tmp_sh_processor_type;
49
50 /* A set of original names, to be used when restoring back to generic
51 registers from a specific set. */
52
53 char *sh_generic_reg_names[] = REGISTER_NAMES;
54
55 char *sh_reg_names[] = {
56 "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
57 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15",
58 "pc", "pr", "gbr", "vbr", "mach", "macl", "sr",
59 "", "",
60 "", "", "", "", "", "", "", "",
61 "", "", "", "", "", "", "", "",
62 "", "",
63 "", "", "", "", "", "", "", "",
64 "", "", "", "", "", "", "", "",
65 };
66
67 char *sh3_reg_names[] = {
68 "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
69 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15",
70 "pc", "pr", "gbr", "vbr", "mach", "macl", "sr",
71 "", "",
72 "", "", "", "", "", "", "", "",
73 "", "", "", "", "", "", "", "",
74 "ssr", "spc",
75 "r0b0", "r1b0", "r2b0", "r3b0", "r4b0", "r5b0", "r6b0", "r7b0",
76 "r0b1", "r1b1", "r2b1", "r3b1", "r4b1", "r5b1", "r6b1", "r7b1"
77 };
78
79 char *sh3e_reg_names[] = {
80 "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
81 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15",
82 "pc", "pr", "gbr", "vbr", "mach", "macl", "sr",
83 "fpul", "fpscr",
84 "fr0", "fr1", "fr2", "fr3", "fr4", "fr5", "fr6", "fr7",
85 "fr8", "fr9", "fr10", "fr11", "fr12", "fr13", "fr14", "fr15",
86 "ssr", "spc",
87 "r0b0", "r1b0", "r2b0", "r3b0", "r4b0", "r5b0", "r6b0", "r7b0",
88 "r0b1", "r1b1", "r2b1", "r3b1", "r4b1", "r5b1", "r6b1", "r7b1",
89 };
90
91 struct {
92 char *name;
93 char **regnames;
94 } sh_processor_type_table[] = {
95 { "sh", sh_reg_names },
96 { "sh3", sh3_reg_names },
97 { "sh3e", sh3e_reg_names },
98 { NULL, NULL }
99 };
100
101 /* Prologue looks like
102 [mov.l <regs>,@-r15]...
103 [sts.l pr,@-r15]
104 [mov.l r14,@-r15]
105 [mov r15,r14]
106 */
107
108 #define IS_STS(x) ((x) == 0x4f22)
109 #define IS_PUSH(x) (((x) & 0xff0f) == 0x2f06)
110 #define GET_PUSHED_REG(x) (((x) >> 4) & 0xf)
111 #define IS_MOV_SP_FP(x) ((x) == 0x6ef3)
112 #define IS_ADD_SP(x) (((x) & 0xff00) == 0x7f00)
113 #define IS_MOV_R3(x) (((x) & 0xff00) == 0x1a00)
114 #define IS_SHLL_R3(x) ((x) == 0x4300)
115 #define IS_ADD_R3SP(x) ((x) == 0x3f3c)
116
117 /* Skip any prologue before the guts of a function */
118
119 CORE_ADDR
120 sh_skip_prologue (start_pc)
121 CORE_ADDR start_pc;
122 {
123 int w;
124
125 w = read_memory_integer (start_pc, 2);
126 while (IS_STS (w)
127 || IS_PUSH (w)
128 || IS_MOV_SP_FP (w)
129 || IS_MOV_R3 (w)
130 || IS_ADD_R3SP (w)
131 || IS_ADD_SP (w)
132 || IS_SHLL_R3 (w))
133 {
134 start_pc += 2;
135 w = read_memory_integer (start_pc, 2);
136 }
137
138 return start_pc;
139 }
140
141 /* Disassemble an instruction. */
142
143 int
144 gdb_print_insn_sh (memaddr, info)
145 bfd_vma memaddr;
146 disassemble_info *info;
147 {
148 if (TARGET_BYTE_ORDER == BIG_ENDIAN)
149 return print_insn_sh (memaddr, info);
150 else
151 return print_insn_shl (memaddr, info);
152 }
153
154 /* Given a GDB frame, determine the address of the calling function's frame.
155 This will be used to create a new GDB frame struct, and then
156 INIT_EXTRA_FRAME_INFO and INIT_FRAME_PC will be called for the new frame.
157
158 For us, the frame address is its stack pointer value, so we look up
159 the function prologue to determine the caller's sp value, and return it. */
160
161 CORE_ADDR
162 sh_frame_chain (frame)
163 struct frame_info *frame;
164 {
165 if (PC_IN_CALL_DUMMY (frame->pc, frame->frame, frame->frame))
166 return frame->frame; /* dummy frame same as caller's frame */
167 if (!inside_entry_file (frame->pc))
168 return read_memory_integer (FRAME_FP (frame) + frame->f_offset, 4);
169 else
170 return 0;
171 }
172
173 /* Find REGNUM on the stack. Otherwise, it's in an active register. One thing
174 we might want to do here is to check REGNUM against the clobber mask, and
175 somehow flag it as invalid if it isn't saved on the stack somewhere. This
176 would provide a graceful failure mode when trying to get the value of
177 caller-saves registers for an inner frame. */
178
179 CORE_ADDR
180 sh_find_callers_reg (fi, regnum)
181 struct frame_info *fi;
182 int regnum;
183 {
184 struct frame_saved_regs fsr;
185
186 for (; fi; fi = fi->next)
187 if (PC_IN_CALL_DUMMY (fi->pc, fi->frame, fi->frame))
188 /* When the caller requests PR from the dummy frame, we return PC because
189 that's where the previous routine appears to have done a call from. */
190 return generic_read_register_dummy (fi->pc, fi->frame, regnum);
191 else
192 {
193 FRAME_FIND_SAVED_REGS(fi, fsr);
194 if (fsr.regs[regnum] != 0)
195 return read_memory_integer (fsr.regs[regnum],
196 REGISTER_RAW_SIZE(regnum));
197 }
198 return read_register (regnum);
199 }
200
201 /* Put here the code to store, into a struct frame_saved_regs, the
202 addresses of the saved registers of frame described by FRAME_INFO.
203 This includes special registers such as pc and fp saved in special
204 ways in the stack frame. sp is even more special: the address we
205 return for it IS the sp for the next frame. */
206
207 void
208 sh_frame_find_saved_regs (fi, fsr)
209 struct frame_info *fi;
210 struct frame_saved_regs *fsr;
211 {
212 int where[NUM_REGS];
213 int rn;
214 int have_fp = 0;
215 int depth;
216 int pc;
217 int opc;
218 int insn;
219 int r3_val = 0;
220 char * dummy_regs = generic_find_dummy_frame (fi->pc, fi->frame);
221
222 if (dummy_regs)
223 {
224 /* DANGER! This is ONLY going to work if the char buffer format of
225 the saved registers is byte-for-byte identical to the
226 CORE_ADDR regs[NUM_REGS] format used by struct frame_saved_regs! */
227 memcpy (&fsr->regs, dummy_regs, sizeof(fsr));
228 return;
229 }
230
231 opc = pc = get_pc_function_start (fi->pc);
232
233 insn = read_memory_integer (pc, 2);
234
235 fi->leaf_function = 1;
236 fi->f_offset = 0;
237
238 for (rn = 0; rn < NUM_REGS; rn++)
239 where[rn] = -1;
240
241 depth = 0;
242
243 /* Loop around examining the prologue insns, but give up
244 after 15 of them, since we're getting silly then */
245 while (pc < opc + 15 * 2)
246 {
247 /* See where the registers will be saved to */
248 if (IS_PUSH (insn))
249 {
250 pc += 2;
251 rn = GET_PUSHED_REG (insn);
252 where[rn] = depth;
253 insn = read_memory_integer (pc, 2);
254 depth += 4;
255 }
256 else if (IS_STS (insn))
257 {
258 pc += 2;
259 where[PR_REGNUM] = depth;
260 insn = read_memory_integer (pc, 2);
261 /* If we're storing the pr then this isn't a leaf */
262 fi->leaf_function = 0;
263 depth += 4;
264 }
265 else if (IS_MOV_R3 (insn))
266 {
267 r3_val = ((insn & 0xff) ^ 0x80) - 0x80;
268 pc += 2;
269 insn = read_memory_integer (pc, 2);
270 }
271 else if (IS_SHLL_R3 (insn))
272 {
273 r3_val <<= 1;
274 pc += 2;
275 insn = read_memory_integer (pc, 2);
276 }
277 else if (IS_ADD_R3SP (insn))
278 {
279 depth += -r3_val;
280 pc += 2;
281 insn = read_memory_integer (pc, 2);
282 }
283 else if (IS_ADD_SP (insn))
284 {
285 pc += 2;
286 depth -= ((insn & 0xff) ^ 0x80) - 0x80;
287 insn = read_memory_integer (pc, 2);
288 }
289 else
290 break;
291 }
292
293 /* Now we know how deep things are, we can work out their addresses */
294
295 for (rn = 0; rn < NUM_REGS; rn++)
296 {
297 if (where[rn] >= 0)
298 {
299 if (rn == FP_REGNUM)
300 have_fp = 1;
301
302 fsr->regs[rn] = fi->frame - where[rn] + depth - 4;
303 }
304 else
305 {
306 fsr->regs[rn] = 0;
307 }
308 }
309
310 if (have_fp)
311 {
312 fsr->regs[SP_REGNUM] = read_memory_integer (fsr->regs[FP_REGNUM], 4);
313 }
314 else
315 {
316 fsr->regs[SP_REGNUM] = fi->frame - 4;
317 }
318
319 fi->f_offset = depth - where[FP_REGNUM] - 4;
320 /* Work out the return pc - either from the saved pr or the pr
321 value */
322 }
323
324 /* initialize the extra info saved in a FRAME */
325
326 void
327 sh_init_extra_frame_info (fromleaf, fi)
328 int fromleaf;
329 struct frame_info *fi;
330 {
331 struct frame_saved_regs fsr;
332
333 if (fi->next)
334 fi->pc = FRAME_SAVED_PC (fi->next);
335
336 if (PC_IN_CALL_DUMMY (fi->pc, fi->frame, fi->frame))
337 {
338 /* We need to setup fi->frame here because run_stack_dummy gets it wrong
339 by assuming it's always FP. */
340 fi->frame = generic_read_register_dummy (fi->pc, fi->frame,
341 SP_REGNUM);
342 fi->return_pc = generic_read_register_dummy (fi->pc, fi->frame,
343 PC_REGNUM);
344 fi->f_offset = -(CALL_DUMMY_LENGTH + 4);
345 fi->leaf_function = 0;
346 return;
347 }
348 else
349 {
350 FRAME_FIND_SAVED_REGS (fi, fsr);
351 fi->return_pc = sh_find_callers_reg (fi, PR_REGNUM);
352 }
353 }
354
355 /* Discard from the stack the innermost frame,
356 restoring all saved registers. */
357
358 void
359 sh_pop_frame ()
360 {
361 register struct frame_info *frame = get_current_frame ();
362 register CORE_ADDR fp;
363 register int regnum;
364 struct frame_saved_regs fsr;
365
366 if (PC_IN_CALL_DUMMY (frame->pc, frame->frame, frame->frame))
367 generic_pop_dummy_frame ();
368 else
369 {
370 fp = FRAME_FP (frame);
371 get_frame_saved_regs (frame, &fsr);
372
373 /* Copy regs from where they were saved in the frame */
374 for (regnum = 0; regnum < NUM_REGS; regnum++)
375 if (fsr.regs[regnum])
376 write_register (regnum, read_memory_integer (fsr.regs[regnum], 4));
377
378 write_register (PC_REGNUM, frame->return_pc);
379 write_register (SP_REGNUM, fp + 4);
380 }
381 flush_cached_frames ();
382 }
383
384 /* Function: push_arguments
385 Setup the function arguments for calling a function in the inferior.
386
387 On the Hitachi SH architecture, there are four registers (R4 to R7)
388 which are dedicated for passing function arguments. Up to the first
389 four arguments (depending on size) may go into these registers.
390 The rest go on the stack.
391
392 Arguments that are smaller than 4 bytes will still take up a whole
393 register or a whole 32-bit word on the stack, and will be
394 right-justified in the register or the stack word. This includes
395 chars, shorts, and small aggregate types.
396
397 Arguments that are larger than 4 bytes may be split between two or
398 more registers. If there are not enough registers free, an argument
399 may be passed partly in a register (or registers), and partly on the
400 stack. This includes doubles, long longs, and larger aggregates.
401 As far as I know, there is no upper limit to the size of aggregates
402 that will be passed in this way; in other words, the convention of
403 passing a pointer to a large aggregate instead of a copy is not used.
404
405 An exceptional case exists for struct arguments (and possibly other
406 aggregates such as arrays) if the size is larger than 4 bytes but
407 not a multiple of 4 bytes. In this case the argument is never split
408 between the registers and the stack, but instead is copied in its
409 entirety onto the stack, AND also copied into as many registers as
410 there is room for. In other words, space in registers permitting,
411 two copies of the same argument are passed in. As far as I can tell,
412 only the one on the stack is used, although that may be a function
413 of the level of compiler optimization. I suspect this is a compiler
414 bug. Arguments of these odd sizes are left-justified within the
415 word (as opposed to arguments smaller than 4 bytes, which are
416 right-justified).
417
418
419 If the function is to return an aggregate type such as a struct, it
420 is either returned in the normal return value register R0 (if its
421 size is no greater than one byte), or else the caller must allocate
422 space into which the callee will copy the return value (if the size
423 is greater than one byte). In this case, a pointer to the return
424 value location is passed into the callee in register R2, which does
425 not displace any of the other arguments passed in via registers R4
426 to R7. */
427
428 CORE_ADDR
429 sh_push_arguments (nargs, args, sp, struct_return, struct_addr)
430 int nargs;
431 value_ptr *args;
432 CORE_ADDR sp;
433 unsigned char struct_return;
434 CORE_ADDR struct_addr;
435 {
436 int stack_offset, stack_alloc;
437 int argreg;
438 int argnum;
439 struct type *type;
440 CORE_ADDR regval;
441 char *val;
442 char valbuf[4];
443 int len;
444 int odd_sized_struct;
445
446 /* first force sp to a 4-byte alignment */
447 sp = sp & ~3;
448
449 /* The "struct return pointer" pseudo-argument has its own dedicated
450 register */
451 if (struct_return)
452 write_register (STRUCT_RETURN_REGNUM, struct_addr);
453
454 /* Now make sure there's space on the stack */
455 for (argnum = 0, stack_alloc = 0;
456 argnum < nargs; argnum++)
457 stack_alloc += ((TYPE_LENGTH(VALUE_TYPE(args[argnum])) + 3) & ~3);
458 sp -= stack_alloc; /* make room on stack for args */
459
460
461 /* Now load as many as possible of the first arguments into
462 registers, and push the rest onto the stack. There are 16 bytes
463 in four registers available. Loop thru args from first to last. */
464
465 argreg = ARG0_REGNUM;
466 for (argnum = 0, stack_offset = 0; argnum < nargs; argnum++)
467 {
468 type = VALUE_TYPE (args[argnum]);
469 len = TYPE_LENGTH (type);
470 memset(valbuf, 0, sizeof(valbuf));
471 if (len < 4)
472 { /* value gets right-justified in the register or stack word */
473 memcpy(valbuf + (4 - len),
474 (char *) VALUE_CONTENTS (args[argnum]), len);
475 val = valbuf;
476 }
477 else
478 val = (char *) VALUE_CONTENTS (args[argnum]);
479
480 if (len > 4 && (len & 3) != 0)
481 odd_sized_struct = 1; /* such structs go entirely on stack */
482 else
483 odd_sized_struct = 0;
484 while (len > 0)
485 {
486 if (argreg > ARGLAST_REGNUM || odd_sized_struct)
487 { /* must go on the stack */
488 write_memory (sp + stack_offset, val, 4);
489 stack_offset += 4;
490 }
491 /* NOTE WELL!!!!! This is not an "else if" clause!!!
492 That's because some *&^%$ things get passed on the stack
493 AND in the registers! */
494 if (argreg <= ARGLAST_REGNUM)
495 { /* there's room in a register */
496 regval = extract_address (val, REGISTER_RAW_SIZE(argreg));
497 write_register (argreg++, regval);
498 }
499 /* Store the value 4 bytes at a time. This means that things
500 larger than 4 bytes may go partly in registers and partly
501 on the stack. */
502 len -= REGISTER_RAW_SIZE(argreg);
503 val += REGISTER_RAW_SIZE(argreg);
504 }
505 }
506 return sp;
507 }
508
509 /* Function: push_return_address (pc)
510 Set up the return address for the inferior function call.
511 Needed for targets where we don't actually execute a JSR/BSR instruction */
512
513 CORE_ADDR
514 sh_push_return_address (pc, sp)
515 CORE_ADDR pc;
516 CORE_ADDR sp;
517 {
518 write_register (PR_REGNUM, CALL_DUMMY_ADDRESS ());
519 return sp;
520 }
521
522 /* Function: fix_call_dummy
523 Poke the callee function's address into the destination part of
524 the CALL_DUMMY. The address is actually stored in a data word
525 following the actualy CALL_DUMMY instructions, which will load
526 it into a register using PC-relative addressing. This function
527 expects the CALL_DUMMY to look like this:
528
529 mov.w @(2,PC), R8
530 jsr @R8
531 nop
532 trap
533 <destination>
534 */
535
536 #if 0
537 void
538 sh_fix_call_dummy (dummy, pc, fun, nargs, args, type, gcc_p)
539 char *dummy;
540 CORE_ADDR pc;
541 CORE_ADDR fun;
542 int nargs;
543 value_ptr *args;
544 struct type *type;
545 int gcc_p;
546 {
547 *(unsigned long *) (dummy + 8) = fun;
548 }
549 #endif
550
551 /* Function: get_saved_register
552 Just call the generic_get_saved_register function. */
553
554 void
555 get_saved_register (raw_buffer, optimized, addrp, frame, regnum, lval)
556 char *raw_buffer;
557 int *optimized;
558 CORE_ADDR *addrp;
559 struct frame_info *frame;
560 int regnum;
561 enum lval_type *lval;
562 {
563 generic_get_saved_register (raw_buffer, optimized, addrp,
564 frame, regnum, lval);
565 }
566
567
568 /* Command to set the processor type. */
569
570 void
571 sh_set_processor_type_command (args, from_tty)
572 char *args;
573 int from_tty;
574 {
575 int i;
576 char *temp;
577
578 /* The `set' commands work by setting the value, then calling the hook,
579 so we let the general command modify a scratch location, then decide
580 here if we really want to modify the processor type. */
581 if (tmp_sh_processor_type == NULL || *tmp_sh_processor_type == '\0')
582 {
583 printf_unfiltered ("The known SH processor types are as follows:\n\n");
584 for (i = 0; sh_processor_type_table[i].name != NULL; ++i)
585 printf_unfiltered ("%s\n", sh_processor_type_table[i].name);
586
587 /* Restore the value. */
588 tmp_sh_processor_type = strsave (sh_processor_type);
589
590 return;
591 }
592
593 if (!sh_set_processor_type (tmp_sh_processor_type))
594 {
595 /* Restore to a valid value before erroring out. */
596 temp = tmp_sh_processor_type;
597 tmp_sh_processor_type = strsave (sh_processor_type);
598 error ("Unknown processor type `%s'.", temp);
599 }
600 }
601
602 /* This is a dummy not actually run. */
603
604 static void
605 sh_show_processor_type_command (args, from_tty)
606 char *args;
607 int from_tty;
608 {
609 }
610
611 /* Modify the actual processor type. */
612
613 int
614 sh_set_processor_type (str)
615 char *str;
616 {
617 int i, j;
618
619 if (str == NULL)
620 return 0;
621
622 for (i = 0; sh_processor_type_table[i].name != NULL; ++i)
623 {
624 if (strcasecmp (str, sh_processor_type_table[i].name) == 0)
625 {
626 sh_processor_type = str;
627
628 for (j = 0; j < NUM_REGS; ++j)
629 reg_names[j] = sh_processor_type_table[i].regnames[j];
630
631 return 1;
632 }
633 }
634
635 return 0;
636 }
637
638 /* Print the registers in a form similar to the E7000 */
639
640 static void
641 sh_show_regs (args, from_tty)
642 char *args;
643 int from_tty;
644 {
645 int cpu = 0;
646
647 if (strcmp (sh_processor_type, "sh3") == 0)
648 cpu = 1;
649 else if (strcmp (sh_processor_type, "sh3e") == 0)
650 cpu = 2;
651
652 printf_filtered ("PC=%08x SR=%08x PR=%08x MACH=%08x MACHL=%08x\n",
653 read_register (PC_REGNUM),
654 read_register (SR_REGNUM),
655 read_register (PR_REGNUM),
656 read_register (MACH_REGNUM),
657 read_register (MACL_REGNUM));
658
659 printf_filtered ("GBR=%08x VBR=%08x",
660 read_register (GBR_REGNUM),
661 read_register (VBR_REGNUM));
662 if (cpu == 1 || cpu == 2)
663 {
664 printf_filtered (" SSR=%08x SPC=%08x",
665 read_register (SSR_REGNUM),
666 read_register (SPC_REGNUM));
667 if (cpu ==2)
668 {
669 printf_filtered (" FPUL=%08x FPSCR=%08x",
670 read_register (FPUL_REGNUM),
671 read_register (FPSCR_REGNUM));
672 }
673 }
674
675 printf_filtered ("\nR0-R7 %08x %08x %08x %08x %08x %08x %08x %08x\n",
676 read_register (0),
677 read_register (1),
678 read_register (2),
679 read_register (3),
680 read_register (4),
681 read_register (5),
682 read_register (6),
683 read_register (7));
684 printf_filtered ("R8-R15 %08x %08x %08x %08x %08x %08x %08x %08x\n",
685 read_register (8),
686 read_register (9),
687 read_register (10),
688 read_register (11),
689 read_register (12),
690 read_register (13),
691 read_register (14),
692 read_register (15));
693 if (cpu == 2)
694 {
695 printf_filtered ("FP0-FP7 %08x %08x %08x %08x %08x %08x %08x %08x\n",
696 read_register (FP0_REGNUM + 0),
697 read_register (FP0_REGNUM + 1),
698 read_register (FP0_REGNUM + 2),
699 read_register (FP0_REGNUM + 3),
700 read_register (FP0_REGNUM + 4),
701 read_register (FP0_REGNUM + 5),
702 read_register (FP0_REGNUM + 6),
703 read_register (FP0_REGNUM + 7));
704 printf_filtered ("FP8-FP15 %08x %08x %08x %08x %08x %08x %08x %08x\n",
705 read_register (FP0_REGNUM + 8),
706 read_register (FP0_REGNUM + 9),
707 read_register (FP0_REGNUM + 10),
708 read_register (FP0_REGNUM + 11),
709 read_register (FP0_REGNUM + 12),
710 read_register (FP0_REGNUM + 13),
711 read_register (FP0_REGNUM + 14),
712 read_register (FP0_REGNUM + 15));
713 }
714 }
715
716 /* Function: extract_return_value
717 Find a function's return value in the appropriate registers (in regbuf),
718 and copy it into valbuf. */
719
720 void
721 sh_extract_return_value (type, regbuf, valbuf)
722 struct type *type;
723 void *regbuf;
724 void *valbuf;
725 {
726 int len = TYPE_LENGTH(type);
727
728 if (len <= 4)
729 memcpy (valbuf, ((char *) regbuf) + 4 - len, len);
730 else if (len <= 8)
731 memcpy (valbuf, ((char *) regbuf) + 8 - len, len);
732 else
733 error ("bad size for return value");
734 }
735
736 void
737 _initialize_sh_tdep ()
738 {
739 struct cmd_list_element *c;
740
741 tm_print_insn = gdb_print_insn_sh;
742
743 c = add_set_cmd ("processor", class_support, var_string_noescape,
744 (char *) &tmp_sh_processor_type,
745 "Set the type of SH processor in use.\n\
746 Set this to be able to access processor-type-specific registers.\n\
747 ",
748 &setlist);
749 c->function.cfunc = sh_set_processor_type_command;
750 c = add_show_from_set (c, &showlist);
751 c->function.cfunc = sh_show_processor_type_command;
752
753 tmp_sh_processor_type = strsave (DEFAULT_SH_TYPE);
754 sh_set_processor_type_command (strsave (DEFAULT_SH_TYPE), 0);
755
756 add_com ("regs", class_vars, sh_show_regs, "Print all registers");
757 }