gdb/sh-tdep.c

   1 /* Target-dependent code for Hitachi Super-H, for GDB.
   2    Copyright 1993, 1994, 1995, 1996, 1997, 1998 Free Software Foundation, Inc.
   3
   4 This file is part of GDB.
   5
   6 This program is free software; you can redistribute it and/or modify
   7 it under the terms of the GNU General Public License as published by
   8 the Free Software Foundation; either version 2 of the License, or
   9 (at your option) any later version.
  10
  11 This program is distributed in the hope that it will be useful,
  12 but WITHOUT ANY WARRANTY; without even the implied warranty of
  13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  14 GNU General Public License for more details.
  15
  16 You should have received a copy of the GNU General Public License
  17 along with this program; if not, write to the Free Software
  18 Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.  */
  19
  20 /*
  21  Contributed by Steve Chamberlain
  22                 sac@cygnus.com
  23  */
  24
  25 #include "defs.h"
  26 #include "frame.h"
  27 #include "obstack.h"
  28 #include "symtab.h"
  29 #include "symfile.h"
  30 #include "gdbtypes.h"
  31 #include "gdbcmd.h"
  32 #include "gdbcore.h"
  33 #include "value.h"
  34 #include "dis-asm.h"
  35 #include "inferior.h"           /* for BEFORE_TEXT_END etc. */
  36 #include "gdb_string.h"
  37
  38 /* A set of original names, to be used when restoring back to generic
  39    registers from a specific set.  */
  40
  41 static char *sh_generic_reg_names[] = {
  42   "r0",   "r1",   "r2",   "r3",   "r4",   "r5",   "r6",   "r7",
  43   "r8",   "r9",   "r10",  "r11",  "r12",  "r13",  "r14",  "r15",
  44   "pc",   "pr",   "gbr",  "vbr",  "mach", "macl", "sr",
  45   "fpul", "fpscr",
  46   "fr0",  "fr1",  "fr2",  "fr3",  "fr4",  "fr5",  "fr6",  "fr7",
  47   "fr8",  "fr9",  "fr10", "fr11", "fr12", "fr13", "fr14", "fr15",
  48   "ssr",  "spc",
  49   "r0b0", "r1b0", "r2b0", "r3b0", "r4b0", "r5b0", "r6b0", "r7b0",
  50   "r0b1", "r1b1", "r2b1", "r3b1", "r4b1", "r5b1", "r6b1", "r7b1",
  51 };
  52
  53 static char *sh_reg_names[] = {
  54   "r0",   "r1",   "r2",   "r3",   "r4",   "r5",   "r6",   "r7",
  55   "r8",   "r9",   "r10",  "r11",  "r12",  "r13",  "r14",  "r15",
  56   "pc",   "pr",   "gbr",  "vbr",  "mach", "macl", "sr",
  57   "",     "",
  58   "",     "",     "",     "",     "",     "",     "",     "",
  59   "",     "",     "",     "",     "",     "",     "",     "",
  60   "",     "",
  61   "",     "",     "",     "",     "",     "",     "",     "",
  62   "",     "",     "",     "",     "",     "",     "",     "",
  63 };
  64
  65 static char *sh3_reg_names[] = {
  66   "r0",   "r1",   "r2",   "r3",   "r4",   "r5",   "r6",   "r7",
  67   "r8",   "r9",   "r10",  "r11",  "r12",  "r13",  "r14",  "r15",
  68   "pc",   "pr",   "gbr",  "vbr",  "mach", "macl", "sr",
  69   "",     "",
  70   "",     "",     "",     "",     "",     "",     "",     "",
  71   "",     "",     "",     "",     "",     "",     "",     "",
  72   "ssr",  "spc",
  73   "r0b0", "r1b0", "r2b0", "r3b0", "r4b0", "r5b0", "r6b0", "r7b0",
  74   "r0b1", "r1b1", "r2b1", "r3b1", "r4b1", "r5b1", "r6b1", "r7b1"
  75 };
  76
  77 static char *sh3e_reg_names[] = {
  78   "r0",   "r1",   "r2",   "r3",   "r4",   "r5",   "r6",   "r7",
  79   "r8",   "r9",   "r10",  "r11",  "r12",  "r13",  "r14",  "r15",
  80   "pc",   "pr",   "gbr",  "vbr",  "mach", "macl", "sr",
  81   "fpul", "fpscr",
  82   "fr0",  "fr1",  "fr2",  "fr3",  "fr4",  "fr5",  "fr6",  "fr7",
  83   "fr8",  "fr9",  "fr10", "fr11", "fr12", "fr13", "fr14", "fr15",
  84   "ssr",  "spc",
  85   "r0b0", "r1b0", "r2b0", "r3b0", "r4b0", "r5b0", "r6b0", "r7b0",
  86   "r0b1", "r1b1", "r2b1", "r3b1", "r4b1", "r5b1", "r6b1", "r7b1",
  87 };
  88
  89 char **sh_register_names = sh_generic_reg_names;
  90
  91
  92 struct {
  93   char **regnames;
  94   int mach;
  95 } sh_processor_type_table[] = {
  96   { sh_reg_names, bfd_mach_sh },
  97   { sh3_reg_names, bfd_mach_sh3 },
  98   { sh3e_reg_names, bfd_mach_sh3e },
  99   { sh3e_reg_names, bfd_mach_sh4 },
 100   { NULL, 0 }
 101 };
 102
 103 /* Prologue looks like
 104    [mov.l       <regs>,@-r15]...
 105    [sts.l       pr,@-r15]
 106    [mov.l       r14,@-r15]
 107    [mov         r15,r14]
 108 */
 109
 110 #define IS_STS(x)               ((x) == 0x4f22)
 111 #define IS_PUSH(x)              (((x) & 0xff0f) == 0x2f06)
 112 #define GET_PUSHED_REG(x)       (((x) >> 4) & 0xf)
 113 #define IS_MOV_SP_FP(x)         ((x) == 0x6ef3)
 114 #define IS_ADD_SP(x)            (((x) & 0xff00) == 0x7f00)
 115 #define IS_MOV_R3(x)            (((x) & 0xff00) == 0x1a00)
 116 #define IS_SHLL_R3(x)           ((x) == 0x4300)
 117 #define IS_ADD_R3SP(x)          ((x) == 0x3f3c)
 118 #define IS_FMOV(x)              (((x) & 0xf00f) == 0xf00b)
 119 #define FPSCR_SZ                (1 << 20)
 120
 121
 122 /* Should call_function allocate stack space for a struct return?  */
 123 int
 124 sh_use_struct_convention (gcc_p, type)
 125      int gcc_p;
 126      struct type *type;
 127 {
 128   return (TYPE_LENGTH (type) > 1);
 129 }
 130
 131
 132 /* Skip any prologue before the guts of a function */
 133
 134 CORE_ADDR
 135 sh_skip_prologue (start_pc)
 136      CORE_ADDR start_pc;
 137 {
 138   int w;
 139
 140   w = read_memory_integer (start_pc, 2);
 141   while (IS_STS (w)
 142          || IS_FMOV (w)
 143          || IS_PUSH (w)
 144          || IS_MOV_SP_FP (w)
 145          || IS_MOV_R3 (w)
 146          || IS_ADD_R3SP (w)
 147          || IS_ADD_SP (w)
 148          || IS_SHLL_R3 (w))
 149     {
 150       start_pc += 2;
 151       w = read_memory_integer (start_pc, 2);
 152     }
 153
 154   return start_pc;
 155 }
 156
 157 /* Disassemble an instruction.  */
 158
 159 int
 160 gdb_print_insn_sh (memaddr, info)
 161      bfd_vma memaddr;
 162      disassemble_info *info;
 163 {
 164   if (TARGET_BYTE_ORDER == BIG_ENDIAN)
 165     return print_insn_sh (memaddr, info);
 166   else
 167     return print_insn_shl (memaddr, info);
 168 }
 169
 170 /* Given a GDB frame, determine the address of the calling function's frame.
 171    This will be used to create a new GDB frame struct, and then
 172    INIT_EXTRA_FRAME_INFO and INIT_FRAME_PC will be called for the new frame.
 173
 174    For us, the frame address is its stack pointer value, so we look up
 175    the function prologue to determine the caller's sp value, and return it.  */
 176
 177 CORE_ADDR
 178 sh_frame_chain (frame)
 179      struct frame_info *frame;
 180 {
 181   if (PC_IN_CALL_DUMMY (frame->pc, frame->frame, frame->frame))
 182     return frame->frame;        /* dummy frame same as caller's frame */
 183   if (!inside_entry_file (frame->pc))
 184     return read_memory_integer (FRAME_FP (frame) + frame->f_offset, 4);
 185   else
 186     return 0;
 187 }
 188
 189 /* Find REGNUM on the stack.  Otherwise, it's in an active register.  One thing
 190    we might want to do here is to check REGNUM against the clobber mask, and
 191    somehow flag it as invalid if it isn't saved on the stack somewhere.  This
 192    would provide a graceful failure mode when trying to get the value of
 193    caller-saves registers for an inner frame.  */
 194
 195 CORE_ADDR
 196 sh_find_callers_reg (fi, regnum)
 197      struct frame_info *fi;
 198      int regnum;
 199 {
 200   struct frame_saved_regs fsr;
 201
 202   for (; fi; fi = fi->next)
 203     if (PC_IN_CALL_DUMMY (fi->pc, fi->frame, fi->frame))
 204       /* When the caller requests PR from the dummy frame, we return PC because
 205          that's where the previous routine appears to have done a call from. */
 206       return generic_read_register_dummy (fi->pc, fi->frame, regnum);
 207     else
 208       {
 209         FRAME_FIND_SAVED_REGS(fi, fsr);
 210         if (fsr.regs[regnum] != 0)
 211           return read_memory_integer (fsr.regs[regnum],
 212                                       REGISTER_RAW_SIZE(regnum));
 213       }
 214   return read_register (regnum);
 215 }
 216
 217 /* Put here the code to store, into a struct frame_saved_regs, the
 218    addresses of the saved registers of frame described by FRAME_INFO.
 219    This includes special registers such as pc and fp saved in special
 220    ways in the stack frame.  sp is even more special: the address we
 221    return for it IS the sp for the next frame. */
 222
 223 void
 224 sh_frame_find_saved_regs (fi, fsr)
 225      struct frame_info *fi;
 226      struct frame_saved_regs *fsr;
 227 {
 228   int where[NUM_REGS];
 229   int rn;
 230   int have_fp = 0;
 231   int depth;
 232   int pc;
 233   int opc;
 234   int insn;
 235   int r3_val = 0;
 236   char * dummy_regs = generic_find_dummy_frame (fi->pc, fi->frame);
 237
 238   if (dummy_regs)
 239     {
 240       /* DANGER!  This is ONLY going to work if the char buffer format of
 241          the saved registers is byte-for-byte identical to the
 242          CORE_ADDR regs[NUM_REGS] format used by struct frame_saved_regs! */
 243       memcpy (&fsr->regs, dummy_regs, sizeof(fsr));
 244       return;
 245     }
 246
 247   opc = pc = get_pc_function_start (fi->pc);
 248
 249   insn = read_memory_integer (pc, 2);
 250
 251   fi->leaf_function = 1;
 252   fi->f_offset = 0;
 253
 254   for (rn = 0; rn < NUM_REGS; rn++)
 255     where[rn] = -1;
 256
 257   depth = 0;
 258
 259   /* Loop around examining the prologue insns until we find something
 260      that does not appear to be part of the prologue.  But give up
 261      after 20 of them, since we're getting silly then. */
 262
 263   while (pc < opc + 20 * 2)
 264     {
 265       /* See where the registers will be saved to */
 266       if (IS_PUSH (insn))
 267         {
 268           pc += 2;
 269           rn = GET_PUSHED_REG (insn);
 270           where[rn] = depth;
 271           insn = read_memory_integer (pc, 2);
 272           depth += 4;
 273         }
 274       else if (IS_STS (insn))
 275         {
 276           pc += 2;
 277           where[PR_REGNUM] = depth;
 278           insn = read_memory_integer (pc, 2);
 279           /* If we're storing the pr then this isn't a leaf */
 280           fi->leaf_function = 0;
 281           depth += 4;
 282         }
 283       else if (IS_MOV_R3 (insn))
 284         {
 285           r3_val = ((insn & 0xff) ^ 0x80) - 0x80;
 286           pc += 2;
 287           insn = read_memory_integer (pc, 2);
 288         }
 289       else if (IS_SHLL_R3 (insn))
 290         {
 291           r3_val <<= 1;
 292           pc += 2;
 293           insn = read_memory_integer (pc, 2);
 294         }
 295       else if (IS_ADD_R3SP (insn))
 296         {
 297           depth += -r3_val;
 298           pc += 2;
 299           insn = read_memory_integer (pc, 2);
 300         }
 301       else if (IS_ADD_SP (insn))
 302         {
 303           pc += 2;
 304           depth -= ((insn & 0xff) ^ 0x80) - 0x80;
 305           insn = read_memory_integer (pc, 2);
 306         }
 307       else if (IS_FMOV (insn))
 308         {
 309           pc += 2;
 310           insn = read_memory_integer (pc, 2);
 311           if (read_register (FPSCR_REGNUM) & FPSCR_SZ)
 312             {
 313               depth += 8;
 314             }
 315           else
 316             {
 317               depth += 4;
 318             }
 319         }
 320       else
 321         break;
 322     }
 323
 324   /* Now we know how deep things are, we can work out their addresses */
 325
 326   for (rn = 0; rn < NUM_REGS; rn++)
 327     {
 328       if (where[rn] >= 0)
 329         {
 330           if (rn == FP_REGNUM)
 331             have_fp = 1;
 332
 333           fsr->regs[rn] = fi->frame - where[rn] + depth - 4;
 334         }
 335       else
 336         {
 337           fsr->regs[rn] = 0;
 338         }
 339     }
 340
 341   if (have_fp)
 342     {
 343       fsr->regs[SP_REGNUM] = read_memory_integer (fsr->regs[FP_REGNUM], 4);
 344     }
 345   else
 346     {
 347       fsr->regs[SP_REGNUM] = fi->frame - 4;
 348     }
 349
 350   fi->f_offset = depth - where[FP_REGNUM] - 4;
 351   /* Work out the return pc - either from the saved pr or the pr
 352      value */
 353 }
 354
 355 /* initialize the extra info saved in a FRAME */
 356
 357 void
 358 sh_init_extra_frame_info (fromleaf, fi)
 359      int fromleaf;
 360      struct frame_info *fi;
 361 {
 362   struct frame_saved_regs fsr;
 363
 364   if (fi->next)
 365     fi->pc = FRAME_SAVED_PC (fi->next);
 366
 367   if (PC_IN_CALL_DUMMY (fi->pc, fi->frame, fi->frame))
 368     {
 369       /* We need to setup fi->frame here because run_stack_dummy gets it wrong
 370          by assuming it's always FP.  */
 371       fi->frame     = generic_read_register_dummy (fi->pc, fi->frame,
 372                                                    SP_REGNUM);
 373       fi->return_pc = generic_read_register_dummy (fi->pc, fi->frame,
 374                                                    PC_REGNUM);
 375       fi->f_offset = -(CALL_DUMMY_LENGTH + 4);
 376       fi->leaf_function = 0;
 377       return;
 378     }
 379   else
 380     {
 381       FRAME_FIND_SAVED_REGS (fi, fsr);
 382       fi->return_pc = sh_find_callers_reg (fi, PR_REGNUM);
 383     }
 384 }
 385
 386 /* Discard from the stack the innermost frame,
 387    restoring all saved registers.  */
 388
 389 void
 390 sh_pop_frame ()
 391 {
 392   register struct frame_info *frame = get_current_frame ();
 393   register CORE_ADDR fp;
 394   register int regnum;
 395   struct frame_saved_regs fsr;
 396
 397   if (PC_IN_CALL_DUMMY (frame->pc, frame->frame, frame->frame))
 398     generic_pop_dummy_frame ();
 399   else
 400   {
 401     fp = FRAME_FP (frame);
 402     get_frame_saved_regs (frame, &fsr);
 403
 404     /* Copy regs from where they were saved in the frame */
 405     for (regnum = 0; regnum < NUM_REGS; regnum++)
 406       if (fsr.regs[regnum])
 407         write_register (regnum, read_memory_integer (fsr.regs[regnum], 4));
 408
 409     write_register (PC_REGNUM, frame->return_pc);
 410     write_register (SP_REGNUM, fp + 4);
 411   }
 412   flush_cached_frames ();
 413 }
 414
 415 /* Function: push_arguments
 416    Setup the function arguments for calling a function in the inferior.
 417
 418    On the Hitachi SH architecture, there are four registers (R4 to R7)
 419    which are dedicated for passing function arguments.  Up to the first
 420    four arguments (depending on size) may go into these registers.
 421    The rest go on the stack.
 422
 423    Arguments that are smaller than 4 bytes will still take up a whole
 424    register or a whole 32-bit word on the stack, and will be
 425    right-justified in the register or the stack word.  This includes
 426    chars, shorts, and small aggregate types.
 427
 428    Arguments that are larger than 4 bytes may be split between two or
 429    more registers.  If there are not enough registers free, an argument
 430    may be passed partly in a register (or registers), and partly on the
 431    stack.  This includes doubles, long longs, and larger aggregates.
 432    As far as I know, there is no upper limit to the size of aggregates
 433    that will be passed in this way; in other words, the convention of
 434    passing a pointer to a large aggregate instead of a copy is not used.
 435
 436    An exceptional case exists for struct arguments (and possibly other
 437    aggregates such as arrays) if the size is larger than 4 bytes but
 438    not a multiple of 4 bytes.  In this case the argument is never split
 439    between the registers and the stack, but instead is copied in its
 440    entirety onto the stack, AND also copied into as many registers as
 441    there is room for.  In other words, space in registers permitting,
 442    two copies of the same argument are passed in.  As far as I can tell,
 443    only the one on the stack is used, although that may be a function
 444    of the level of compiler optimization.  I suspect this is a compiler
 445    bug.  Arguments of these odd sizes are left-justified within the
 446    word (as opposed to arguments smaller than 4 bytes, which are
 447    right-justified).
 448
 449
 450    If the function is to return an aggregate type such as a struct, it
 451    is either returned in the normal return value register R0 (if its
 452    size is no greater than one byte), or else the caller must allocate
 453    space into which the callee will copy the return value (if the size
 454    is greater than one byte).  In this case, a pointer to the return
 455    value location is passed into the callee in register R2, which does
 456    not displace any of the other arguments passed in via registers R4
 457    to R7.   */
 458
 459 CORE_ADDR
 460 sh_push_arguments (nargs, args, sp, struct_return, struct_addr)
 461      int nargs;
 462      value_ptr *args;
 463      CORE_ADDR sp;
 464      unsigned char struct_return;
 465      CORE_ADDR struct_addr;
 466 {
 467   int stack_offset, stack_alloc;
 468   int argreg;
 469   int argnum;
 470   struct type *type;
 471   CORE_ADDR regval;
 472   char *val;
 473   char valbuf[4];
 474   int len;
 475   int odd_sized_struct;
 476
 477   /* first force sp to a 4-byte alignment */
 478   sp = sp & ~3;
 479
 480   /* The "struct return pointer" pseudo-argument has its own dedicated
 481      register */
 482   if (struct_return)
 483       write_register (STRUCT_RETURN_REGNUM, struct_addr);
 484
 485   /* Now make sure there's space on the stack */
 486   for (argnum = 0, stack_alloc = 0;
 487        argnum < nargs; argnum++)
 488     stack_alloc += ((TYPE_LENGTH(VALUE_TYPE(args[argnum])) + 3) & ~3);
 489   sp -= stack_alloc;    /* make room on stack for args */
 490
 491
 492   /* Now load as many as possible of the first arguments into
 493      registers, and push the rest onto the stack.  There are 16 bytes
 494      in four registers available.  Loop thru args from first to last.  */
 495
 496   argreg = ARG0_REGNUM;
 497   for (argnum = 0, stack_offset = 0; argnum < nargs; argnum++)
 498     {
 499       type = VALUE_TYPE (args[argnum]);
 500       len  = TYPE_LENGTH (type);
 501       memset(valbuf, 0, sizeof(valbuf));
 502       if (len < 4)
 503         { /* value gets right-justified in the register or stack word */
 504           memcpy(valbuf + (4 - len),
 505                  (char *) VALUE_CONTENTS (args[argnum]), len);
 506           val = valbuf;
 507         }
 508       else
 509         val = (char *) VALUE_CONTENTS (args[argnum]);
 510
 511       if (len > 4 && (len & 3) != 0)
 512         odd_sized_struct = 1;           /* such structs go entirely on stack */
 513       else
 514         odd_sized_struct = 0;
 515       while (len > 0)
 516         {
 517           if (argreg > ARGLAST_REGNUM || odd_sized_struct)
 518             {                           /* must go on the stack */
 519               write_memory (sp + stack_offset, val, 4);
 520               stack_offset += 4;
 521             }
 522           /* NOTE WELL!!!!!  This is not an "else if" clause!!!
 523              That's because some *&^%$ things get passed on the stack
 524              AND in the registers!   */
 525           if (argreg <= ARGLAST_REGNUM)
 526             {                           /* there's room in a register */
 527               regval = extract_address (val, REGISTER_RAW_SIZE(argreg));
 528               write_register (argreg++, regval);
 529             }
 530           /* Store the value 4 bytes at a time.  This means that things
 531              larger than 4 bytes may go partly in registers and partly
 532              on the stack.  */
 533           len -= REGISTER_RAW_SIZE(argreg);
 534           val += REGISTER_RAW_SIZE(argreg);
 535         }
 536     }
 537   return sp;
 538 }
 539
 540 /* Function: push_return_address (pc)
 541    Set up the return address for the inferior function call.
 542    Needed for targets where we don't actually execute a JSR/BSR instruction */
 543
 544 CORE_ADDR
 545 sh_push_return_address (pc, sp)
 546      CORE_ADDR pc;
 547      CORE_ADDR sp;
 548 {
 549   write_register (PR_REGNUM, CALL_DUMMY_ADDRESS ());
 550   return sp;
 551 }
 552
 553 /* Function: fix_call_dummy
 554    Poke the callee function's address into the destination part of
 555    the CALL_DUMMY.  The address is actually stored in a data word
 556    following the actualy CALL_DUMMY instructions, which will load
 557    it into a register using PC-relative addressing.  This function
 558    expects the CALL_DUMMY to look like this:
 559
 560         mov.w @(2,PC), R8
 561         jsr   @R8
 562         nop
 563         trap
 564         <destination>
 565   */
 566
 567 #if 0
 568 void
 569 sh_fix_call_dummy (dummy, pc, fun, nargs, args, type, gcc_p)
 570      char *dummy;
 571      CORE_ADDR pc;
 572      CORE_ADDR fun;
 573      int nargs;
 574      value_ptr *args;
 575      struct type *type;
 576      int gcc_p;
 577 {
 578   *(unsigned long *) (dummy + 8) = fun;
 579 }
 580 #endif
 581
 582 /* Function: get_saved_register
 583    Just call the generic_get_saved_register function.  */
 584
 585 void
 586 get_saved_register (raw_buffer, optimized, addrp, frame, regnum, lval)
 587      char *raw_buffer;
 588      int *optimized;
 589      CORE_ADDR *addrp;
 590      struct frame_info *frame;
 591      int regnum;
 592      enum lval_type *lval;
 593 {
 594   generic_get_saved_register (raw_buffer, optimized, addrp,
 595                               frame, regnum, lval);
 596 }
 597
 598
 599 /* Modify the actual processor type. */
 600
 601 int
 602 sh_target_architecture_hook (ap)
 603      const bfd_arch_info_type *ap;
 604 {
 605   int i, j;
 606
 607   if (ap->arch != bfd_arch_sh)
 608     return 0;
 609
 610   for (i = 0; sh_processor_type_table[i].regnames != NULL; i++)
 611     {
 612       if (sh_processor_type_table[i].mach == ap->mach)
 613         {
 614           sh_register_names = sh_processor_type_table[i].regnames;
 615         }
 616     }
 617
 618   fatal ("Architecture `%s' unreconized", ap->printable_name);
 619 }
 620
 621 /* Print the registers in a form similar to the E7000 */
 622
 623 static void
 624 sh_show_regs (args, from_tty)
 625      char *args;
 626      int from_tty;
 627 {
 628   int cpu;
 629   if (TARGET_ARCHITECTURE->arch == bfd_arch_sh)
 630     cpu = TARGET_ARCHITECTURE->mach;
 631   else
 632     cpu = 0;
 633   /* FIXME: sh4 has more registers */
 634   if (cpu == bfd_mach_sh4)
 635     cpu = bfd_mach_sh3;
 636
 637   printf_filtered ("PC=%08x SR=%08x PR=%08x MACH=%08x MACHL=%08x\n",
 638                    read_register (PC_REGNUM),
 639                    read_register (SR_REGNUM),
 640                    read_register (PR_REGNUM),
 641                    read_register (MACH_REGNUM),
 642                    read_register (MACL_REGNUM));
 643
 644   printf_filtered ("GBR=%08x VBR=%08x",
 645                    read_register (GBR_REGNUM),
 646                    read_register (VBR_REGNUM));
 647   if (cpu == bfd_mach_sh3 || cpu == bfd_mach_sh3e)
 648     {
 649       printf_filtered (" SSR=%08x SPC=%08x",
 650                        read_register (SSR_REGNUM),
 651                        read_register (SPC_REGNUM));
 652       if (cpu == bfd_mach_sh3e)
 653         {
 654           printf_filtered (" FPUL=%08x FPSCR=%08x",
 655                            read_register (FPUL_REGNUM),
 656                            read_register (FPSCR_REGNUM));
 657         }
 658     }
 659
 660   printf_filtered ("\nR0-R7  %08x %08x %08x %08x %08x %08x %08x %08x\n",
 661                    read_register (0),
 662                    read_register (1),
 663                    read_register (2),
 664                    read_register (3),
 665                    read_register (4),
 666                    read_register (5),
 667                    read_register (6),
 668                    read_register (7));
 669   printf_filtered ("R8-R15 %08x %08x %08x %08x %08x %08x %08x %08x\n",
 670                    read_register (8),
 671                    read_register (9),
 672                    read_register (10),
 673                    read_register (11),
 674                    read_register (12),
 675                    read_register (13),
 676                    read_register (14),
 677                    read_register (15));
 678   if (cpu == bfd_mach_sh3e)
 679     {
 680       printf_filtered ("FP0-FP7  %08x %08x %08x %08x %08x %08x %08x %08x\n",
 681                        read_register (FP0_REGNUM + 0),
 682                        read_register (FP0_REGNUM + 1),
 683                        read_register (FP0_REGNUM + 2),
 684                        read_register (FP0_REGNUM + 3),
 685                        read_register (FP0_REGNUM + 4),
 686                        read_register (FP0_REGNUM + 5),
 687                        read_register (FP0_REGNUM + 6),
 688                        read_register (FP0_REGNUM + 7));
 689       printf_filtered ("FP8-FP15 %08x %08x %08x %08x %08x %08x %08x %08x\n",
 690                        read_register (FP0_REGNUM + 8),
 691                        read_register (FP0_REGNUM + 9),
 692                        read_register (FP0_REGNUM + 10),
 693                        read_register (FP0_REGNUM + 11),
 694                        read_register (FP0_REGNUM + 12),
 695                        read_register (FP0_REGNUM + 13),
 696                        read_register (FP0_REGNUM + 14),
 697                        read_register (FP0_REGNUM + 15));
 698     }
 699 }
 700
 701 /* Function: extract_return_value
 702    Find a function's return value in the appropriate registers (in regbuf),
 703    and copy it into valbuf.  */
 704
 705 void
 706 sh_extract_return_value (type, regbuf, valbuf)
 707      struct type *type;
 708      void *regbuf;
 709      void *valbuf;
 710 {
 711   int len = TYPE_LENGTH(type);
 712
 713   if (len <= 4)
 714     memcpy (valbuf, ((char *) regbuf) + 4 - len, len);
 715   else if (len <= 8)
 716     memcpy (valbuf, ((char *) regbuf) + 8 - len, len);
 717   else
 718     error ("bad size for return value");
 719 }
 720
 721 void
 722 _initialize_sh_tdep ()
 723 {
 724   struct cmd_list_element *c;
 725
 726   tm_print_insn = gdb_print_insn_sh;
 727
 728   target_architecture_hook = sh_target_architecture_hook;
 729
 730   add_com ("regs", class_vars, sh_show_regs, "Print all registers");
 731 }