hw/arm/spitz.c

   1 /*
   2  * PXA270-based Clamshell PDA platforms.
   3  *
   4  * Copyright (c) 2006 Openedhand Ltd.
   5  * Written by Andrzej Zaborowski <balrog@zabor.org>
   6  *
   7  * This code is licensed under the GNU GPL v2.
   8  *
   9  * Contributions after 2012-01-13 are licensed under the terms of the
  10  * GNU GPL, version 2 or (at your option) any later version.
  11  */
  12
  13 #include "qemu/osdep.h"
  14 #include "qapi/error.h"
  15 #include "hw/arm/pxa.h"
  16 #include "hw/arm/boot.h"
  17 #include "sysemu/runstate.h"
  18 #include "sysemu/sysemu.h"
  19 #include "hw/pcmcia.h"
  20 #include "hw/qdev-properties.h"
  21 #include "hw/i2c/i2c.h"
  22 #include "hw/irq.h"
  23 #include "hw/ssi/ssi.h"
  24 #include "hw/block/flash.h"
  25 #include "qemu/timer.h"
  26 #include "qemu/log.h"
  27 #include "hw/arm/sharpsl.h"
  28 #include "ui/console.h"
  29 #include "hw/audio/wm8750.h"
  30 #include "audio/audio.h"
  31 #include "hw/boards.h"
  32 #include "hw/sysbus.h"
  33 #include "hw/misc/max111x.h"
  34 #include "migration/vmstate.h"
  35 #include "exec/address-spaces.h"
  36 #include "cpu.h"
  37 #include "qom/object.h"
  38
  39 enum spitz_model_e { spitz, akita, borzoi, terrier };
  40
  41 struct SpitzMachineClass {
  42     MachineClass parent;
  43     enum spitz_model_e model;
  44     int arm_id;
  45 };
  46 typedef struct SpitzMachineClass SpitzMachineClass;
  47
  48 struct SpitzMachineState {
  49     MachineState parent;
  50     PXA2xxState *mpu;
  51     DeviceState *mux;
  52     DeviceState *lcdtg;
  53     DeviceState *ads7846;
  54     DeviceState *max1111;
  55     DeviceState *scp0;
  56     DeviceState *scp1;
  57     DeviceState *misc_gpio;
  58 };
  59 typedef struct SpitzMachineState SpitzMachineState;
  60
  61 #define TYPE_SPITZ_MACHINE "spitz-common"
  62 #define SPITZ_MACHINE(obj) \
  63     OBJECT_CHECK(SpitzMachineState, obj, TYPE_SPITZ_MACHINE)
  64 #define SPITZ_MACHINE_GET_CLASS(obj) \
  65     OBJECT_GET_CLASS(SpitzMachineClass, obj, TYPE_SPITZ_MACHINE)
  66 #define SPITZ_MACHINE_CLASS(klass) \
  67     OBJECT_CLASS_CHECK(SpitzMachineClass, klass, TYPE_SPITZ_MACHINE)
  68
  69 #define zaurus_printf(format, ...)                              \
  70     fprintf(stderr, "%s: " format, __func__, ##__VA_ARGS__)
  71
  72 /* Spitz Flash */
  73 #define FLASH_BASE              0x0c000000
  74 #define FLASH_ECCLPLB           0x00    /* Line parity 7 - 0 bit */
  75 #define FLASH_ECCLPUB           0x04    /* Line parity 15 - 8 bit */
  76 #define FLASH_ECCCP             0x08    /* Column parity 5 - 0 bit */
  77 #define FLASH_ECCCNTR           0x0c    /* ECC byte counter */
  78 #define FLASH_ECCCLRR           0x10    /* Clear ECC */
  79 #define FLASH_FLASHIO           0x14    /* Flash I/O */
  80 #define FLASH_FLASHCTL          0x18    /* Flash Control */
  81
  82 #define FLASHCTL_CE0            (1 << 0)
  83 #define FLASHCTL_CLE            (1 << 1)
  84 #define FLASHCTL_ALE            (1 << 2)
  85 #define FLASHCTL_WP             (1 << 3)
  86 #define FLASHCTL_CE1            (1 << 4)
  87 #define FLASHCTL_RYBY           (1 << 5)
  88 #define FLASHCTL_NCE            (FLASHCTL_CE0 | FLASHCTL_CE1)
  89
  90 #define TYPE_SL_NAND "sl-nand"
  91 typedef struct SLNANDState SLNANDState;
  92 #define SL_NAND(obj) OBJECT_CHECK(SLNANDState, (obj), TYPE_SL_NAND)
  93
  94 struct SLNANDState {
  95     SysBusDevice parent_obj;
  96
  97     MemoryRegion iomem;
  98     DeviceState *nand;
  99     uint8_t ctl;
 100     uint8_t manf_id;
 101     uint8_t chip_id;
 102     ECCState ecc;
 103 };
 104
 105 static uint64_t sl_read(void *opaque, hwaddr addr, unsigned size)
 106 {
 107     SLNANDState *s = (SLNANDState *) opaque;
 108     int ryby;
 109
 110     switch (addr) {
 111 #define BSHR(byte, from, to)    ((s->ecc.lp[byte] >> (from - to)) & (1 << to))
 112     case FLASH_ECCLPLB:
 113         return BSHR(0, 4, 0) | BSHR(0, 5, 2) | BSHR(0, 6, 4) | BSHR(0, 7, 6) |
 114                 BSHR(1, 4, 1) | BSHR(1, 5, 3) | BSHR(1, 6, 5) | BSHR(1, 7, 7);
 115
 116 #define BSHL(byte, from, to)    ((s->ecc.lp[byte] << (to - from)) & (1 << to))
 117     case FLASH_ECCLPUB:
 118         return BSHL(0, 0, 0) | BSHL(0, 1, 2) | BSHL(0, 2, 4) | BSHL(0, 3, 6) |
 119                 BSHL(1, 0, 1) | BSHL(1, 1, 3) | BSHL(1, 2, 5) | BSHL(1, 3, 7);
 120
 121     case FLASH_ECCCP:
 122         return s->ecc.cp;
 123
 124     case FLASH_ECCCNTR:
 125         return s->ecc.count & 0xff;
 126
 127     case FLASH_FLASHCTL:
 128         nand_getpins(s->nand, &ryby);
 129         if (ryby)
 130             return s->ctl | FLASHCTL_RYBY;
 131         else
 132             return s->ctl;
 133
 134     case FLASH_FLASHIO:
 135         if (size == 4) {
 136             return ecc_digest(&s->ecc, nand_getio(s->nand)) |
 137                 (ecc_digest(&s->ecc, nand_getio(s->nand)) << 16);
 138         }
 139         return ecc_digest(&s->ecc, nand_getio(s->nand));
 140
 141     default:
 142         qemu_log_mask(LOG_GUEST_ERROR,
 143                       "sl_read: bad register offset 0x%02" HWADDR_PRIx "\n",
 144                       addr);
 145     }
 146     return 0;
 147 }
 148
 149 static void sl_write(void *opaque, hwaddr addr,
 150                      uint64_t value, unsigned size)
 151 {
 152     SLNANDState *s = (SLNANDState *) opaque;
 153
 154     switch (addr) {
 155     case FLASH_ECCCLRR:
 156         /* Value is ignored.  */
 157         ecc_reset(&s->ecc);
 158         break;
 159
 160     case FLASH_FLASHCTL:
 161         s->ctl = value & 0xff & ~FLASHCTL_RYBY;
 162         nand_setpins(s->nand,
 163                         s->ctl & FLASHCTL_CLE,
 164                         s->ctl & FLASHCTL_ALE,
 165                         s->ctl & FLASHCTL_NCE,
 166                         s->ctl & FLASHCTL_WP,
 167                         0);
 168         break;
 169
 170     case FLASH_FLASHIO:
 171         nand_setio(s->nand, ecc_digest(&s->ecc, value & 0xff));
 172         break;
 173
 174     default:
 175         qemu_log_mask(LOG_GUEST_ERROR,
 176                       "sl_write: bad register offset 0x%02" HWADDR_PRIx "\n",
 177                       addr);
 178     }
 179 }
 180
 181 enum {
 182     FLASH_128M,
 183     FLASH_1024M,
 184 };
 185
 186 static const MemoryRegionOps sl_ops = {
 187     .read = sl_read,
 188     .write = sl_write,
 189     .endianness = DEVICE_NATIVE_ENDIAN,
 190 };
 191
 192 static void sl_flash_register(PXA2xxState *cpu, int size)
 193 {
 194     DeviceState *dev;
 195
 196     dev = qdev_new(TYPE_SL_NAND);
 197
 198     qdev_prop_set_uint8(dev, "manf_id", NAND_MFR_SAMSUNG);
 199     if (size == FLASH_128M)
 200         qdev_prop_set_uint8(dev, "chip_id", 0x73);
 201     else if (size == FLASH_1024M)
 202         qdev_prop_set_uint8(dev, "chip_id", 0xf1);
 203
 204     sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), &error_fatal);
 205     sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, FLASH_BASE);
 206 }
 207
 208 static void sl_nand_init(Object *obj)
 209 {
 210     SLNANDState *s = SL_NAND(obj);
 211     SysBusDevice *dev = SYS_BUS_DEVICE(obj);
 212
 213     s->ctl = 0;
 214
 215     memory_region_init_io(&s->iomem, obj, &sl_ops, s, "sl", 0x40);
 216     sysbus_init_mmio(dev, &s->iomem);
 217 }
 218
 219 static void sl_nand_realize(DeviceState *dev, Error **errp)
 220 {
 221     SLNANDState *s = SL_NAND(dev);
 222     DriveInfo *nand;
 223
 224     /* FIXME use a qdev drive property instead of drive_get() */
 225     nand = drive_get(IF_MTD, 0, 0);
 226     s->nand = nand_init(nand ? blk_by_legacy_dinfo(nand) : NULL,
 227                         s->manf_id, s->chip_id);
 228 }
 229
 230 /* Spitz Keyboard */
 231
 232 #define SPITZ_KEY_STROBE_NUM    11
 233 #define SPITZ_KEY_SENSE_NUM     7
 234
 235 static const int spitz_gpio_key_sense[SPITZ_KEY_SENSE_NUM] = {
 236     12, 17, 91, 34, 36, 38, 39
 237 };
 238
 239 static const int spitz_gpio_key_strobe[SPITZ_KEY_STROBE_NUM] = {
 240     88, 23, 24, 25, 26, 27, 52, 103, 107, 108, 114
 241 };
 242
 243 /* Eighth additional row maps the special keys */
 244 static int spitz_keymap[SPITZ_KEY_SENSE_NUM + 1][SPITZ_KEY_STROBE_NUM] = {
 245     { 0x1d, 0x02, 0x04, 0x06, 0x07, 0x08, 0x0a, 0x0b, 0x0e, 0x3f, 0x40 },
 246     {  -1 , 0x03, 0x05, 0x13, 0x15, 0x09, 0x17, 0x18, 0x19, 0x41, 0x42 },
 247     { 0x0f, 0x10, 0x12, 0x14, 0x22, 0x16, 0x24, 0x25,  -1 ,  -1 ,  -1  },
 248     { 0x3c, 0x11, 0x1f, 0x21, 0x2f, 0x23, 0x32, 0x26,  -1 , 0x36,  -1  },
 249     { 0x3b, 0x1e, 0x20, 0x2e, 0x30, 0x31, 0x34,  -1 , 0x1c, 0x2a,  -1  },
 250     { 0x44, 0x2c, 0x2d, 0x0c, 0x39, 0x33,  -1 , 0x48,  -1 ,  -1 , 0x38 },
 251     { 0x37, 0x3d,  -1 , 0x45, 0x57, 0x58, 0x4b, 0x50, 0x4d,  -1 ,  -1  },
 252     { 0x52, 0x43, 0x01, 0x47, 0x49,  -1 ,  -1 ,  -1 ,  -1 ,  -1 ,  -1  },
 253 };
 254
 255 #define SPITZ_GPIO_AK_INT       13      /* Remote control */
 256 #define SPITZ_GPIO_SYNC                 16      /* Sync button */
 257 #define SPITZ_GPIO_ON_KEY       95      /* Power button */
 258 #define SPITZ_GPIO_SWA          97      /* Lid */
 259 #define SPITZ_GPIO_SWB          96      /* Tablet mode */
 260
 261 /* The special buttons are mapped to unused keys */
 262 static const int spitz_gpiomap[5] = {
 263     SPITZ_GPIO_AK_INT, SPITZ_GPIO_SYNC, SPITZ_GPIO_ON_KEY,
 264     SPITZ_GPIO_SWA, SPITZ_GPIO_SWB,
 265 };
 266
 267 #define TYPE_SPITZ_KEYBOARD "spitz-keyboard"
 268 typedef struct SpitzKeyboardState SpitzKeyboardState;
 269 #define SPITZ_KEYBOARD(obj) \
 270     OBJECT_CHECK(SpitzKeyboardState, (obj), TYPE_SPITZ_KEYBOARD)
 271
 272 struct SpitzKeyboardState {
 273     SysBusDevice parent_obj;
 274
 275     qemu_irq sense[SPITZ_KEY_SENSE_NUM];
 276     qemu_irq gpiomap[5];
 277     int keymap[0x80];
 278     uint16_t keyrow[SPITZ_KEY_SENSE_NUM];
 279     uint16_t strobe_state;
 280     uint16_t sense_state;
 281
 282     uint16_t pre_map[0x100];
 283     uint16_t modifiers;
 284     uint16_t imodifiers;
 285     uint8_t fifo[16];
 286     int fifopos, fifolen;
 287     QEMUTimer *kbdtimer;
 288 };
 289
 290 static void spitz_keyboard_sense_update(SpitzKeyboardState *s)
 291 {
 292     int i;
 293     uint16_t strobe, sense = 0;
 294     for (i = 0; i < SPITZ_KEY_SENSE_NUM; i ++) {
 295         strobe = s->keyrow[i] & s->strobe_state;
 296         if (strobe) {
 297             sense |= 1 << i;
 298             if (!(s->sense_state & (1 << i)))
 299                 qemu_irq_raise(s->sense[i]);
 300         } else if (s->sense_state & (1 << i))
 301             qemu_irq_lower(s->sense[i]);
 302     }
 303
 304     s->sense_state = sense;
 305 }
 306
 307 static void spitz_keyboard_strobe(void *opaque, int line, int level)
 308 {
 309     SpitzKeyboardState *s = (SpitzKeyboardState *) opaque;
 310
 311     if (level)
 312         s->strobe_state |= 1 << line;
 313     else
 314         s->strobe_state &= ~(1 << line);
 315     spitz_keyboard_sense_update(s);
 316 }
 317
 318 static void spitz_keyboard_keydown(SpitzKeyboardState *s, int keycode)
 319 {
 320     int spitz_keycode = s->keymap[keycode & 0x7f];
 321     if (spitz_keycode == -1)
 322         return;
 323
 324     /* Handle the additional keys */
 325     if ((spitz_keycode >> 4) == SPITZ_KEY_SENSE_NUM) {
 326         qemu_set_irq(s->gpiomap[spitz_keycode & 0xf], (keycode < 0x80));
 327         return;
 328     }
 329
 330     if (keycode & 0x80)
 331         s->keyrow[spitz_keycode >> 4] &= ~(1 << (spitz_keycode & 0xf));
 332     else
 333         s->keyrow[spitz_keycode >> 4] |= 1 << (spitz_keycode & 0xf);
 334
 335     spitz_keyboard_sense_update(s);
 336 }
 337
 338 #define SPITZ_MOD_SHIFT   (1 << 7)
 339 #define SPITZ_MOD_CTRL    (1 << 8)
 340 #define SPITZ_MOD_FN      (1 << 9)
 341
 342 #define QUEUE_KEY(c)    s->fifo[(s->fifopos + s->fifolen ++) & 0xf] = c
 343
 344 static void spitz_keyboard_handler(void *opaque, int keycode)
 345 {
 346     SpitzKeyboardState *s = opaque;
 347     uint16_t code;
 348     int mapcode;
 349     switch (keycode) {
 350     case 0x2a:  /* Left Shift */
 351         s->modifiers |= 1;
 352         break;
 353     case 0xaa:
 354         s->modifiers &= ~1;
 355         break;
 356     case 0x36:  /* Right Shift */
 357         s->modifiers |= 2;
 358         break;
 359     case 0xb6:
 360         s->modifiers &= ~2;
 361         break;
 362     case 0x1d:  /* Control */
 363         s->modifiers |= 4;
 364         break;
 365     case 0x9d:
 366         s->modifiers &= ~4;
 367         break;
 368     case 0x38:  /* Alt */
 369         s->modifiers |= 8;
 370         break;
 371     case 0xb8:
 372         s->modifiers &= ~8;
 373         break;
 374     }
 375
 376     code = s->pre_map[mapcode = ((s->modifiers & 3) ?
 377             (keycode | SPITZ_MOD_SHIFT) :
 378             (keycode & ~SPITZ_MOD_SHIFT))];
 379
 380     if (code != mapcode) {
 381 #if 0
 382         if ((code & SPITZ_MOD_SHIFT) && !(s->modifiers & 1)) {
 383             QUEUE_KEY(0x2a | (keycode & 0x80));
 384         }
 385         if ((code & SPITZ_MOD_CTRL) && !(s->modifiers & 4)) {
 386             QUEUE_KEY(0x1d | (keycode & 0x80));
 387         }
 388         if ((code & SPITZ_MOD_FN) && !(s->modifiers & 8)) {
 389             QUEUE_KEY(0x38 | (keycode & 0x80));
 390         }
 391         if ((code & SPITZ_MOD_FN) && (s->modifiers & 1)) {
 392             QUEUE_KEY(0x2a | (~keycode & 0x80));
 393         }
 394         if ((code & SPITZ_MOD_FN) && (s->modifiers & 2)) {
 395             QUEUE_KEY(0x36 | (~keycode & 0x80));
 396         }
 397 #else
 398         if (keycode & 0x80) {
 399             if ((s->imodifiers & 1   ) && !(s->modifiers & 1))
 400                 QUEUE_KEY(0x2a | 0x80);
 401             if ((s->imodifiers & 4   ) && !(s->modifiers & 4))
 402                 QUEUE_KEY(0x1d | 0x80);
 403             if ((s->imodifiers & 8   ) && !(s->modifiers & 8))
 404                 QUEUE_KEY(0x38 | 0x80);
 405             if ((s->imodifiers & 0x10) && (s->modifiers & 1))
 406                 QUEUE_KEY(0x2a);
 407             if ((s->imodifiers & 0x20) && (s->modifiers & 2))
 408                 QUEUE_KEY(0x36);
 409             s->imodifiers = 0;
 410         } else {
 411             if ((code & SPITZ_MOD_SHIFT) &&
 412                 !((s->modifiers | s->imodifiers) & 1)) {
 413                 QUEUE_KEY(0x2a);
 414                 s->imodifiers |= 1;
 415             }
 416             if ((code & SPITZ_MOD_CTRL) &&
 417                 !((s->modifiers | s->imodifiers) & 4)) {
 418                 QUEUE_KEY(0x1d);
 419                 s->imodifiers |= 4;
 420             }
 421             if ((code & SPITZ_MOD_FN) &&
 422                 !((s->modifiers | s->imodifiers) & 8)) {
 423                 QUEUE_KEY(0x38);
 424                 s->imodifiers |= 8;
 425             }
 426             if ((code & SPITZ_MOD_FN) && (s->modifiers & 1) &&
 427                             !(s->imodifiers & 0x10)) {
 428                 QUEUE_KEY(0x2a | 0x80);
 429                 s->imodifiers |= 0x10;
 430             }
 431             if ((code & SPITZ_MOD_FN) && (s->modifiers & 2) &&
 432                             !(s->imodifiers & 0x20)) {
 433                 QUEUE_KEY(0x36 | 0x80);
 434                 s->imodifiers |= 0x20;
 435             }
 436         }
 437 #endif
 438     }
 439
 440     QUEUE_KEY((code & 0x7f) | (keycode & 0x80));
 441 }
 442
 443 static void spitz_keyboard_tick(void *opaque)
 444 {
 445     SpitzKeyboardState *s = (SpitzKeyboardState *) opaque;
 446
 447     if (s->fifolen) {
 448         spitz_keyboard_keydown(s, s->fifo[s->fifopos ++]);
 449         s->fifolen --;
 450         if (s->fifopos >= 16)
 451             s->fifopos = 0;
 452     }
 453
 454     timer_mod(s->kbdtimer, qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL) +
 455                    NANOSECONDS_PER_SECOND / 32);
 456 }
 457
 458 static void spitz_keyboard_pre_map(SpitzKeyboardState *s)
 459 {
 460     int i;
 461     for (i = 0; i < 0x100; i ++)
 462         s->pre_map[i] = i;
 463     s->pre_map[0x02 | SPITZ_MOD_SHIFT] = 0x02 | SPITZ_MOD_SHIFT; /* exclam */
 464     s->pre_map[0x28 | SPITZ_MOD_SHIFT] = 0x03 | SPITZ_MOD_SHIFT; /* quotedbl */
 465     s->pre_map[0x04 | SPITZ_MOD_SHIFT] = 0x04 | SPITZ_MOD_SHIFT; /* # */
 466     s->pre_map[0x05 | SPITZ_MOD_SHIFT] = 0x05 | SPITZ_MOD_SHIFT; /* dollar */
 467     s->pre_map[0x06 | SPITZ_MOD_SHIFT] = 0x06 | SPITZ_MOD_SHIFT; /* percent */
 468     s->pre_map[0x08 | SPITZ_MOD_SHIFT] = 0x07 | SPITZ_MOD_SHIFT; /* ampersand */
 469     s->pre_map[0x28]                   = 0x08 | SPITZ_MOD_SHIFT; /* ' */
 470     s->pre_map[0x0a | SPITZ_MOD_SHIFT] = 0x09 | SPITZ_MOD_SHIFT; /* ( */
 471     s->pre_map[0x0b | SPITZ_MOD_SHIFT] = 0x0a | SPITZ_MOD_SHIFT; /* ) */
 472     s->pre_map[0x29 | SPITZ_MOD_SHIFT] = 0x0b | SPITZ_MOD_SHIFT; /* tilde */
 473     s->pre_map[0x03 | SPITZ_MOD_SHIFT] = 0x0c | SPITZ_MOD_SHIFT; /* at */
 474     s->pre_map[0xd3]                   = 0x0e | SPITZ_MOD_FN;    /* Delete */
 475     s->pre_map[0x3a]                   = 0x0f | SPITZ_MOD_FN;    /* Caps_Lock */
 476     s->pre_map[0x07 | SPITZ_MOD_SHIFT] = 0x11 | SPITZ_MOD_FN;    /* ^ */
 477     s->pre_map[0x0d]                   = 0x12 | SPITZ_MOD_FN;    /* equal */
 478     s->pre_map[0x0d | SPITZ_MOD_SHIFT] = 0x13 | SPITZ_MOD_FN;    /* plus */
 479     s->pre_map[0x1a]                   = 0x14 | SPITZ_MOD_FN;    /* [ */
 480     s->pre_map[0x1b]                   = 0x15 | SPITZ_MOD_FN;    /* ] */
 481     s->pre_map[0x1a | SPITZ_MOD_SHIFT] = 0x16 | SPITZ_MOD_FN;    /* { */
 482     s->pre_map[0x1b | SPITZ_MOD_SHIFT] = 0x17 | SPITZ_MOD_FN;    /* } */
 483     s->pre_map[0x27]                   = 0x22 | SPITZ_MOD_FN;    /* semicolon */
 484     s->pre_map[0x27 | SPITZ_MOD_SHIFT] = 0x23 | SPITZ_MOD_FN;    /* colon */
 485     s->pre_map[0x09 | SPITZ_MOD_SHIFT] = 0x24 | SPITZ_MOD_FN;    /* asterisk */
 486     s->pre_map[0x2b]                   = 0x25 | SPITZ_MOD_FN;    /* backslash */
 487     s->pre_map[0x2b | SPITZ_MOD_SHIFT] = 0x26 | SPITZ_MOD_FN;    /* bar */
 488     s->pre_map[0x0c | SPITZ_MOD_SHIFT] = 0x30 | SPITZ_MOD_FN;    /* _ */
 489     s->pre_map[0x33 | SPITZ_MOD_SHIFT] = 0x33 | SPITZ_MOD_FN;    /* less */
 490     s->pre_map[0x35]                   = 0x33 | SPITZ_MOD_SHIFT; /* slash */
 491     s->pre_map[0x34 | SPITZ_MOD_SHIFT] = 0x34 | SPITZ_MOD_FN;    /* greater */
 492     s->pre_map[0x35 | SPITZ_MOD_SHIFT] = 0x34 | SPITZ_MOD_SHIFT; /* question */
 493     s->pre_map[0x49]                   = 0x48 | SPITZ_MOD_FN;    /* Page_Up */
 494     s->pre_map[0x51]                   = 0x50 | SPITZ_MOD_FN;    /* Page_Down */
 495
 496     s->modifiers = 0;
 497     s->imodifiers = 0;
 498     s->fifopos = 0;
 499     s->fifolen = 0;
 500 }
 501
 502 #undef SPITZ_MOD_SHIFT
 503 #undef SPITZ_MOD_CTRL
 504 #undef SPITZ_MOD_FN
 505
 506 static int spitz_keyboard_post_load(void *opaque, int version_id)
 507 {
 508     SpitzKeyboardState *s = (SpitzKeyboardState *) opaque;
 509
 510     /* Release all pressed keys */
 511     memset(s->keyrow, 0, sizeof(s->keyrow));
 512     spitz_keyboard_sense_update(s);
 513     s->modifiers = 0;
 514     s->imodifiers = 0;
 515     s->fifopos = 0;
 516     s->fifolen = 0;
 517
 518     return 0;
 519 }
 520
 521 static void spitz_keyboard_register(PXA2xxState *cpu)
 522 {
 523     int i;
 524     DeviceState *dev;
 525     SpitzKeyboardState *s;
 526
 527     dev = sysbus_create_simple(TYPE_SPITZ_KEYBOARD, -1, NULL);
 528     s = SPITZ_KEYBOARD(dev);
 529
 530     for (i = 0; i < SPITZ_KEY_SENSE_NUM; i ++)
 531         qdev_connect_gpio_out(dev, i, qdev_get_gpio_in(cpu->gpio, spitz_gpio_key_sense[i]));
 532
 533     for (i = 0; i < 5; i ++)
 534         s->gpiomap[i] = qdev_get_gpio_in(cpu->gpio, spitz_gpiomap[i]);
 535
 536     if (!graphic_rotate)
 537         s->gpiomap[4] = qemu_irq_invert(s->gpiomap[4]);
 538
 539     for (i = 0; i < 5; i++)
 540         qemu_set_irq(s->gpiomap[i], 0);
 541
 542     for (i = 0; i < SPITZ_KEY_STROBE_NUM; i ++)
 543         qdev_connect_gpio_out(cpu->gpio, spitz_gpio_key_strobe[i],
 544                 qdev_get_gpio_in(dev, i));
 545
 546     timer_mod(s->kbdtimer, qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL));
 547
 548     qemu_add_kbd_event_handler(spitz_keyboard_handler, s);
 549 }
 550
 551 static void spitz_keyboard_init(Object *obj)
 552 {
 553     DeviceState *dev = DEVICE(obj);
 554     SpitzKeyboardState *s = SPITZ_KEYBOARD(obj);
 555     int i, j;
 556
 557     for (i = 0; i < 0x80; i ++)
 558         s->keymap[i] = -1;
 559     for (i = 0; i < SPITZ_KEY_SENSE_NUM + 1; i ++)
 560         for (j = 0; j < SPITZ_KEY_STROBE_NUM; j ++)
 561             if (spitz_keymap[i][j] != -1)
 562                 s->keymap[spitz_keymap[i][j]] = (i << 4) | j;
 563
 564     spitz_keyboard_pre_map(s);
 565
 566     qdev_init_gpio_in(dev, spitz_keyboard_strobe, SPITZ_KEY_STROBE_NUM);
 567     qdev_init_gpio_out(dev, s->sense, SPITZ_KEY_SENSE_NUM);
 568 }
 569
 570 static void spitz_keyboard_realize(DeviceState *dev, Error **errp)
 571 {
 572     SpitzKeyboardState *s = SPITZ_KEYBOARD(dev);
 573     s->kbdtimer = timer_new_ns(QEMU_CLOCK_VIRTUAL, spitz_keyboard_tick, s);
 574 }
 575
 576 /* LCD backlight controller */
 577
 578 #define LCDTG_RESCTL    0x00
 579 #define LCDTG_PHACTRL   0x01
 580 #define LCDTG_DUTYCTRL  0x02
 581 #define LCDTG_POWERREG0         0x03
 582 #define LCDTG_POWERREG1         0x04
 583 #define LCDTG_GPOR3     0x05
 584 #define LCDTG_PICTRL    0x06
 585 #define LCDTG_POLCTRL   0x07
 586
 587 #define TYPE_SPITZ_LCDTG "spitz-lcdtg"
 588 typedef struct SpitzLCDTG SpitzLCDTG;
 589 #define SPITZ_LCDTG(obj) OBJECT_CHECK(SpitzLCDTG, (obj), TYPE_SPITZ_LCDTG)
 590
 591 struct SpitzLCDTG {
 592     SSISlave ssidev;
 593     uint32_t bl_intensity;
 594     uint32_t bl_power;
 595 };
 596
 597 static void spitz_bl_update(SpitzLCDTG *s)
 598 {
 599     if (s->bl_power && s->bl_intensity)
 600         zaurus_printf("LCD Backlight now at %i/63\n", s->bl_intensity);
 601     else
 602         zaurus_printf("LCD Backlight now off\n");
 603 }
 604
 605 static inline void spitz_bl_bit5(void *opaque, int line, int level)
 606 {
 607     SpitzLCDTG *s = opaque;
 608     int prev = s->bl_intensity;
 609
 610     if (level)
 611         s->bl_intensity &= ~0x20;
 612     else
 613         s->bl_intensity |= 0x20;
 614
 615     if (s->bl_power && prev != s->bl_intensity)
 616         spitz_bl_update(s);
 617 }
 618
 619 static inline void spitz_bl_power(void *opaque, int line, int level)
 620 {
 621     SpitzLCDTG *s = opaque;
 622     s->bl_power = !!level;
 623     spitz_bl_update(s);
 624 }
 625
 626 static uint32_t spitz_lcdtg_transfer(SSISlave *dev, uint32_t value)
 627 {
 628     SpitzLCDTG *s = SPITZ_LCDTG(dev);
 629     int addr;
 630     addr = value >> 5;
 631     value &= 0x1f;
 632
 633     switch (addr) {
 634     case LCDTG_RESCTL:
 635         if (value)
 636             zaurus_printf("LCD in QVGA mode\n");
 637         else
 638             zaurus_printf("LCD in VGA mode\n");
 639         break;
 640
 641     case LCDTG_DUTYCTRL:
 642         s->bl_intensity &= ~0x1f;
 643         s->bl_intensity |= value;
 644         if (s->bl_power)
 645             spitz_bl_update(s);
 646         break;
 647
 648     case LCDTG_POWERREG0:
 649         /* Set common voltage to M62332FP */
 650         break;
 651     }
 652     return 0;
 653 }
 654
 655 static void spitz_lcdtg_realize(SSISlave *ssi, Error **errp)
 656 {
 657     SpitzLCDTG *s = SPITZ_LCDTG(ssi);
 658     DeviceState *dev = DEVICE(s);
 659
 660     s->bl_power = 0;
 661     s->bl_intensity = 0x20;
 662
 663     qdev_init_gpio_in_named(dev, spitz_bl_bit5, "bl_bit5", 1);
 664     qdev_init_gpio_in_named(dev, spitz_bl_power, "bl_power", 1);
 665 }
 666
 667 /* SSP devices */
 668
 669 #define CORGI_SSP_PORT          2
 670
 671 #define SPITZ_GPIO_LCDCON_CS    53
 672 #define SPITZ_GPIO_ADS7846_CS   14
 673 #define SPITZ_GPIO_MAX1111_CS   20
 674 #define SPITZ_GPIO_TP_INT       11
 675
 676 #define TYPE_CORGI_SSP "corgi-ssp"
 677 typedef struct CorgiSSPState CorgiSSPState;
 678 #define CORGI_SSP(obj) OBJECT_CHECK(CorgiSSPState, (obj), TYPE_CORGI_SSP)
 679
 680 /* "Demux" the signal based on current chipselect */
 681 struct CorgiSSPState {
 682     SSISlave ssidev;
 683     SSIBus *bus[3];
 684     uint32_t enable[3];
 685 };
 686
 687 static uint32_t corgi_ssp_transfer(SSISlave *dev, uint32_t value)
 688 {
 689     CorgiSSPState *s = CORGI_SSP(dev);
 690     int i;
 691
 692     for (i = 0; i < 3; i++) {
 693         if (s->enable[i]) {
 694             return ssi_transfer(s->bus[i], value);
 695         }
 696     }
 697     return 0;
 698 }
 699
 700 static void corgi_ssp_gpio_cs(void *opaque, int line, int level)
 701 {
 702     CorgiSSPState *s = (CorgiSSPState *)opaque;
 703     assert(line >= 0 && line < 3);
 704     s->enable[line] = !level;
 705 }
 706
 707 #define MAX1111_BATT_VOLT       1
 708 #define MAX1111_BATT_TEMP       2
 709 #define MAX1111_ACIN_VOLT       3
 710
 711 #define SPITZ_BATTERY_TEMP      0xe0    /* About 2.9V */
 712 #define SPITZ_BATTERY_VOLT      0xd0    /* About 4.0V */
 713 #define SPITZ_CHARGEON_ACIN     0x80    /* About 5.0V */
 714
 715 static void corgi_ssp_realize(SSISlave *d, Error **errp)
 716 {
 717     DeviceState *dev = DEVICE(d);
 718     CorgiSSPState *s = CORGI_SSP(d);
 719
 720     qdev_init_gpio_in(dev, corgi_ssp_gpio_cs, 3);
 721     s->bus[0] = ssi_create_bus(dev, "ssi0");
 722     s->bus[1] = ssi_create_bus(dev, "ssi1");
 723     s->bus[2] = ssi_create_bus(dev, "ssi2");
 724 }
 725
 726 static void spitz_ssp_attach(SpitzMachineState *sms)
 727 {
 728     void *bus;
 729
 730     sms->mux = ssi_create_slave(sms->mpu->ssp[CORGI_SSP_PORT - 1],
 731                                 TYPE_CORGI_SSP);
 732
 733     bus = qdev_get_child_bus(sms->mux, "ssi0");
 734     sms->lcdtg = ssi_create_slave(bus, TYPE_SPITZ_LCDTG);
 735
 736     bus = qdev_get_child_bus(sms->mux, "ssi1");
 737     sms->ads7846 = ssi_create_slave(bus, "ads7846");
 738     qdev_connect_gpio_out(sms->ads7846, 0,
 739                           qdev_get_gpio_in(sms->mpu->gpio, SPITZ_GPIO_TP_INT));
 740
 741     bus = qdev_get_child_bus(sms->mux, "ssi2");
 742     sms->max1111 = qdev_new(TYPE_MAX_1111);
 743     qdev_prop_set_uint8(sms->max1111, "input1" /* BATT_VOLT */,
 744                         SPITZ_BATTERY_VOLT);
 745     qdev_prop_set_uint8(sms->max1111, "input2" /* BATT_TEMP */, 0);
 746     qdev_prop_set_uint8(sms->max1111, "input3" /* ACIN_VOLT */,
 747                         SPITZ_CHARGEON_ACIN);
 748     ssi_realize_and_unref(sms->max1111, bus, &error_fatal);
 749
 750     qdev_connect_gpio_out(sms->mpu->gpio, SPITZ_GPIO_LCDCON_CS,
 751                         qdev_get_gpio_in(sms->mux, 0));
 752     qdev_connect_gpio_out(sms->mpu->gpio, SPITZ_GPIO_ADS7846_CS,
 753                         qdev_get_gpio_in(sms->mux, 1));
 754     qdev_connect_gpio_out(sms->mpu->gpio, SPITZ_GPIO_MAX1111_CS,
 755                         qdev_get_gpio_in(sms->mux, 2));
 756 }
 757
 758 /* CF Microdrive */
 759
 760 static void spitz_microdrive_attach(PXA2xxState *cpu, int slot)
 761 {
 762     PCMCIACardState *md;
 763     DriveInfo *dinfo;
 764
 765     dinfo = drive_get(IF_IDE, 0, 0);
 766     if (!dinfo || dinfo->media_cd)
 767         return;
 768     md = dscm1xxxx_init(dinfo);
 769     pxa2xx_pcmcia_attach(cpu->pcmcia[slot], md);
 770 }
 771
 772 /* Wm8750 and Max7310 on I2C */
 773
 774 #define AKITA_MAX_ADDR  0x18
 775 #define SPITZ_WM_ADDRL  0x1b
 776 #define SPITZ_WM_ADDRH  0x1a
 777
 778 #define SPITZ_GPIO_WM   5
 779
 780 static void spitz_wm8750_addr(void *opaque, int line, int level)
 781 {
 782     I2CSlave *wm = (I2CSlave *) opaque;
 783     if (level)
 784         i2c_set_slave_address(wm, SPITZ_WM_ADDRH);
 785     else
 786         i2c_set_slave_address(wm, SPITZ_WM_ADDRL);
 787 }
 788
 789 static void spitz_i2c_setup(PXA2xxState *cpu)
 790 {
 791     /* Attach the CPU on one end of our I2C bus.  */
 792     I2CBus *bus = pxa2xx_i2c_bus(cpu->i2c[0]);
 793
 794     DeviceState *wm;
 795
 796     /* Attach a WM8750 to the bus */
 797     wm = DEVICE(i2c_slave_create_simple(bus, TYPE_WM8750, 0));
 798
 799     spitz_wm8750_addr(wm, 0, 0);
 800     qdev_connect_gpio_out(cpu->gpio, SPITZ_GPIO_WM,
 801                           qemu_allocate_irq(spitz_wm8750_addr, wm, 0));
 802     /* .. and to the sound interface.  */
 803     cpu->i2s->opaque = wm;
 804     cpu->i2s->codec_out = wm8750_dac_dat;
 805     cpu->i2s->codec_in = wm8750_adc_dat;
 806     wm8750_data_req_set(wm, cpu->i2s->data_req, cpu->i2s);
 807 }
 808
 809 static void spitz_akita_i2c_setup(PXA2xxState *cpu)
 810 {
 811     /* Attach a Max7310 to Akita I2C bus.  */
 812     i2c_slave_create_simple(pxa2xx_i2c_bus(cpu->i2c[0]), "max7310",
 813                      AKITA_MAX_ADDR);
 814 }
 815
 816 /* Other peripherals */
 817
 818 /*
 819  * Encapsulation of some miscellaneous GPIO line behaviour for the Spitz boards.
 820  *
 821  * QEMU interface:
 822  *  + named GPIO inputs "green-led", "orange-led", "charging", "discharging":
 823  *    these currently just print messages that the line has been signalled
 824  *  + named GPIO input "adc-temp-on": set to cause the battery-temperature
 825  *    value to be passed to the max111x ADC
 826  *  + named GPIO output "adc-temp": the ADC value, to be wired up to the max111x
 827  */
 828 #define TYPE_SPITZ_MISC_GPIO "spitz-misc-gpio"
 829 typedef struct SpitzMiscGPIOState SpitzMiscGPIOState;
 830 #define SPITZ_MISC_GPIO(obj) \
 831     OBJECT_CHECK(SpitzMiscGPIOState, (obj), TYPE_SPITZ_MISC_GPIO)
 832
 833 struct SpitzMiscGPIOState {
 834     SysBusDevice parent_obj;
 835
 836     qemu_irq adc_value;
 837 };
 838
 839 static void spitz_misc_charging(void *opaque, int n, int level)
 840 {
 841     zaurus_printf("Charging %s.\n", level ? "off" : "on");
 842 }
 843
 844 static void spitz_misc_discharging(void *opaque, int n, int level)
 845 {
 846     zaurus_printf("Discharging %s.\n", level ? "off" : "on");
 847 }
 848
 849 static void spitz_misc_green_led(void *opaque, int n, int level)
 850 {
 851     zaurus_printf("Green LED %s.\n", level ? "off" : "on");
 852 }
 853
 854 static void spitz_misc_orange_led(void *opaque, int n, int level)
 855 {
 856     zaurus_printf("Orange LED %s.\n", level ? "off" : "on");
 857 }
 858
 859 static void spitz_misc_adc_temp(void *opaque, int n, int level)
 860 {
 861     SpitzMiscGPIOState *s = SPITZ_MISC_GPIO(opaque);
 862     int batt_temp = level ? SPITZ_BATTERY_TEMP : 0;
 863
 864     qemu_set_irq(s->adc_value, batt_temp);
 865 }
 866
 867 static void spitz_misc_gpio_init(Object *obj)
 868 {
 869     SpitzMiscGPIOState *s = SPITZ_MISC_GPIO(obj);
 870     DeviceState *dev = DEVICE(obj);
 871
 872     qdev_init_gpio_in_named(dev, spitz_misc_charging, "charging", 1);
 873     qdev_init_gpio_in_named(dev, spitz_misc_discharging, "discharging", 1);
 874     qdev_init_gpio_in_named(dev, spitz_misc_green_led, "green-led", 1);
 875     qdev_init_gpio_in_named(dev, spitz_misc_orange_led, "orange-led", 1);
 876     qdev_init_gpio_in_named(dev, spitz_misc_adc_temp, "adc-temp-on", 1);
 877
 878     qdev_init_gpio_out_named(dev, &s->adc_value, "adc-temp", 1);
 879 }
 880
 881 #define SPITZ_SCP_LED_GREEN             1
 882 #define SPITZ_SCP_JK_B                  2
 883 #define SPITZ_SCP_CHRG_ON               3
 884 #define SPITZ_SCP_MUTE_L                4
 885 #define SPITZ_SCP_MUTE_R                5
 886 #define SPITZ_SCP_CF_POWER              6
 887 #define SPITZ_SCP_LED_ORANGE            7
 888 #define SPITZ_SCP_JK_A                  8
 889 #define SPITZ_SCP_ADC_TEMP_ON           9
 890 #define SPITZ_SCP2_IR_ON                1
 891 #define SPITZ_SCP2_AKIN_PULLUP          2
 892 #define SPITZ_SCP2_BACKLIGHT_CONT       7
 893 #define SPITZ_SCP2_BACKLIGHT_ON                 8
 894 #define SPITZ_SCP2_MIC_BIAS             9
 895
 896 static void spitz_scoop_gpio_setup(SpitzMachineState *sms)
 897 {
 898     DeviceState *miscdev = sysbus_create_simple(TYPE_SPITZ_MISC_GPIO, -1, NULL);
 899
 900     sms->misc_gpio = miscdev;
 901
 902     qdev_connect_gpio_out(sms->scp0, SPITZ_SCP_CHRG_ON,
 903                           qdev_get_gpio_in_named(miscdev, "charging", 0));
 904     qdev_connect_gpio_out(sms->scp0, SPITZ_SCP_JK_B,
 905                           qdev_get_gpio_in_named(miscdev, "discharging", 0));
 906     qdev_connect_gpio_out(sms->scp0, SPITZ_SCP_LED_GREEN,
 907                           qdev_get_gpio_in_named(miscdev, "green-led", 0));
 908     qdev_connect_gpio_out(sms->scp0, SPITZ_SCP_LED_ORANGE,
 909                           qdev_get_gpio_in_named(miscdev, "orange-led", 0));
 910     qdev_connect_gpio_out(sms->scp0, SPITZ_SCP_ADC_TEMP_ON,
 911                           qdev_get_gpio_in_named(miscdev, "adc-temp-on", 0));
 912     qdev_connect_gpio_out_named(miscdev, "adc-temp", 0,
 913                                 qdev_get_gpio_in(sms->max1111, MAX1111_BATT_TEMP));
 914
 915     if (sms->scp1) {
 916         qdev_connect_gpio_out(sms->scp1, SPITZ_SCP2_BACKLIGHT_CONT,
 917                               qdev_get_gpio_in_named(sms->lcdtg, "bl_bit5", 0));
 918         qdev_connect_gpio_out(sms->scp1, SPITZ_SCP2_BACKLIGHT_ON,
 919                               qdev_get_gpio_in_named(sms->lcdtg, "bl_power", 0));
 920     }
 921 }
 922
 923 #define SPITZ_GPIO_HSYNC                22
 924 #define SPITZ_GPIO_SD_DETECT            9
 925 #define SPITZ_GPIO_SD_WP                81
 926 #define SPITZ_GPIO_ON_RESET             89
 927 #define SPITZ_GPIO_BAT_COVER            90
 928 #define SPITZ_GPIO_CF1_IRQ              105
 929 #define SPITZ_GPIO_CF1_CD               94
 930 #define SPITZ_GPIO_CF2_IRQ              106
 931 #define SPITZ_GPIO_CF2_CD               93
 932
 933 static int spitz_hsync;
 934
 935 static void spitz_lcd_hsync_handler(void *opaque, int line, int level)
 936 {
 937     PXA2xxState *cpu = (PXA2xxState *) opaque;
 938     qemu_set_irq(qdev_get_gpio_in(cpu->gpio, SPITZ_GPIO_HSYNC), spitz_hsync);
 939     spitz_hsync ^= 1;
 940 }
 941
 942 static void spitz_reset(void *opaque, int line, int level)
 943 {
 944     if (level) {
 945         qemu_system_reset_request(SHUTDOWN_CAUSE_GUEST_RESET);
 946     }
 947 }
 948
 949 static void spitz_gpio_setup(PXA2xxState *cpu, int slots)
 950 {
 951     qemu_irq lcd_hsync;
 952     qemu_irq reset;
 953
 954     /*
 955      * Bad hack: We toggle the LCD hsync GPIO on every GPIO status
 956      * read to satisfy broken guests that poll-wait for hsync.
 957      * Simulating a real hsync event would be less practical and
 958      * wouldn't guarantee that a guest ever exits the loop.
 959      */
 960     spitz_hsync = 0;
 961     lcd_hsync = qemu_allocate_irq(spitz_lcd_hsync_handler, cpu, 0);
 962     pxa2xx_gpio_read_notifier(cpu->gpio, lcd_hsync);
 963     pxa2xx_lcd_vsync_notifier(cpu->lcd, lcd_hsync);
 964
 965     /* MMC/SD host */
 966     pxa2xx_mmci_handlers(cpu->mmc,
 967                     qdev_get_gpio_in(cpu->gpio, SPITZ_GPIO_SD_WP),
 968                     qdev_get_gpio_in(cpu->gpio, SPITZ_GPIO_SD_DETECT));
 969
 970     /* Battery lock always closed */
 971     qemu_irq_raise(qdev_get_gpio_in(cpu->gpio, SPITZ_GPIO_BAT_COVER));
 972
 973     /* Handle reset */
 974     reset = qemu_allocate_irq(spitz_reset, cpu, 0);
 975     qdev_connect_gpio_out(cpu->gpio, SPITZ_GPIO_ON_RESET, reset);
 976
 977     /* PCMCIA signals: card's IRQ and Card-Detect */
 978     if (slots >= 1)
 979         pxa2xx_pcmcia_set_irq_cb(cpu->pcmcia[0],
 980                         qdev_get_gpio_in(cpu->gpio, SPITZ_GPIO_CF1_IRQ),
 981                         qdev_get_gpio_in(cpu->gpio, SPITZ_GPIO_CF1_CD));
 982     if (slots >= 2)
 983         pxa2xx_pcmcia_set_irq_cb(cpu->pcmcia[1],
 984                         qdev_get_gpio_in(cpu->gpio, SPITZ_GPIO_CF2_IRQ),
 985                         qdev_get_gpio_in(cpu->gpio, SPITZ_GPIO_CF2_CD));
 986 }
 987
 988 /* Board init.  */
 989 #define SPITZ_RAM       0x04000000
 990 #define SPITZ_ROM       0x00800000
 991
 992 static struct arm_boot_info spitz_binfo = {
 993     .loader_start = PXA2XX_SDRAM_BASE,
 994     .ram_size = 0x04000000,
 995 };
 996
 997 static void spitz_common_init(MachineState *machine)
 998 {
 999     SpitzMachineClass *smc = SPITZ_MACHINE_GET_CLASS(machine);
1000     SpitzMachineState *sms = SPITZ_MACHINE(machine);
1001     enum spitz_model_e model = smc->model;
1002     PXA2xxState *mpu;
1003     MemoryRegion *address_space_mem = get_system_memory();
1004     MemoryRegion *rom = g_new(MemoryRegion, 1);
1005
1006     /* Setup CPU & memory */
1007     mpu = pxa270_init(address_space_mem, spitz_binfo.ram_size,
1008                       machine->cpu_type);
1009     sms->mpu = mpu;
1010
1011     sl_flash_register(mpu, (model == spitz) ? FLASH_128M : FLASH_1024M);
1012
1013     memory_region_init_rom(rom, NULL, "spitz.rom", SPITZ_ROM, &error_fatal);
1014     memory_region_add_subregion(address_space_mem, 0, rom);
1015
1016     /* Setup peripherals */
1017     spitz_keyboard_register(mpu);
1018
1019     spitz_ssp_attach(sms);
1020
1021     sms->scp0 = sysbus_create_simple("scoop", 0x10800000, NULL);
1022     if (model != akita) {
1023         sms->scp1 = sysbus_create_simple("scoop", 0x08800040, NULL);
1024     } else {
1025         sms->scp1 = NULL;
1026     }
1027
1028     spitz_scoop_gpio_setup(sms);
1029
1030     spitz_gpio_setup(mpu, (model == akita) ? 1 : 2);
1031
1032     spitz_i2c_setup(mpu);
1033
1034     if (model == akita)
1035         spitz_akita_i2c_setup(mpu);
1036
1037     if (model == terrier)
1038         /* A 6.0 GB microdrive is permanently sitting in CF slot 1.  */
1039         spitz_microdrive_attach(mpu, 1);
1040     else if (model != akita)
1041         /* A 4.0 GB microdrive is permanently sitting in CF slot 0.  */
1042         spitz_microdrive_attach(mpu, 0);
1043
1044     spitz_binfo.board_id = smc->arm_id;
1045     arm_load_kernel(mpu->cpu, machine, &spitz_binfo);
1046     sl_bootparam_write(SL_PXA_PARAM_BASE);
1047 }
1048
1049 static void spitz_common_class_init(ObjectClass *oc, void *data)
1050 {
1051     MachineClass *mc = MACHINE_CLASS(oc);
1052
1053     mc->block_default_type = IF_IDE;
1054     mc->ignore_memory_transaction_failures = true;
1055     mc->init = spitz_common_init;
1056 }
1057
1058 static const TypeInfo spitz_common_info = {
1059     .name = TYPE_SPITZ_MACHINE,
1060     .parent = TYPE_MACHINE,
1061     .abstract = true,
1062     .instance_size = sizeof(SpitzMachineState),
1063     .class_size = sizeof(SpitzMachineClass),
1064     .class_init = spitz_common_class_init,
1065 };
1066
1067 static void akitapda_class_init(ObjectClass *oc, void *data)
1068 {
1069     MachineClass *mc = MACHINE_CLASS(oc);
1070     SpitzMachineClass *smc = SPITZ_MACHINE_CLASS(oc);
1071
1072     mc->desc = "Sharp SL-C1000 (Akita) PDA (PXA270)";
1073     mc->default_cpu_type = ARM_CPU_TYPE_NAME("pxa270-c0");
1074     smc->model = akita;
1075     smc->arm_id = 0x2e8;
1076 }
1077
1078 static const TypeInfo akitapda_type = {
1079     .name = MACHINE_TYPE_NAME("akita"),
1080     .parent = TYPE_SPITZ_MACHINE,
1081     .class_init = akitapda_class_init,
1082 };
1083
1084 static void spitzpda_class_init(ObjectClass *oc, void *data)
1085 {
1086     MachineClass *mc = MACHINE_CLASS(oc);
1087     SpitzMachineClass *smc = SPITZ_MACHINE_CLASS(oc);
1088
1089     mc->desc = "Sharp SL-C3000 (Spitz) PDA (PXA270)";
1090     mc->default_cpu_type = ARM_CPU_TYPE_NAME("pxa270-c0");
1091     smc->model = spitz;
1092     smc->arm_id = 0x2c9;
1093 }
1094
1095 static const TypeInfo spitzpda_type = {
1096     .name = MACHINE_TYPE_NAME("spitz"),
1097     .parent = TYPE_SPITZ_MACHINE,
1098     .class_init = spitzpda_class_init,
1099 };
1100
1101 static void borzoipda_class_init(ObjectClass *oc, void *data)
1102 {
1103     MachineClass *mc = MACHINE_CLASS(oc);
1104     SpitzMachineClass *smc = SPITZ_MACHINE_CLASS(oc);
1105
1106     mc->desc = "Sharp SL-C3100 (Borzoi) PDA (PXA270)";
1107     mc->default_cpu_type = ARM_CPU_TYPE_NAME("pxa270-c0");
1108     smc->model = borzoi;
1109     smc->arm_id = 0x33f;
1110 }
1111
1112 static const TypeInfo borzoipda_type = {
1113     .name = MACHINE_TYPE_NAME("borzoi"),
1114     .parent = TYPE_SPITZ_MACHINE,
1115     .class_init = borzoipda_class_init,
1116 };
1117
1118 static void terrierpda_class_init(ObjectClass *oc, void *data)
1119 {
1120     MachineClass *mc = MACHINE_CLASS(oc);
1121     SpitzMachineClass *smc = SPITZ_MACHINE_CLASS(oc);
1122
1123     mc->desc = "Sharp SL-C3200 (Terrier) PDA (PXA270)";
1124     mc->default_cpu_type = ARM_CPU_TYPE_NAME("pxa270-c5");
1125     smc->model = terrier;
1126     smc->arm_id = 0x33f;
1127 }
1128
1129 static const TypeInfo terrierpda_type = {
1130     .name = MACHINE_TYPE_NAME("terrier"),
1131     .parent = TYPE_SPITZ_MACHINE,
1132     .class_init = terrierpda_class_init,
1133 };
1134
1135 static void spitz_machine_init(void)
1136 {
1137     type_register_static(&spitz_common_info);
1138     type_register_static(&akitapda_type);
1139     type_register_static(&spitzpda_type);
1140     type_register_static(&borzoipda_type);
1141     type_register_static(&terrierpda_type);
1142 }
1143
1144 type_init(spitz_machine_init)
1145
1146 static bool is_version_0(void *opaque, int version_id)
1147 {
1148     return version_id == 0;
1149 }
1150
1151 static VMStateDescription vmstate_sl_nand_info = {
1152     .name = "sl-nand",
1153     .version_id = 0,
1154     .minimum_version_id = 0,
1155     .fields = (VMStateField[]) {
1156         VMSTATE_UINT8(ctl, SLNANDState),
1157         VMSTATE_STRUCT(ecc, SLNANDState, 0, vmstate_ecc_state, ECCState),
1158         VMSTATE_END_OF_LIST(),
1159     },
1160 };
1161
1162 static Property sl_nand_properties[] = {
1163     DEFINE_PROP_UINT8("manf_id", SLNANDState, manf_id, NAND_MFR_SAMSUNG),
1164     DEFINE_PROP_UINT8("chip_id", SLNANDState, chip_id, 0xf1),
1165     DEFINE_PROP_END_OF_LIST(),
1166 };
1167
1168 static void sl_nand_class_init(ObjectClass *klass, void *data)
1169 {
1170     DeviceClass *dc = DEVICE_CLASS(klass);
1171
1172     dc->vmsd = &vmstate_sl_nand_info;
1173     device_class_set_props(dc, sl_nand_properties);
1174     dc->realize = sl_nand_realize;
1175     /* Reason: init() method uses drive_get() */
1176     dc->user_creatable = false;
1177 }
1178
1179 static const TypeInfo sl_nand_info = {
1180     .name          = TYPE_SL_NAND,
1181     .parent        = TYPE_SYS_BUS_DEVICE,
1182     .instance_size = sizeof(SLNANDState),
1183     .instance_init = sl_nand_init,
1184     .class_init    = sl_nand_class_init,
1185 };
1186
1187 static VMStateDescription vmstate_spitz_kbd = {
1188     .name = "spitz-keyboard",
1189     .version_id = 1,
1190     .minimum_version_id = 0,
1191     .post_load = spitz_keyboard_post_load,
1192     .fields = (VMStateField[]) {
1193         VMSTATE_UINT16(sense_state, SpitzKeyboardState),
1194         VMSTATE_UINT16(strobe_state, SpitzKeyboardState),
1195         VMSTATE_UNUSED_TEST(is_version_0, 5),
1196         VMSTATE_END_OF_LIST(),
1197     },
1198 };
1199
1200 static void spitz_keyboard_class_init(ObjectClass *klass, void *data)
1201 {
1202     DeviceClass *dc = DEVICE_CLASS(klass);
1203
1204     dc->vmsd = &vmstate_spitz_kbd;
1205     dc->realize = spitz_keyboard_realize;
1206 }
1207
1208 static const TypeInfo spitz_keyboard_info = {
1209     .name          = TYPE_SPITZ_KEYBOARD,
1210     .parent        = TYPE_SYS_BUS_DEVICE,
1211     .instance_size = sizeof(SpitzKeyboardState),
1212     .instance_init = spitz_keyboard_init,
1213     .class_init    = spitz_keyboard_class_init,
1214 };
1215
1216 static const VMStateDescription vmstate_corgi_ssp_regs = {
1217     .name = "corgi-ssp",
1218     .version_id = 2,
1219     .minimum_version_id = 2,
1220     .fields = (VMStateField[]) {
1221         VMSTATE_SSI_SLAVE(ssidev, CorgiSSPState),
1222         VMSTATE_UINT32_ARRAY(enable, CorgiSSPState, 3),
1223         VMSTATE_END_OF_LIST(),
1224     }
1225 };
1226
1227 static void corgi_ssp_class_init(ObjectClass *klass, void *data)
1228 {
1229     DeviceClass *dc = DEVICE_CLASS(klass);
1230     SSISlaveClass *k = SSI_SLAVE_CLASS(klass);
1231
1232     k->realize = corgi_ssp_realize;
1233     k->transfer = corgi_ssp_transfer;
1234     dc->vmsd = &vmstate_corgi_ssp_regs;
1235 }
1236
1237 static const TypeInfo corgi_ssp_info = {
1238     .name          = TYPE_CORGI_SSP,
1239     .parent        = TYPE_SSI_SLAVE,
1240     .instance_size = sizeof(CorgiSSPState),
1241     .class_init    = corgi_ssp_class_init,
1242 };
1243
1244 static const VMStateDescription vmstate_spitz_lcdtg_regs = {
1245     .name = "spitz-lcdtg",
1246     .version_id = 1,
1247     .minimum_version_id = 1,
1248     .fields = (VMStateField[]) {
1249         VMSTATE_SSI_SLAVE(ssidev, SpitzLCDTG),
1250         VMSTATE_UINT32(bl_intensity, SpitzLCDTG),
1251         VMSTATE_UINT32(bl_power, SpitzLCDTG),
1252         VMSTATE_END_OF_LIST(),
1253     }
1254 };
1255
1256 static void spitz_lcdtg_class_init(ObjectClass *klass, void *data)
1257 {
1258     DeviceClass *dc = DEVICE_CLASS(klass);
1259     SSISlaveClass *k = SSI_SLAVE_CLASS(klass);
1260
1261     k->realize = spitz_lcdtg_realize;
1262     k->transfer = spitz_lcdtg_transfer;
1263     dc->vmsd = &vmstate_spitz_lcdtg_regs;
1264 }
1265
1266 static const TypeInfo spitz_lcdtg_info = {
1267     .name          = TYPE_SPITZ_LCDTG,
1268     .parent        = TYPE_SSI_SLAVE,
1269     .instance_size = sizeof(SpitzLCDTG),
1270     .class_init    = spitz_lcdtg_class_init,
1271 };
1272
1273 static const TypeInfo spitz_misc_gpio_info = {
1274     .name = TYPE_SPITZ_MISC_GPIO,
1275     .parent = TYPE_SYS_BUS_DEVICE,
1276     .instance_size = sizeof(SpitzMiscGPIOState),
1277     .instance_init = spitz_misc_gpio_init,
1278     /*
1279      * No class_init required: device has no internal state so does not
1280      * need to set up reset or vmstate, and does not have a realize method.
1281      */
1282 };
1283
1284 static void spitz_register_types(void)
1285 {
1286     type_register_static(&corgi_ssp_info);
1287     type_register_static(&spitz_lcdtg_info);
1288     type_register_static(&spitz_keyboard_info);
1289     type_register_static(&sl_nand_info);
1290     type_register_static(&spitz_misc_gpio_info);
1291 }
1292
1293 type_init(spitz_register_types)