2 * Copyright (c) 2018 Intel Corporation
3 * Copyright (c) 2019 Red Hat, Inc.
5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms and conditions of the GNU General Public License,
7 * version 2 or later, as published by the Free Software Foundation.
9 * This program is distributed in the hope it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
14 * You should have received a copy of the GNU General Public License along with
15 * this program. If not, see <http://www.gnu.org/licenses/>.
18 #include "qemu/osdep.h"
19 #include "qemu/error-report.h"
20 #include "qemu/cutils.h"
21 #include "qemu/units.h"
22 #include "qapi/error.h"
23 #include "qapi/visitor.h"
24 #include "qapi/qapi-visit-common.h"
25 #include "sysemu/sysemu.h"
26 #include "sysemu/cpus.h"
27 #include "sysemu/numa.h"
28 #include "sysemu/reset.h"
29 #include "sysemu/runstate.h"
30 #include "acpi-microvm.h"
31 #include "microvm-dt.h"
33 #include "hw/loader.h"
35 #include "hw/kvm/clock.h"
36 #include "hw/i386/microvm.h"
37 #include "hw/i386/x86.h"
38 #include "target/i386/cpu.h"
39 #include "hw/intc/i8259.h"
40 #include "hw/timer/i8254.h"
41 #include "hw/rtc/mc146818rtc.h"
42 #include "hw/char/serial.h"
43 #include "hw/display/ramfb.h"
44 #include "hw/i386/topology.h"
45 #include "hw/i386/e820_memory_layout.h"
46 #include "hw/i386/fw_cfg.h"
47 #include "hw/virtio/virtio-mmio.h"
48 #include "hw/acpi/acpi.h"
49 #include "hw/acpi/generic_event_device.h"
50 #include "hw/pci-host/gpex.h"
51 #include "hw/usb/xhci.h"
54 #include "kvm/kvm_i386.h"
55 #include "hw/xen/start_info.h"
57 #define MICROVM_QBOOT_FILENAME "qboot.rom"
58 #define MICROVM_BIOS_FILENAME "bios-microvm.bin"
60 static void microvm_set_rtc(MicrovmMachineState
*mms
, ISADevice
*s
)
62 X86MachineState
*x86ms
= X86_MACHINE(mms
);
65 val
= MIN(x86ms
->below_4g_mem_size
/ KiB
, 640);
66 rtc_set_memory(s
, 0x15, val
);
67 rtc_set_memory(s
, 0x16, val
>> 8);
68 /* extended memory (next 64MiB) */
69 if (x86ms
->below_4g_mem_size
> 1 * MiB
) {
70 val
= (x86ms
->below_4g_mem_size
- 1 * MiB
) / KiB
;
77 rtc_set_memory(s
, 0x17, val
);
78 rtc_set_memory(s
, 0x18, val
>> 8);
79 rtc_set_memory(s
, 0x30, val
);
80 rtc_set_memory(s
, 0x31, val
>> 8);
81 /* memory between 16MiB and 4GiB */
82 if (x86ms
->below_4g_mem_size
> 16 * MiB
) {
83 val
= (x86ms
->below_4g_mem_size
- 16 * MiB
) / (64 * KiB
);
90 rtc_set_memory(s
, 0x34, val
);
91 rtc_set_memory(s
, 0x35, val
>> 8);
92 /* memory above 4GiB */
93 val
= x86ms
->above_4g_mem_size
/ 65536;
94 rtc_set_memory(s
, 0x5b, val
);
95 rtc_set_memory(s
, 0x5c, val
>> 8);
96 rtc_set_memory(s
, 0x5d, val
>> 16);
99 static void create_gpex(MicrovmMachineState
*mms
)
101 X86MachineState
*x86ms
= X86_MACHINE(mms
);
102 MemoryRegion
*mmio32_alias
;
103 MemoryRegion
*mmio64_alias
;
104 MemoryRegion
*mmio_reg
;
105 MemoryRegion
*ecam_alias
;
106 MemoryRegion
*ecam_reg
;
110 dev
= qdev_new(TYPE_GPEX_HOST
);
111 sysbus_realize_and_unref(SYS_BUS_DEVICE(dev
), &error_fatal
);
113 /* Map only the first size_ecam bytes of ECAM space */
114 ecam_alias
= g_new0(MemoryRegion
, 1);
115 ecam_reg
= sysbus_mmio_get_region(SYS_BUS_DEVICE(dev
), 0);
116 memory_region_init_alias(ecam_alias
, OBJECT(dev
), "pcie-ecam",
117 ecam_reg
, 0, mms
->gpex
.ecam
.size
);
118 memory_region_add_subregion(get_system_memory(),
119 mms
->gpex
.ecam
.base
, ecam_alias
);
121 /* Map the MMIO window into system address space so as to expose
122 * the section of PCI MMIO space which starts at the same base address
123 * (ie 1:1 mapping for that part of PCI MMIO space visible through
126 mmio_reg
= sysbus_mmio_get_region(SYS_BUS_DEVICE(dev
), 1);
127 if (mms
->gpex
.mmio32
.size
) {
128 mmio32_alias
= g_new0(MemoryRegion
, 1);
129 memory_region_init_alias(mmio32_alias
, OBJECT(dev
), "pcie-mmio32", mmio_reg
,
130 mms
->gpex
.mmio32
.base
, mms
->gpex
.mmio32
.size
);
131 memory_region_add_subregion(get_system_memory(),
132 mms
->gpex
.mmio32
.base
, mmio32_alias
);
134 if (mms
->gpex
.mmio64
.size
) {
135 mmio64_alias
= g_new0(MemoryRegion
, 1);
136 memory_region_init_alias(mmio64_alias
, OBJECT(dev
), "pcie-mmio64", mmio_reg
,
137 mms
->gpex
.mmio64
.base
, mms
->gpex
.mmio64
.size
);
138 memory_region_add_subregion(get_system_memory(),
139 mms
->gpex
.mmio64
.base
, mmio64_alias
);
142 for (i
= 0; i
< GPEX_NUM_IRQS
; i
++) {
143 sysbus_connect_irq(SYS_BUS_DEVICE(dev
), i
,
144 x86ms
->gsi
[mms
->gpex
.irq
+ i
]);
148 static int microvm_ioapics(MicrovmMachineState
*mms
)
150 if (!x86_machine_is_acpi_enabled(X86_MACHINE(mms
))) {
153 if (mms
->ioapic2
== ON_OFF_AUTO_OFF
) {
159 static void microvm_devices_init(MicrovmMachineState
*mms
)
161 const char *default_firmware
;
162 X86MachineState
*x86ms
= X86_MACHINE(mms
);
164 ISADevice
*rtc_state
;
169 /* Core components */
170 ioapics
= microvm_ioapics(mms
);
171 gsi_state
= g_malloc0(sizeof(*gsi_state
));
172 x86ms
->gsi
= qemu_allocate_irqs(gsi_handler
, gsi_state
,
173 IOAPIC_NUM_PINS
* ioapics
);
175 isa_bus
= isa_bus_new(NULL
, get_system_memory(), get_system_io(),
177 isa_bus_irqs(isa_bus
, x86ms
->gsi
);
179 ioapic_init_gsi(gsi_state
, "machine");
181 x86ms
->ioapic2
= ioapic_init_secondary(gsi_state
);
184 kvmclock_create(true);
186 mms
->virtio_irq_base
= 5;
187 mms
->virtio_num_transports
= 8;
188 if (x86ms
->ioapic2
) {
189 mms
->pcie_irq_base
= 16; /* 16 -> 19 */
190 /* use second ioapic (24 -> 47) for virtio-mmio irq lines */
191 mms
->virtio_irq_base
= IO_APIC_SECONDARY_IRQBASE
;
192 mms
->virtio_num_transports
= IOAPIC_NUM_PINS
;
193 } else if (x86_machine_is_acpi_enabled(x86ms
)) {
194 mms
->pcie_irq_base
= 12; /* 12 -> 15 */
195 mms
->virtio_irq_base
= 16; /* 16 -> 23 */
198 for (i
= 0; i
< mms
->virtio_num_transports
; i
++) {
199 sysbus_create_simple("virtio-mmio",
200 VIRTIO_MMIO_BASE
+ i
* 512,
201 x86ms
->gsi
[mms
->virtio_irq_base
+ i
]);
204 /* Optional and legacy devices */
205 if (x86_machine_is_acpi_enabled(x86ms
)) {
206 DeviceState
*dev
= qdev_new(TYPE_ACPI_GED_X86
);
207 qdev_prop_set_uint32(dev
, "ged-event", ACPI_GED_PWR_DOWN_EVT
);
208 sysbus_mmio_map(SYS_BUS_DEVICE(dev
), 0, GED_MMIO_BASE
);
209 /* sysbus_mmio_map(SYS_BUS_DEVICE(dev), 1, GED_MMIO_BASE_MEMHP); */
210 sysbus_mmio_map(SYS_BUS_DEVICE(dev
), 2, GED_MMIO_BASE_REGS
);
211 sysbus_connect_irq(SYS_BUS_DEVICE(dev
), 0,
212 x86ms
->gsi
[GED_MMIO_IRQ
]);
213 sysbus_realize(SYS_BUS_DEVICE(dev
), &error_fatal
);
214 x86ms
->acpi_dev
= HOTPLUG_HANDLER(dev
);
217 if (x86_machine_is_acpi_enabled(x86ms
) && machine_usb(MACHINE(mms
))) {
218 DeviceState
*dev
= qdev_new(TYPE_XHCI_SYSBUS
);
219 qdev_prop_set_uint32(dev
, "intrs", 1);
220 qdev_prop_set_uint32(dev
, "slots", XHCI_MAXSLOTS
);
221 qdev_prop_set_uint32(dev
, "p2", 8);
222 qdev_prop_set_uint32(dev
, "p3", 8);
223 sysbus_realize(SYS_BUS_DEVICE(dev
), &error_fatal
);
224 sysbus_mmio_map(SYS_BUS_DEVICE(dev
), 0, MICROVM_XHCI_BASE
);
225 sysbus_connect_irq(SYS_BUS_DEVICE(dev
), 0,
226 x86ms
->gsi
[MICROVM_XHCI_IRQ
]);
229 if (x86_machine_is_acpi_enabled(x86ms
) && mms
->pcie
== ON_OFF_AUTO_ON
) {
230 /* use topmost 25% of the address space available */
231 hwaddr phys_size
= (hwaddr
)1 << X86_CPU(first_cpu
)->phys_bits
;
232 if (phys_size
> 0x1000000ll
) {
233 mms
->gpex
.mmio64
.size
= phys_size
/ 4;
234 mms
->gpex
.mmio64
.base
= phys_size
- mms
->gpex
.mmio64
.size
;
236 mms
->gpex
.mmio32
.base
= PCIE_MMIO_BASE
;
237 mms
->gpex
.mmio32
.size
= PCIE_MMIO_SIZE
;
238 mms
->gpex
.ecam
.base
= PCIE_ECAM_BASE
;
239 mms
->gpex
.ecam
.size
= PCIE_ECAM_SIZE
;
240 mms
->gpex
.irq
= mms
->pcie_irq_base
;
242 x86ms
->pci_irq_mask
= ((1 << (mms
->pcie_irq_base
+ 0)) |
243 (1 << (mms
->pcie_irq_base
+ 1)) |
244 (1 << (mms
->pcie_irq_base
+ 2)) |
245 (1 << (mms
->pcie_irq_base
+ 3)));
247 x86ms
->pci_irq_mask
= 0;
250 if (x86ms
->pic
== ON_OFF_AUTO_ON
|| x86ms
->pic
== ON_OFF_AUTO_AUTO
) {
253 i8259
= i8259_init(isa_bus
, x86_allocate_cpu_irq());
254 for (i
= 0; i
< ISA_NUM_IRQS
; i
++) {
255 gsi_state
->i8259_irq
[i
] = i8259
[i
];
260 if (x86ms
->pit
== ON_OFF_AUTO_ON
|| x86ms
->pit
== ON_OFF_AUTO_AUTO
) {
261 if (kvm_pit_in_kernel()) {
262 kvm_pit_init(isa_bus
, 0x40);
264 i8254_pit_init(isa_bus
, 0x40, 0, NULL
);
268 if (mms
->rtc
== ON_OFF_AUTO_ON
||
269 (mms
->rtc
== ON_OFF_AUTO_AUTO
&& !kvm_enabled())) {
270 rtc_state
= mc146818_rtc_init(isa_bus
, 2000, NULL
);
271 microvm_set_rtc(mms
, rtc_state
);
274 if (mms
->isa_serial
) {
275 serial_hds_isa_init(isa_bus
, 0, 1);
278 default_firmware
= x86_machine_is_acpi_enabled(x86ms
)
279 ? MICROVM_BIOS_FILENAME
280 : MICROVM_QBOOT_FILENAME
;
281 x86_bios_rom_init(MACHINE(mms
), default_firmware
, get_system_memory(), true);
284 static void microvm_memory_init(MicrovmMachineState
*mms
)
286 MachineState
*machine
= MACHINE(mms
);
287 X86MachineState
*x86ms
= X86_MACHINE(mms
);
288 MemoryRegion
*ram_below_4g
, *ram_above_4g
;
289 MemoryRegion
*system_memory
= get_system_memory();
291 ram_addr_t lowmem
= 0xc0000000; /* 3G */
294 if (machine
->ram_size
> lowmem
) {
295 x86ms
->above_4g_mem_size
= machine
->ram_size
- lowmem
;
296 x86ms
->below_4g_mem_size
= lowmem
;
298 x86ms
->above_4g_mem_size
= 0;
299 x86ms
->below_4g_mem_size
= machine
->ram_size
;
302 ram_below_4g
= g_malloc(sizeof(*ram_below_4g
));
303 memory_region_init_alias(ram_below_4g
, NULL
, "ram-below-4g", machine
->ram
,
304 0, x86ms
->below_4g_mem_size
);
305 memory_region_add_subregion(system_memory
, 0, ram_below_4g
);
307 e820_add_entry(0, x86ms
->below_4g_mem_size
, E820_RAM
);
309 if (x86ms
->above_4g_mem_size
> 0) {
310 ram_above_4g
= g_malloc(sizeof(*ram_above_4g
));
311 memory_region_init_alias(ram_above_4g
, NULL
, "ram-above-4g",
313 x86ms
->below_4g_mem_size
,
314 x86ms
->above_4g_mem_size
);
315 memory_region_add_subregion(system_memory
, 0x100000000ULL
,
317 e820_add_entry(0x100000000ULL
, x86ms
->above_4g_mem_size
, E820_RAM
);
320 fw_cfg
= fw_cfg_init_io_dma(FW_CFG_IO_BASE
, FW_CFG_IO_BASE
+ 4,
321 &address_space_memory
);
323 fw_cfg_add_i16(fw_cfg
, FW_CFG_NB_CPUS
, machine
->smp
.cpus
);
324 fw_cfg_add_i16(fw_cfg
, FW_CFG_MAX_CPUS
, machine
->smp
.max_cpus
);
325 fw_cfg_add_i64(fw_cfg
, FW_CFG_RAM_SIZE
, (uint64_t)machine
->ram_size
);
326 fw_cfg_add_i32(fw_cfg
, FW_CFG_IRQ0_OVERRIDE
, 1);
327 fw_cfg_add_file(fw_cfg
, "etc/e820", e820_table
,
328 sizeof(struct e820_entry
) * e820_get_num_entries());
332 if (machine
->kernel_filename
!= NULL
) {
333 x86_load_linux(x86ms
, fw_cfg
, 0, true, false);
336 if (mms
->option_roms
) {
337 for (i
= 0; i
< nb_option_roms
; i
++) {
338 rom_add_option(option_rom
[i
].name
, option_rom
[i
].bootindex
);
342 x86ms
->fw_cfg
= fw_cfg
;
343 x86ms
->ioapic_as
= &address_space_memory
;
346 static gchar
*microvm_get_mmio_cmdline(gchar
*name
, uint32_t virtio_irq_base
)
353 separator
= g_strrstr(name
, ".");
358 if (qemu_strtol(separator
+ 1, NULL
, 10, &index
) != 0) {
362 cmdline
= g_malloc0(VIRTIO_CMDLINE_MAXLEN
);
363 ret
= g_snprintf(cmdline
, VIRTIO_CMDLINE_MAXLEN
,
364 " virtio_mmio.device=512@0x%lx:%ld",
365 VIRTIO_MMIO_BASE
+ index
* 512,
366 virtio_irq_base
+ index
);
367 if (ret
< 0 || ret
>= VIRTIO_CMDLINE_MAXLEN
) {
375 static void microvm_fix_kernel_cmdline(MachineState
*machine
)
377 X86MachineState
*x86ms
= X86_MACHINE(machine
);
378 MicrovmMachineState
*mms
= MICROVM_MACHINE(machine
);
381 char *cmdline
, *existing_cmdline
;
385 * Find MMIO transports with attached devices, and add them to the kernel
388 * Yes, this is a hack, but one that heavily improves the UX without
389 * introducing any significant issues.
391 existing_cmdline
= fw_cfg_read_bytes_ptr(x86ms
->fw_cfg
, FW_CFG_CMDLINE_DATA
);
392 cmdline
= g_strdup(existing_cmdline
);
393 bus
= sysbus_get_default();
394 QTAILQ_FOREACH(kid
, &bus
->children
, sibling
) {
395 DeviceState
*dev
= kid
->child
;
396 ObjectClass
*class = object_get_class(OBJECT(dev
));
398 if (class == object_class_by_name(TYPE_VIRTIO_MMIO
)) {
399 VirtIOMMIOProxy
*mmio
= VIRTIO_MMIO(OBJECT(dev
));
400 VirtioBusState
*mmio_virtio_bus
= &mmio
->bus
;
401 BusState
*mmio_bus
= &mmio_virtio_bus
->parent_obj
;
403 if (!QTAILQ_EMPTY(&mmio_bus
->children
)) {
404 gchar
*mmio_cmdline
= microvm_get_mmio_cmdline
405 (mmio_bus
->name
, mms
->virtio_irq_base
);
407 char *newcmd
= g_strjoin(NULL
, cmdline
, mmio_cmdline
, NULL
);
408 g_free(mmio_cmdline
);
416 len
= strlen(cmdline
);
417 if (len
> VIRTIO_CMDLINE_TOTAL_MAX_LEN
+ strlen(existing_cmdline
)) {
418 fprintf(stderr
, "qemu: virtio mmio cmdline too large, skipping\n");
420 memcpy(existing_cmdline
, cmdline
, len
+ 1);
425 static void microvm_device_pre_plug_cb(HotplugHandler
*hotplug_dev
,
426 DeviceState
*dev
, Error
**errp
)
428 X86CPU
*cpu
= X86_CPU(dev
);
430 cpu
->host_phys_bits
= true; /* need reliable phys-bits */
431 x86_cpu_pre_plug(hotplug_dev
, dev
, errp
);
434 static void microvm_device_plug_cb(HotplugHandler
*hotplug_dev
,
435 DeviceState
*dev
, Error
**errp
)
437 x86_cpu_plug(hotplug_dev
, dev
, errp
);
440 static void microvm_device_unplug_request_cb(HotplugHandler
*hotplug_dev
,
441 DeviceState
*dev
, Error
**errp
)
443 error_setg(errp
, "unplug not supported by microvm");
446 static void microvm_device_unplug_cb(HotplugHandler
*hotplug_dev
,
447 DeviceState
*dev
, Error
**errp
)
449 error_setg(errp
, "unplug not supported by microvm");
452 static HotplugHandler
*microvm_get_hotplug_handler(MachineState
*machine
,
455 if (object_dynamic_cast(OBJECT(dev
), TYPE_CPU
)) {
456 return HOTPLUG_HANDLER(machine
);
461 static void microvm_machine_state_init(MachineState
*machine
)
463 MicrovmMachineState
*mms
= MICROVM_MACHINE(machine
);
464 X86MachineState
*x86ms
= X86_MACHINE(machine
);
466 microvm_memory_init(mms
);
468 x86_cpus_init(x86ms
, CPU_VERSION_LATEST
);
470 microvm_devices_init(mms
);
473 static void microvm_machine_reset(MachineState
*machine
, ShutdownCause reason
)
475 MicrovmMachineState
*mms
= MICROVM_MACHINE(machine
);
479 if (!x86_machine_is_acpi_enabled(X86_MACHINE(machine
)) &&
480 machine
->kernel_filename
!= NULL
&&
481 mms
->auto_kernel_cmdline
&& !mms
->kernel_cmdline_fixed
) {
482 microvm_fix_kernel_cmdline(machine
);
483 mms
->kernel_cmdline_fixed
= true;
486 qemu_devices_reset(reason
);
491 x86_cpu_after_reset(cpu
);
495 static void microvm_machine_get_rtc(Object
*obj
, Visitor
*v
, const char *name
,
496 void *opaque
, Error
**errp
)
498 MicrovmMachineState
*mms
= MICROVM_MACHINE(obj
);
499 OnOffAuto rtc
= mms
->rtc
;
501 visit_type_OnOffAuto(v
, name
, &rtc
, errp
);
504 static void microvm_machine_set_rtc(Object
*obj
, Visitor
*v
, const char *name
,
505 void *opaque
, Error
**errp
)
507 MicrovmMachineState
*mms
= MICROVM_MACHINE(obj
);
509 visit_type_OnOffAuto(v
, name
, &mms
->rtc
, errp
);
512 static void microvm_machine_get_pcie(Object
*obj
, Visitor
*v
, const char *name
,
513 void *opaque
, Error
**errp
)
515 MicrovmMachineState
*mms
= MICROVM_MACHINE(obj
);
516 OnOffAuto pcie
= mms
->pcie
;
518 visit_type_OnOffAuto(v
, name
, &pcie
, errp
);
521 static void microvm_machine_set_pcie(Object
*obj
, Visitor
*v
, const char *name
,
522 void *opaque
, Error
**errp
)
524 MicrovmMachineState
*mms
= MICROVM_MACHINE(obj
);
526 visit_type_OnOffAuto(v
, name
, &mms
->pcie
, errp
);
529 static void microvm_machine_get_ioapic2(Object
*obj
, Visitor
*v
, const char *name
,
530 void *opaque
, Error
**errp
)
532 MicrovmMachineState
*mms
= MICROVM_MACHINE(obj
);
533 OnOffAuto ioapic2
= mms
->ioapic2
;
535 visit_type_OnOffAuto(v
, name
, &ioapic2
, errp
);
538 static void microvm_machine_set_ioapic2(Object
*obj
, Visitor
*v
, const char *name
,
539 void *opaque
, Error
**errp
)
541 MicrovmMachineState
*mms
= MICROVM_MACHINE(obj
);
543 visit_type_OnOffAuto(v
, name
, &mms
->ioapic2
, errp
);
546 static bool microvm_machine_get_isa_serial(Object
*obj
, Error
**errp
)
548 MicrovmMachineState
*mms
= MICROVM_MACHINE(obj
);
550 return mms
->isa_serial
;
553 static void microvm_machine_set_isa_serial(Object
*obj
, bool value
,
556 MicrovmMachineState
*mms
= MICROVM_MACHINE(obj
);
558 mms
->isa_serial
= value
;
561 static bool microvm_machine_get_option_roms(Object
*obj
, Error
**errp
)
563 MicrovmMachineState
*mms
= MICROVM_MACHINE(obj
);
565 return mms
->option_roms
;
568 static void microvm_machine_set_option_roms(Object
*obj
, bool value
,
571 MicrovmMachineState
*mms
= MICROVM_MACHINE(obj
);
573 mms
->option_roms
= value
;
576 static bool microvm_machine_get_auto_kernel_cmdline(Object
*obj
, Error
**errp
)
578 MicrovmMachineState
*mms
= MICROVM_MACHINE(obj
);
580 return mms
->auto_kernel_cmdline
;
583 static void microvm_machine_set_auto_kernel_cmdline(Object
*obj
, bool value
,
586 MicrovmMachineState
*mms
= MICROVM_MACHINE(obj
);
588 mms
->auto_kernel_cmdline
= value
;
591 static void microvm_machine_done(Notifier
*notifier
, void *data
)
593 MicrovmMachineState
*mms
= container_of(notifier
, MicrovmMachineState
,
596 acpi_setup_microvm(mms
);
597 dt_setup_microvm(mms
);
600 static void microvm_powerdown_req(Notifier
*notifier
, void *data
)
602 MicrovmMachineState
*mms
= container_of(notifier
, MicrovmMachineState
,
604 X86MachineState
*x86ms
= X86_MACHINE(mms
);
606 if (x86ms
->acpi_dev
) {
607 Object
*obj
= OBJECT(x86ms
->acpi_dev
);
608 AcpiDeviceIfClass
*adevc
= ACPI_DEVICE_IF_GET_CLASS(obj
);
609 adevc
->send_event(ACPI_DEVICE_IF(x86ms
->acpi_dev
),
610 ACPI_POWER_DOWN_STATUS
);
614 static void microvm_machine_initfn(Object
*obj
)
616 MicrovmMachineState
*mms
= MICROVM_MACHINE(obj
);
619 mms
->rtc
= ON_OFF_AUTO_AUTO
;
620 mms
->pcie
= ON_OFF_AUTO_AUTO
;
621 mms
->ioapic2
= ON_OFF_AUTO_AUTO
;
622 mms
->isa_serial
= true;
623 mms
->option_roms
= true;
624 mms
->auto_kernel_cmdline
= true;
627 mms
->kernel_cmdline_fixed
= false;
629 mms
->machine_done
.notify
= microvm_machine_done
;
630 qemu_add_machine_init_done_notifier(&mms
->machine_done
);
631 mms
->powerdown_req
.notify
= microvm_powerdown_req
;
632 qemu_register_powerdown_notifier(&mms
->powerdown_req
);
635 GlobalProperty microvm_properties
[] = {
637 * pcie host bridge (gpex) on microvm has no io address window,
638 * so reserving io space is not going to work. Turn it off.
640 { "pcie-root-port", "io-reserve", "0" },
643 static void microvm_class_init(ObjectClass
*oc
, void *data
)
645 X86MachineClass
*x86mc
= X86_MACHINE_CLASS(oc
);
646 MachineClass
*mc
= MACHINE_CLASS(oc
);
647 HotplugHandlerClass
*hc
= HOTPLUG_HANDLER_CLASS(oc
);
649 mc
->init
= microvm_machine_state_init
;
651 mc
->family
= "microvm_i386";
652 mc
->desc
= "microvm (i386)";
653 mc
->units_per_default_bus
= 1;
656 mc
->has_hotpluggable_cpus
= false;
657 mc
->auto_enable_numa_with_memhp
= false;
658 mc
->auto_enable_numa_with_memdev
= false;
659 mc
->default_cpu_type
= TARGET_DEFAULT_CPU_TYPE
;
660 mc
->nvdimm_supported
= false;
661 mc
->default_ram_id
= "microvm.ram";
663 /* Avoid relying too much on kernel components */
664 mc
->default_kernel_irqchip_split
= true;
666 /* Machine class handlers */
667 mc
->reset
= microvm_machine_reset
;
669 /* hotplug (for cpu coldplug) */
670 mc
->get_hotplug_handler
= microvm_get_hotplug_handler
;
671 hc
->pre_plug
= microvm_device_pre_plug_cb
;
672 hc
->plug
= microvm_device_plug_cb
;
673 hc
->unplug_request
= microvm_device_unplug_request_cb
;
674 hc
->unplug
= microvm_device_unplug_cb
;
676 x86mc
->fwcfg_dma_enabled
= true;
678 object_class_property_add(oc
, MICROVM_MACHINE_RTC
, "OnOffAuto",
679 microvm_machine_get_rtc
,
680 microvm_machine_set_rtc
,
682 object_class_property_set_description(oc
, MICROVM_MACHINE_RTC
,
683 "Enable MC146818 RTC");
685 object_class_property_add(oc
, MICROVM_MACHINE_PCIE
, "OnOffAuto",
686 microvm_machine_get_pcie
,
687 microvm_machine_set_pcie
,
689 object_class_property_set_description(oc
, MICROVM_MACHINE_PCIE
,
692 object_class_property_add(oc
, MICROVM_MACHINE_IOAPIC2
, "OnOffAuto",
693 microvm_machine_get_ioapic2
,
694 microvm_machine_set_ioapic2
,
696 object_class_property_set_description(oc
, MICROVM_MACHINE_IOAPIC2
,
697 "Enable second IO-APIC");
699 object_class_property_add_bool(oc
, MICROVM_MACHINE_ISA_SERIAL
,
700 microvm_machine_get_isa_serial
,
701 microvm_machine_set_isa_serial
);
702 object_class_property_set_description(oc
, MICROVM_MACHINE_ISA_SERIAL
,
703 "Set off to disable the instantiation an ISA serial port");
705 object_class_property_add_bool(oc
, MICROVM_MACHINE_OPTION_ROMS
,
706 microvm_machine_get_option_roms
,
707 microvm_machine_set_option_roms
);
708 object_class_property_set_description(oc
, MICROVM_MACHINE_OPTION_ROMS
,
709 "Set off to disable loading option ROMs");
711 object_class_property_add_bool(oc
, MICROVM_MACHINE_AUTO_KERNEL_CMDLINE
,
712 microvm_machine_get_auto_kernel_cmdline
,
713 microvm_machine_set_auto_kernel_cmdline
);
714 object_class_property_set_description(oc
,
715 MICROVM_MACHINE_AUTO_KERNEL_CMDLINE
,
716 "Set off to disable adding virtio-mmio devices to the kernel cmdline");
718 machine_class_allow_dynamic_sysbus_dev(mc
, TYPE_RAMFB_DEVICE
);
720 compat_props_add(mc
->compat_props
, microvm_properties
,
721 G_N_ELEMENTS(microvm_properties
));
724 static const TypeInfo microvm_machine_info
= {
725 .name
= TYPE_MICROVM_MACHINE
,
726 .parent
= TYPE_X86_MACHINE
,
727 .instance_size
= sizeof(MicrovmMachineState
),
728 .instance_init
= microvm_machine_initfn
,
729 .class_size
= sizeof(MicrovmMachineClass
),
730 .class_init
= microvm_class_init
,
731 .interfaces
= (InterfaceInfo
[]) {
732 { TYPE_HOTPLUG_HANDLER
},
737 static void microvm_machine_init(void)
739 type_register_static(µvm_machine_info
);
741 type_init(microvm_machine_init
);