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1 /*
2 * QEMU PowerMac CUDA device support
3 *
4 * Copyright (c) 2004-2007 Fabrice Bellard
5 * Copyright (c) 2007 Jocelyn Mayer
6 *
7 * Permission is hereby granted, free of charge, to any person obtaining a copy
8 * of this software and associated documentation files (the "Software"), to deal
9 * in the Software without restriction, including without limitation the rights
10 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
11 * copies of the Software, and to permit persons to whom the Software is
12 * furnished to do so, subject to the following conditions:
13 *
14 * The above copyright notice and this permission notice shall be included in
15 * all copies or substantial portions of the Software.
16 *
17 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
18 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
19 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
20 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
21 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
22 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
23 * THE SOFTWARE.
24 */
25
26 #include "qemu/osdep.h"
27 #include "qemu-common.h"
28 #include "hw/ppc/mac.h"
29 #include "migration/vmstate.h"
30 #include "hw/input/adb.h"
31 #include "hw/misc/mos6522.h"
32 #include "hw/misc/macio/cuda.h"
33 #include "qemu/timer.h"
34 #include "sysemu/sysemu.h"
35 #include "qemu/cutils.h"
36 #include "qemu/log.h"
37 #include "qemu/module.h"
38 #include "trace.h"
39
40 /* Bits in B data register: all active low */
41 #define TREQ 0x08 /* Transfer request (input) */
42 #define TACK 0x10 /* Transfer acknowledge (output) */
43 #define TIP 0x20 /* Transfer in progress (output) */
44
45 /* commands (1st byte) */
46 #define ADB_PACKET 0
47 #define CUDA_PACKET 1
48 #define ERROR_PACKET 2
49 #define TIMER_PACKET 3
50 #define POWER_PACKET 4
51 #define MACIIC_PACKET 5
52 #define PMU_PACKET 6
53
54 #define CUDA_TIMER_FREQ (4700000 / 6)
55
56 /* CUDA returns time_t's offset from Jan 1, 1904, not 1970 */
57 #define RTC_OFFSET 2082844800
58
59 static void cuda_receive_packet_from_host(CUDAState *s,
60 const uint8_t *data, int len);
61
62 /* MacOS uses timer 1 for calibration on startup, so we use
63 * the timebase frequency and cuda_get_counter_value() with
64 * cuda_get_load_time() to steer MacOS to calculate calibrate its timers
65 * correctly for both TCG and KVM (see commit b981289c49 "PPC: Cuda: Use cuda
66 * timer to expose tbfreq to guest" for more information) */
67
68 static uint64_t cuda_get_counter_value(MOS6522State *s, MOS6522Timer *ti)
69 {
70 MOS6522CUDAState *mcs = container_of(s, MOS6522CUDAState, parent_obj);
71 CUDAState *cs = container_of(mcs, CUDAState, mos6522_cuda);
72
73 /* Reverse of the tb calculation algorithm that Mac OS X uses on bootup */
74 uint64_t tb_diff = muldiv64(qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL),
75 cs->tb_frequency, NANOSECONDS_PER_SECOND) -
76 ti->load_time;
77
78 return (tb_diff * 0xBF401675E5DULL) / (cs->tb_frequency << 24);
79 }
80
81 static uint64_t cuda_get_load_time(MOS6522State *s, MOS6522Timer *ti)
82 {
83 MOS6522CUDAState *mcs = container_of(s, MOS6522CUDAState, parent_obj);
84 CUDAState *cs = container_of(mcs, CUDAState, mos6522_cuda);
85
86 uint64_t load_time = muldiv64(qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL),
87 cs->tb_frequency, NANOSECONDS_PER_SECOND);
88 return load_time;
89 }
90
91 static void cuda_set_sr_int(void *opaque)
92 {
93 CUDAState *s = opaque;
94 MOS6522CUDAState *mcs = &s->mos6522_cuda;
95 MOS6522State *ms = MOS6522(mcs);
96 MOS6522DeviceClass *mdc = MOS6522_DEVICE_GET_CLASS(ms);
97
98 mdc->set_sr_int(ms);
99 }
100
101 static void cuda_delay_set_sr_int(CUDAState *s)
102 {
103 int64_t expire;
104
105 trace_cuda_delay_set_sr_int();
106
107 expire = qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL) + s->sr_delay_ns;
108 timer_mod(s->sr_delay_timer, expire);
109 }
110
111 /* NOTE: TIP and TREQ are negated */
112 static void cuda_update(CUDAState *s)
113 {
114 MOS6522CUDAState *mcs = &s->mos6522_cuda;
115 MOS6522State *ms = MOS6522(mcs);
116 int packet_received, len;
117
118 packet_received = 0;
119 if (!(ms->b & TIP)) {
120 /* transfer requested from host */
121
122 if (ms->acr & SR_OUT) {
123 /* data output */
124 if ((ms->b & (TACK | TIP)) != (s->last_b & (TACK | TIP))) {
125 if (s->data_out_index < sizeof(s->data_out)) {
126 trace_cuda_data_send(ms->sr);
127 s->data_out[s->data_out_index++] = ms->sr;
128 cuda_delay_set_sr_int(s);
129 }
130 }
131 } else {
132 if (s->data_in_index < s->data_in_size) {
133 /* data input */
134 if ((ms->b & (TACK | TIP)) != (s->last_b & (TACK | TIP))) {
135 ms->sr = s->data_in[s->data_in_index++];
136 trace_cuda_data_recv(ms->sr);
137 /* indicate end of transfer */
138 if (s->data_in_index >= s->data_in_size) {
139 ms->b = (ms->b | TREQ);
140 }
141 cuda_delay_set_sr_int(s);
142 }
143 }
144 }
145 } else {
146 /* no transfer requested: handle sync case */
147 if ((s->last_b & TIP) && (ms->b & TACK) != (s->last_b & TACK)) {
148 /* update TREQ state each time TACK change state */
149 if (ms->b & TACK) {
150 ms->b = (ms->b | TREQ);
151 } else {
152 ms->b = (ms->b & ~TREQ);
153 }
154 cuda_delay_set_sr_int(s);
155 } else {
156 if (!(s->last_b & TIP)) {
157 /* handle end of host to cuda transfer */
158 packet_received = (s->data_out_index > 0);
159 /* always an IRQ at the end of transfer */
160 cuda_delay_set_sr_int(s);
161 }
162 /* signal if there is data to read */
163 if (s->data_in_index < s->data_in_size) {
164 ms->b = (ms->b & ~TREQ);
165 }
166 }
167 }
168
169 s->last_acr = ms->acr;
170 s->last_b = ms->b;
171
172 /* NOTE: cuda_receive_packet_from_host() can call cuda_update()
173 recursively */
174 if (packet_received) {
175 len = s->data_out_index;
176 s->data_out_index = 0;
177 cuda_receive_packet_from_host(s, s->data_out, len);
178 }
179 }
180
181 static void cuda_send_packet_to_host(CUDAState *s,
182 const uint8_t *data, int len)
183 {
184 int i;
185
186 trace_cuda_packet_send(len);
187 for (i = 0; i < len; i++) {
188 trace_cuda_packet_send_data(i, data[i]);
189 }
190
191 memcpy(s->data_in, data, len);
192 s->data_in_size = len;
193 s->data_in_index = 0;
194 cuda_update(s);
195 cuda_delay_set_sr_int(s);
196 }
197
198 static void cuda_adb_poll(void *opaque)
199 {
200 CUDAState *s = opaque;
201 uint8_t obuf[ADB_MAX_OUT_LEN + 2];
202 int olen;
203
204 olen = adb_poll(&s->adb_bus, obuf + 2, s->adb_poll_mask);
205 if (olen > 0) {
206 obuf[0] = ADB_PACKET;
207 obuf[1] = 0x40; /* polled data */
208 cuda_send_packet_to_host(s, obuf, olen + 2);
209 }
210 timer_mod(s->adb_poll_timer, qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL) +
211 (NANOSECONDS_PER_SECOND / (1000 / s->autopoll_rate_ms)));
212 }
213
214 /* description of commands */
215 typedef struct CudaCommand {
216 uint8_t command;
217 const char *name;
218 bool (*handler)(CUDAState *s,
219 const uint8_t *in_args, int in_len,
220 uint8_t *out_args, int *out_len);
221 } CudaCommand;
222
223 static bool cuda_cmd_autopoll(CUDAState *s,
224 const uint8_t *in_data, int in_len,
225 uint8_t *out_data, int *out_len)
226 {
227 int autopoll;
228
229 if (in_len != 1) {
230 return false;
231 }
232
233 autopoll = (in_data[0] != 0);
234 if (autopoll != s->autopoll) {
235 s->autopoll = autopoll;
236 if (autopoll) {
237 timer_mod(s->adb_poll_timer,
238 qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL) +
239 (NANOSECONDS_PER_SECOND / (1000 / s->autopoll_rate_ms)));
240 } else {
241 timer_del(s->adb_poll_timer);
242 }
243 }
244 return true;
245 }
246
247 static bool cuda_cmd_set_autorate(CUDAState *s,
248 const uint8_t *in_data, int in_len,
249 uint8_t *out_data, int *out_len)
250 {
251 if (in_len != 1) {
252 return false;
253 }
254
255 /* we don't want a period of 0 ms */
256 /* FIXME: check what real hardware does */
257 if (in_data[0] == 0) {
258 return false;
259 }
260
261 s->autopoll_rate_ms = in_data[0];
262 if (s->autopoll) {
263 timer_mod(s->adb_poll_timer,
264 qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL) +
265 (NANOSECONDS_PER_SECOND / (1000 / s->autopoll_rate_ms)));
266 }
267 return true;
268 }
269
270 static bool cuda_cmd_set_device_list(CUDAState *s,
271 const uint8_t *in_data, int in_len,
272 uint8_t *out_data, int *out_len)
273 {
274 if (in_len != 2) {
275 return false;
276 }
277
278 s->adb_poll_mask = (((uint16_t)in_data[0]) << 8) | in_data[1];
279 return true;
280 }
281
282 static bool cuda_cmd_powerdown(CUDAState *s,
283 const uint8_t *in_data, int in_len,
284 uint8_t *out_data, int *out_len)
285 {
286 if (in_len != 0) {
287 return false;
288 }
289
290 qemu_system_shutdown_request(SHUTDOWN_CAUSE_GUEST_SHUTDOWN);
291 return true;
292 }
293
294 static bool cuda_cmd_reset_system(CUDAState *s,
295 const uint8_t *in_data, int in_len,
296 uint8_t *out_data, int *out_len)
297 {
298 if (in_len != 0) {
299 return false;
300 }
301
302 qemu_system_reset_request(SHUTDOWN_CAUSE_GUEST_RESET);
303 return true;
304 }
305
306 static bool cuda_cmd_set_file_server_flag(CUDAState *s,
307 const uint8_t *in_data, int in_len,
308 uint8_t *out_data, int *out_len)
309 {
310 if (in_len != 1) {
311 return false;
312 }
313
314 qemu_log_mask(LOG_UNIMP,
315 "CUDA: unimplemented command FILE_SERVER_FLAG %d\n",
316 in_data[0]);
317 return true;
318 }
319
320 static bool cuda_cmd_set_power_message(CUDAState *s,
321 const uint8_t *in_data, int in_len,
322 uint8_t *out_data, int *out_len)
323 {
324 if (in_len != 1) {
325 return false;
326 }
327
328 qemu_log_mask(LOG_UNIMP,
329 "CUDA: unimplemented command SET_POWER_MESSAGE %d\n",
330 in_data[0]);
331 return true;
332 }
333
334 static bool cuda_cmd_get_time(CUDAState *s,
335 const uint8_t *in_data, int in_len,
336 uint8_t *out_data, int *out_len)
337 {
338 uint32_t ti;
339
340 if (in_len != 0) {
341 return false;
342 }
343
344 ti = s->tick_offset + (qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL)
345 / NANOSECONDS_PER_SECOND);
346 out_data[0] = ti >> 24;
347 out_data[1] = ti >> 16;
348 out_data[2] = ti >> 8;
349 out_data[3] = ti;
350 *out_len = 4;
351 return true;
352 }
353
354 static bool cuda_cmd_set_time(CUDAState *s,
355 const uint8_t *in_data, int in_len,
356 uint8_t *out_data, int *out_len)
357 {
358 uint32_t ti;
359
360 if (in_len != 4) {
361 return false;
362 }
363
364 ti = (((uint32_t)in_data[0]) << 24) + (((uint32_t)in_data[1]) << 16)
365 + (((uint32_t)in_data[2]) << 8) + in_data[3];
366 s->tick_offset = ti - (qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL)
367 / NANOSECONDS_PER_SECOND);
368 return true;
369 }
370
371 static const CudaCommand handlers[] = {
372 { CUDA_AUTOPOLL, "AUTOPOLL", cuda_cmd_autopoll },
373 { CUDA_SET_AUTO_RATE, "SET_AUTO_RATE", cuda_cmd_set_autorate },
374 { CUDA_SET_DEVICE_LIST, "SET_DEVICE_LIST", cuda_cmd_set_device_list },
375 { CUDA_POWERDOWN, "POWERDOWN", cuda_cmd_powerdown },
376 { CUDA_RESET_SYSTEM, "RESET_SYSTEM", cuda_cmd_reset_system },
377 { CUDA_FILE_SERVER_FLAG, "FILE_SERVER_FLAG",
378 cuda_cmd_set_file_server_flag },
379 { CUDA_SET_POWER_MESSAGES, "SET_POWER_MESSAGES",
380 cuda_cmd_set_power_message },
381 { CUDA_GET_TIME, "GET_TIME", cuda_cmd_get_time },
382 { CUDA_SET_TIME, "SET_TIME", cuda_cmd_set_time },
383 };
384
385 static void cuda_receive_packet(CUDAState *s,
386 const uint8_t *data, int len)
387 {
388 uint8_t obuf[16] = { CUDA_PACKET, 0, data[0] };
389 int i, out_len = 0;
390
391 for (i = 0; i < ARRAY_SIZE(handlers); i++) {
392 const CudaCommand *desc = &handlers[i];
393 if (desc->command == data[0]) {
394 trace_cuda_receive_packet_cmd(desc->name);
395 out_len = 0;
396 if (desc->handler(s, data + 1, len - 1, obuf + 3, &out_len)) {
397 cuda_send_packet_to_host(s, obuf, 3 + out_len);
398 } else {
399 qemu_log_mask(LOG_GUEST_ERROR,
400 "CUDA: %s: wrong parameters %d\n",
401 desc->name, len);
402 obuf[0] = ERROR_PACKET;
403 obuf[1] = 0x5; /* bad parameters */
404 obuf[2] = CUDA_PACKET;
405 obuf[3] = data[0];
406 cuda_send_packet_to_host(s, obuf, 4);
407 }
408 return;
409 }
410 }
411
412 qemu_log_mask(LOG_GUEST_ERROR, "CUDA: unknown command 0x%02x\n", data[0]);
413 obuf[0] = ERROR_PACKET;
414 obuf[1] = 0x2; /* unknown command */
415 obuf[2] = CUDA_PACKET;
416 obuf[3] = data[0];
417 cuda_send_packet_to_host(s, obuf, 4);
418 }
419
420 static void cuda_receive_packet_from_host(CUDAState *s,
421 const uint8_t *data, int len)
422 {
423 int i;
424
425 trace_cuda_packet_receive(len);
426 for (i = 0; i < len; i++) {
427 trace_cuda_packet_receive_data(i, data[i]);
428 }
429
430 switch(data[0]) {
431 case ADB_PACKET:
432 {
433 uint8_t obuf[ADB_MAX_OUT_LEN + 3];
434 int olen;
435 olen = adb_request(&s->adb_bus, obuf + 2, data + 1, len - 1);
436 if (olen > 0) {
437 obuf[0] = ADB_PACKET;
438 obuf[1] = 0x00;
439 cuda_send_packet_to_host(s, obuf, olen + 2);
440 } else {
441 /* error */
442 obuf[0] = ADB_PACKET;
443 obuf[1] = -olen;
444 obuf[2] = data[1];
445 olen = 0;
446 cuda_send_packet_to_host(s, obuf, olen + 3);
447 }
448 }
449 break;
450 case CUDA_PACKET:
451 cuda_receive_packet(s, data + 1, len - 1);
452 break;
453 }
454 }
455
456 static uint64_t mos6522_cuda_read(void *opaque, hwaddr addr, unsigned size)
457 {
458 CUDAState *s = opaque;
459 MOS6522CUDAState *mcs = &s->mos6522_cuda;
460 MOS6522State *ms = MOS6522(mcs);
461
462 addr = (addr >> 9) & 0xf;
463 return mos6522_read(ms, addr, size);
464 }
465
466 static void mos6522_cuda_write(void *opaque, hwaddr addr, uint64_t val,
467 unsigned size)
468 {
469 CUDAState *s = opaque;
470 MOS6522CUDAState *mcs = &s->mos6522_cuda;
471 MOS6522State *ms = MOS6522(mcs);
472
473 addr = (addr >> 9) & 0xf;
474 mos6522_write(ms, addr, val, size);
475 }
476
477 static const MemoryRegionOps mos6522_cuda_ops = {
478 .read = mos6522_cuda_read,
479 .write = mos6522_cuda_write,
480 .endianness = DEVICE_BIG_ENDIAN,
481 .valid = {
482 .min_access_size = 1,
483 .max_access_size = 1,
484 },
485 };
486
487 static const VMStateDescription vmstate_cuda = {
488 .name = "cuda",
489 .version_id = 5,
490 .minimum_version_id = 5,
491 .fields = (VMStateField[]) {
492 VMSTATE_STRUCT(mos6522_cuda.parent_obj, CUDAState, 0, vmstate_mos6522,
493 MOS6522State),
494 VMSTATE_UINT8(last_b, CUDAState),
495 VMSTATE_UINT8(last_acr, CUDAState),
496 VMSTATE_INT32(data_in_size, CUDAState),
497 VMSTATE_INT32(data_in_index, CUDAState),
498 VMSTATE_INT32(data_out_index, CUDAState),
499 VMSTATE_UINT8(autopoll, CUDAState),
500 VMSTATE_UINT8(autopoll_rate_ms, CUDAState),
501 VMSTATE_UINT16(adb_poll_mask, CUDAState),
502 VMSTATE_BUFFER(data_in, CUDAState),
503 VMSTATE_BUFFER(data_out, CUDAState),
504 VMSTATE_UINT32(tick_offset, CUDAState),
505 VMSTATE_TIMER_PTR(adb_poll_timer, CUDAState),
506 VMSTATE_TIMER_PTR(sr_delay_timer, CUDAState),
507 VMSTATE_END_OF_LIST()
508 }
509 };
510
511 static void cuda_reset(DeviceState *dev)
512 {
513 CUDAState *s = CUDA(dev);
514
515 s->data_in_size = 0;
516 s->data_in_index = 0;
517 s->data_out_index = 0;
518 s->autopoll = 0;
519 }
520
521 static void cuda_realize(DeviceState *dev, Error **errp)
522 {
523 CUDAState *s = CUDA(dev);
524 SysBusDevice *sbd;
525 MOS6522State *ms;
526 DeviceState *d;
527 struct tm tm;
528
529 /* Pass IRQ from 6522 */
530 d = DEVICE(&s->mos6522_cuda);
531 ms = MOS6522(d);
532 sbd = SYS_BUS_DEVICE(s);
533 sysbus_pass_irq(sbd, SYS_BUS_DEVICE(ms));
534
535 qemu_get_timedate(&tm, 0);
536 s->tick_offset = (uint32_t)mktimegm(&tm) + RTC_OFFSET;
537
538 s->sr_delay_timer = timer_new_ns(QEMU_CLOCK_VIRTUAL, cuda_set_sr_int, s);
539 s->sr_delay_ns = 20 * SCALE_US;
540
541 s->adb_poll_timer = timer_new_ns(QEMU_CLOCK_VIRTUAL, cuda_adb_poll, s);
542 s->adb_poll_mask = 0xffff;
543 s->autopoll_rate_ms = 20;
544 }
545
546 static void cuda_init(Object *obj)
547 {
548 CUDAState *s = CUDA(obj);
549 SysBusDevice *sbd = SYS_BUS_DEVICE(obj);
550
551 sysbus_init_child_obj(obj, "mos6522-cuda", &s->mos6522_cuda,
552 sizeof(s->mos6522_cuda), TYPE_MOS6522_CUDA);
553
554 memory_region_init_io(&s->mem, obj, &mos6522_cuda_ops, s, "cuda", 0x2000);
555 sysbus_init_mmio(sbd, &s->mem);
556
557 qbus_create_inplace(&s->adb_bus, sizeof(s->adb_bus), TYPE_ADB_BUS,
558 DEVICE(obj), "adb.0");
559 }
560
561 static Property cuda_properties[] = {
562 DEFINE_PROP_UINT64("timebase-frequency", CUDAState, tb_frequency, 0),
563 DEFINE_PROP_END_OF_LIST()
564 };
565
566 static void cuda_class_init(ObjectClass *oc, void *data)
567 {
568 DeviceClass *dc = DEVICE_CLASS(oc);
569
570 dc->realize = cuda_realize;
571 dc->reset = cuda_reset;
572 dc->vmsd = &vmstate_cuda;
573 dc->props = cuda_properties;
574 set_bit(DEVICE_CATEGORY_BRIDGE, dc->categories);
575 }
576
577 static const TypeInfo cuda_type_info = {
578 .name = TYPE_CUDA,
579 .parent = TYPE_SYS_BUS_DEVICE,
580 .instance_size = sizeof(CUDAState),
581 .instance_init = cuda_init,
582 .class_init = cuda_class_init,
583 };
584
585 static void mos6522_cuda_portB_write(MOS6522State *s)
586 {
587 MOS6522CUDAState *mcs = container_of(s, MOS6522CUDAState, parent_obj);
588 CUDAState *cs = container_of(mcs, CUDAState, mos6522_cuda);
589
590 cuda_update(cs);
591 }
592
593 static void mos6522_cuda_reset(DeviceState *dev)
594 {
595 MOS6522State *ms = MOS6522(dev);
596 MOS6522DeviceClass *mdc = MOS6522_DEVICE_GET_CLASS(ms);
597
598 mdc->parent_reset(dev);
599
600 ms->timers[0].frequency = CUDA_TIMER_FREQ;
601 ms->timers[1].frequency = (SCALE_US * 6000) / 4700;
602 }
603
604 static void mos6522_cuda_class_init(ObjectClass *oc, void *data)
605 {
606 DeviceClass *dc = DEVICE_CLASS(oc);
607 MOS6522DeviceClass *mdc = MOS6522_DEVICE_CLASS(oc);
608
609 dc->reset = mos6522_cuda_reset;
610 mdc->portB_write = mos6522_cuda_portB_write;
611 mdc->get_timer1_counter_value = cuda_get_counter_value;
612 mdc->get_timer2_counter_value = cuda_get_counter_value;
613 mdc->get_timer1_load_time = cuda_get_load_time;
614 mdc->get_timer2_load_time = cuda_get_load_time;
615 }
616
617 static const TypeInfo mos6522_cuda_type_info = {
618 .name = TYPE_MOS6522_CUDA,
619 .parent = TYPE_MOS6522,
620 .instance_size = sizeof(MOS6522CUDAState),
621 .class_init = mos6522_cuda_class_init,
622 };
623
624 static void cuda_register_types(void)
625 {
626 type_register_static(&mos6522_cuda_type_info);
627 type_register_static(&cuda_type_info);
628 }
629
630 type_init(cuda_register_types)