hw/nvram/fw_cfg.c

   1 /*
   2  * QEMU Firmware configuration device emulation
   3  *
   4  * Copyright (c) 2008 Gleb Natapov
   5  *
   6  * Permission is hereby granted, free of charge, to any person obtaining a copy
   7  * of this software and associated documentation files (the "Software"), to deal
   8  * in the Software without restriction, including without limitation the rights
   9  * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
  10  * copies of the Software, and to permit persons to whom the Software is
  11  * furnished to do so, subject to the following conditions:
  12  *
  13  * The above copyright notice and this permission notice shall be included in
  14  * all copies or substantial portions of the Software.
  15  *
  16  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  17  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  18  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
  19  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  20  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
  21  * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
  22  * THE SOFTWARE.
  23  */
  24 #include "qemu/osdep.h"
  25 #include "hw/hw.h"
  26 #include "sysemu/sysemu.h"
  27 #include "sysemu/dma.h"
  28 #include "hw/isa/isa.h"
  29 #include "hw/nvram/fw_cfg.h"
  30 #include "hw/sysbus.h"
  31 #include "trace.h"
  32 #include "qemu/error-report.h"
  33 #include "qemu/config-file.h"
  34
  35 #define FW_CFG_CTL_SIZE 2
  36 #define FW_CFG_NAME "fw_cfg"
  37 #define FW_CFG_PATH "/machine/" FW_CFG_NAME
  38
  39 #define TYPE_FW_CFG     "fw_cfg"
  40 #define TYPE_FW_CFG_IO  "fw_cfg_io"
  41 #define TYPE_FW_CFG_MEM "fw_cfg_mem"
  42
  43 #define FW_CFG(obj)     OBJECT_CHECK(FWCfgState,    (obj), TYPE_FW_CFG)
  44 #define FW_CFG_IO(obj)  OBJECT_CHECK(FWCfgIoState,  (obj), TYPE_FW_CFG_IO)
  45 #define FW_CFG_MEM(obj) OBJECT_CHECK(FWCfgMemState, (obj), TYPE_FW_CFG_MEM)
  46
  47 /* FW_CFG_VERSION bits */
  48 #define FW_CFG_VERSION      0x01
  49 #define FW_CFG_VERSION_DMA  0x02
  50
  51 /* FW_CFG_DMA_CONTROL bits */
  52 #define FW_CFG_DMA_CTL_ERROR   0x01
  53 #define FW_CFG_DMA_CTL_READ    0x02
  54 #define FW_CFG_DMA_CTL_SKIP    0x04
  55 #define FW_CFG_DMA_CTL_SELECT  0x08
  56
  57 #define FW_CFG_DMA_SIGNATURE 0x51454d5520434647ULL /* "QEMU CFG" */
  58
  59 typedef struct FWCfgEntry {
  60     uint32_t len;
  61     uint8_t *data;
  62     void *callback_opaque;
  63     FWCfgReadCallback read_callback;
  64 } FWCfgEntry;
  65
  66 struct FWCfgState {
  67     /*< private >*/
  68     SysBusDevice parent_obj;
  69     /*< public >*/
  70
  71     FWCfgEntry entries[2][FW_CFG_MAX_ENTRY];
  72     FWCfgFiles *files;
  73     uint16_t cur_entry;
  74     uint32_t cur_offset;
  75     Notifier machine_ready;
  76
  77     bool dma_enabled;
  78     dma_addr_t dma_addr;
  79     AddressSpace *dma_as;
  80     MemoryRegion dma_iomem;
  81 };
  82
  83 struct FWCfgIoState {
  84     /*< private >*/
  85     FWCfgState parent_obj;
  86     /*< public >*/
  87
  88     MemoryRegion comb_iomem;
  89     uint32_t iobase, dma_iobase;
  90 };
  91
  92 struct FWCfgMemState {
  93     /*< private >*/
  94     FWCfgState parent_obj;
  95     /*< public >*/
  96
  97     MemoryRegion ctl_iomem, data_iomem;
  98     uint32_t data_width;
  99     MemoryRegionOps wide_data_ops;
 100 };
 101
 102 #define JPG_FILE 0
 103 #define BMP_FILE 1
 104
 105 static char *read_splashfile(char *filename, gsize *file_sizep,
 106                              int *file_typep)
 107 {
 108     GError *err = NULL;
 109     gboolean res;
 110     gchar *content;
 111     int file_type;
 112     unsigned int filehead;
 113     int bmp_bpp;
 114
 115     res = g_file_get_contents(filename, &content, file_sizep, &err);
 116     if (res == FALSE) {
 117         error_report("failed to read splash file '%s'", filename);
 118         g_error_free(err);
 119         return NULL;
 120     }
 121
 122     /* check file size */
 123     if (*file_sizep < 30) {
 124         goto error;
 125     }
 126
 127     /* check magic ID */
 128     filehead = ((content[0] & 0xff) + (content[1] << 8)) & 0xffff;
 129     if (filehead == 0xd8ff) {
 130         file_type = JPG_FILE;
 131     } else if (filehead == 0x4d42) {
 132         file_type = BMP_FILE;
 133     } else {
 134         goto error;
 135     }
 136
 137     /* check BMP bpp */
 138     if (file_type == BMP_FILE) {
 139         bmp_bpp = (content[28] + (content[29] << 8)) & 0xffff;
 140         if (bmp_bpp != 24) {
 141             goto error;
 142         }
 143     }
 144
 145     /* return values */
 146     *file_typep = file_type;
 147
 148     return content;
 149
 150 error:
 151     error_report("splash file '%s' format not recognized; must be JPEG "
 152                  "or 24 bit BMP", filename);
 153     g_free(content);
 154     return NULL;
 155 }
 156
 157 static void fw_cfg_bootsplash(FWCfgState *s)
 158 {
 159     int boot_splash_time = -1;
 160     const char *boot_splash_filename = NULL;
 161     char *p;
 162     char *filename, *file_data;
 163     gsize file_size;
 164     int file_type;
 165     const char *temp;
 166
 167     /* get user configuration */
 168     QemuOptsList *plist = qemu_find_opts("boot-opts");
 169     QemuOpts *opts = QTAILQ_FIRST(&plist->head);
 170     if (opts != NULL) {
 171         temp = qemu_opt_get(opts, "splash");
 172         if (temp != NULL) {
 173             boot_splash_filename = temp;
 174         }
 175         temp = qemu_opt_get(opts, "splash-time");
 176         if (temp != NULL) {
 177             p = (char *)temp;
 178             boot_splash_time = strtol(p, (char **)&p, 10);
 179         }
 180     }
 181
 182     /* insert splash time if user configurated */
 183     if (boot_splash_time >= 0) {
 184         /* validate the input */
 185         if (boot_splash_time > 0xffff) {
 186             error_report("splash time is big than 65535, force it to 65535.");
 187             boot_splash_time = 0xffff;
 188         }
 189         /* use little endian format */
 190         qemu_extra_params_fw[0] = (uint8_t)(boot_splash_time & 0xff);
 191         qemu_extra_params_fw[1] = (uint8_t)((boot_splash_time >> 8) & 0xff);
 192         fw_cfg_add_file(s, "etc/boot-menu-wait", qemu_extra_params_fw, 2);
 193     }
 194
 195     /* insert splash file if user configurated */
 196     if (boot_splash_filename != NULL) {
 197         filename = qemu_find_file(QEMU_FILE_TYPE_BIOS, boot_splash_filename);
 198         if (filename == NULL) {
 199             error_report("failed to find file '%s'.", boot_splash_filename);
 200             return;
 201         }
 202
 203         /* loading file data */
 204         file_data = read_splashfile(filename, &file_size, &file_type);
 205         if (file_data == NULL) {
 206             g_free(filename);
 207             return;
 208         }
 209         g_free(boot_splash_filedata);
 210         boot_splash_filedata = (uint8_t *)file_data;
 211         boot_splash_filedata_size = file_size;
 212
 213         /* insert data */
 214         if (file_type == JPG_FILE) {
 215             fw_cfg_add_file(s, "bootsplash.jpg",
 216                     boot_splash_filedata, boot_splash_filedata_size);
 217         } else {
 218             fw_cfg_add_file(s, "bootsplash.bmp",
 219                     boot_splash_filedata, boot_splash_filedata_size);
 220         }
 221         g_free(filename);
 222     }
 223 }
 224
 225 static void fw_cfg_reboot(FWCfgState *s)
 226 {
 227     int reboot_timeout = -1;
 228     char *p;
 229     const char *temp;
 230
 231     /* get user configuration */
 232     QemuOptsList *plist = qemu_find_opts("boot-opts");
 233     QemuOpts *opts = QTAILQ_FIRST(&plist->head);
 234     if (opts != NULL) {
 235         temp = qemu_opt_get(opts, "reboot-timeout");
 236         if (temp != NULL) {
 237             p = (char *)temp;
 238             reboot_timeout = strtol(p, (char **)&p, 10);
 239         }
 240     }
 241     /* validate the input */
 242     if (reboot_timeout > 0xffff) {
 243         error_report("reboot timeout is larger than 65535, force it to 65535.");
 244         reboot_timeout = 0xffff;
 245     }
 246     fw_cfg_add_file(s, "etc/boot-fail-wait", g_memdup(&reboot_timeout, 4), 4);
 247 }
 248
 249 static void fw_cfg_write(FWCfgState *s, uint8_t value)
 250 {
 251     /* nothing, write support removed in QEMU v2.4+ */
 252 }
 253
 254 static int fw_cfg_select(FWCfgState *s, uint16_t key)
 255 {
 256     int arch, ret;
 257     FWCfgEntry *e;
 258
 259     s->cur_offset = 0;
 260     if ((key & FW_CFG_ENTRY_MASK) >= FW_CFG_MAX_ENTRY) {
 261         s->cur_entry = FW_CFG_INVALID;
 262         ret = 0;
 263     } else {
 264         s->cur_entry = key;
 265         ret = 1;
 266         /* entry successfully selected, now run callback if present */
 267         arch = !!(key & FW_CFG_ARCH_LOCAL);
 268         e = &s->entries[arch][key & FW_CFG_ENTRY_MASK];
 269         if (e->read_callback) {
 270             e->read_callback(e->callback_opaque);
 271         }
 272     }
 273
 274     trace_fw_cfg_select(s, key, ret);
 275     return ret;
 276 }
 277
 278 static uint64_t fw_cfg_data_read(void *opaque, hwaddr addr, unsigned size)
 279 {
 280     FWCfgState *s = opaque;
 281     int arch = !!(s->cur_entry & FW_CFG_ARCH_LOCAL);
 282     FWCfgEntry *e = (s->cur_entry == FW_CFG_INVALID) ? NULL :
 283                     &s->entries[arch][s->cur_entry & FW_CFG_ENTRY_MASK];
 284     uint64_t value = 0;
 285
 286     assert(size > 0 && size <= sizeof(value));
 287     if (s->cur_entry != FW_CFG_INVALID && e->data && s->cur_offset < e->len) {
 288         /* The least significant 'size' bytes of the return value are
 289          * expected to contain a string preserving portion of the item
 290          * data, padded with zeros on the right in case we run out early.
 291          * In technical terms, we're composing the host-endian representation
 292          * of the big endian interpretation of the fw_cfg string.
 293          */
 294         do {
 295             value = (value << 8) | e->data[s->cur_offset++];
 296         } while (--size && s->cur_offset < e->len);
 297         /* If size is still not zero, we *did* run out early, so continue
 298          * left-shifting, to add the appropriate number of padding zeros
 299          * on the right.
 300          */
 301         value <<= 8 * size;
 302     }
 303
 304     trace_fw_cfg_read(s, value);
 305     return value;
 306 }
 307
 308 static void fw_cfg_data_mem_write(void *opaque, hwaddr addr,
 309                                   uint64_t value, unsigned size)
 310 {
 311     FWCfgState *s = opaque;
 312     unsigned i = size;
 313
 314     do {
 315         fw_cfg_write(s, value >> (8 * --i));
 316     } while (i);
 317 }
 318
 319 static void fw_cfg_dma_transfer(FWCfgState *s)
 320 {
 321     dma_addr_t len;
 322     FWCfgDmaAccess dma;
 323     int arch;
 324     FWCfgEntry *e;
 325     int read;
 326     dma_addr_t dma_addr;
 327
 328     /* Reset the address before the next access */
 329     dma_addr = s->dma_addr;
 330     s->dma_addr = 0;
 331
 332     if (dma_memory_read(s->dma_as, dma_addr, &dma, sizeof(dma))) {
 333         stl_be_dma(s->dma_as, dma_addr + offsetof(FWCfgDmaAccess, control),
 334                    FW_CFG_DMA_CTL_ERROR);
 335         return;
 336     }
 337
 338     dma.address = be64_to_cpu(dma.address);
 339     dma.length = be32_to_cpu(dma.length);
 340     dma.control = be32_to_cpu(dma.control);
 341
 342     if (dma.control & FW_CFG_DMA_CTL_SELECT) {
 343         fw_cfg_select(s, dma.control >> 16);
 344     }
 345
 346     arch = !!(s->cur_entry & FW_CFG_ARCH_LOCAL);
 347     e = (s->cur_entry == FW_CFG_INVALID) ? NULL :
 348         &s->entries[arch][s->cur_entry & FW_CFG_ENTRY_MASK];
 349
 350     if (dma.control & FW_CFG_DMA_CTL_READ) {
 351         read = 1;
 352     } else if (dma.control & FW_CFG_DMA_CTL_SKIP) {
 353         read = 0;
 354     } else {
 355         dma.length = 0;
 356     }
 357
 358     dma.control = 0;
 359
 360     while (dma.length > 0 && !(dma.control & FW_CFG_DMA_CTL_ERROR)) {
 361         if (s->cur_entry == FW_CFG_INVALID || !e->data ||
 362                                 s->cur_offset >= e->len) {
 363             len = dma.length;
 364
 365             /* If the access is not a read access, it will be a skip access,
 366              * tested before.
 367              */
 368             if (read) {
 369                 if (dma_memory_set(s->dma_as, dma.address, 0, len)) {
 370                     dma.control |= FW_CFG_DMA_CTL_ERROR;
 371                 }
 372             }
 373
 374         } else {
 375             if (dma.length <= (e->len - s->cur_offset)) {
 376                 len = dma.length;
 377             } else {
 378                 len = (e->len - s->cur_offset);
 379             }
 380
 381             /* If the access is not a read access, it will be a skip access,
 382              * tested before.
 383              */
 384             if (read) {
 385                 if (dma_memory_write(s->dma_as, dma.address,
 386                                     &e->data[s->cur_offset], len)) {
 387                     dma.control |= FW_CFG_DMA_CTL_ERROR;
 388                 }
 389             }
 390
 391             s->cur_offset += len;
 392         }
 393
 394         dma.address += len;
 395         dma.length  -= len;
 396
 397     }
 398
 399     stl_be_dma(s->dma_as, dma_addr + offsetof(FWCfgDmaAccess, control),
 400                 dma.control);
 401
 402     trace_fw_cfg_read(s, 0);
 403 }
 404
 405 static uint64_t fw_cfg_dma_mem_read(void *opaque, hwaddr addr,
 406                                     unsigned size)
 407 {
 408     /* Return a signature value (and handle various read sizes) */
 409     return extract64(FW_CFG_DMA_SIGNATURE, (8 - addr - size) * 8, size * 8);
 410 }
 411
 412 static void fw_cfg_dma_mem_write(void *opaque, hwaddr addr,
 413                                  uint64_t value, unsigned size)
 414 {
 415     FWCfgState *s = opaque;
 416
 417     if (size == 4) {
 418         if (addr == 0) {
 419             /* FWCfgDmaAccess high address */
 420             s->dma_addr = value << 32;
 421         } else if (addr == 4) {
 422             /* FWCfgDmaAccess low address */
 423             s->dma_addr |= value;
 424             fw_cfg_dma_transfer(s);
 425         }
 426     } else if (size == 8 && addr == 0) {
 427         s->dma_addr = value;
 428         fw_cfg_dma_transfer(s);
 429     }
 430 }
 431
 432 static bool fw_cfg_dma_mem_valid(void *opaque, hwaddr addr,
 433                                   unsigned size, bool is_write)
 434 {
 435     return !is_write || ((size == 4 && (addr == 0 || addr == 4)) ||
 436                          (size == 8 && addr == 0));
 437 }
 438
 439 static bool fw_cfg_data_mem_valid(void *opaque, hwaddr addr,
 440                                   unsigned size, bool is_write)
 441 {
 442     return addr == 0;
 443 }
 444
 445 static void fw_cfg_ctl_mem_write(void *opaque, hwaddr addr,
 446                                  uint64_t value, unsigned size)
 447 {
 448     fw_cfg_select(opaque, (uint16_t)value);
 449 }
 450
 451 static bool fw_cfg_ctl_mem_valid(void *opaque, hwaddr addr,
 452                                  unsigned size, bool is_write)
 453 {
 454     return is_write && size == 2;
 455 }
 456
 457 static void fw_cfg_comb_write(void *opaque, hwaddr addr,
 458                               uint64_t value, unsigned size)
 459 {
 460     switch (size) {
 461     case 1:
 462         fw_cfg_write(opaque, (uint8_t)value);
 463         break;
 464     case 2:
 465         fw_cfg_select(opaque, (uint16_t)value);
 466         break;
 467     }
 468 }
 469
 470 static bool fw_cfg_comb_valid(void *opaque, hwaddr addr,
 471                                   unsigned size, bool is_write)
 472 {
 473     return (size == 1) || (is_write && size == 2);
 474 }
 475
 476 static const MemoryRegionOps fw_cfg_ctl_mem_ops = {
 477     .write = fw_cfg_ctl_mem_write,
 478     .endianness = DEVICE_BIG_ENDIAN,
 479     .valid.accepts = fw_cfg_ctl_mem_valid,
 480 };
 481
 482 static const MemoryRegionOps fw_cfg_data_mem_ops = {
 483     .read = fw_cfg_data_read,
 484     .write = fw_cfg_data_mem_write,
 485     .endianness = DEVICE_BIG_ENDIAN,
 486     .valid = {
 487         .min_access_size = 1,
 488         .max_access_size = 1,
 489         .accepts = fw_cfg_data_mem_valid,
 490     },
 491 };
 492
 493 static const MemoryRegionOps fw_cfg_comb_mem_ops = {
 494     .read = fw_cfg_data_read,
 495     .write = fw_cfg_comb_write,
 496     .endianness = DEVICE_LITTLE_ENDIAN,
 497     .valid.accepts = fw_cfg_comb_valid,
 498 };
 499
 500 static const MemoryRegionOps fw_cfg_dma_mem_ops = {
 501     .read = fw_cfg_dma_mem_read,
 502     .write = fw_cfg_dma_mem_write,
 503     .endianness = DEVICE_BIG_ENDIAN,
 504     .valid.accepts = fw_cfg_dma_mem_valid,
 505     .valid.max_access_size = 8,
 506     .impl.max_access_size = 8,
 507 };
 508
 509 static void fw_cfg_reset(DeviceState *d)
 510 {
 511     FWCfgState *s = FW_CFG(d);
 512
 513     /* we never register a read callback for FW_CFG_SIGNATURE */
 514     fw_cfg_select(s, FW_CFG_SIGNATURE);
 515 }
 516
 517 /* Save restore 32 bit int as uint16_t
 518    This is a Big hack, but it is how the old state did it.
 519    Or we broke compatibility in the state, or we can't use struct tm
 520  */
 521
 522 static int get_uint32_as_uint16(QEMUFile *f, void *pv, size_t size)
 523 {
 524     uint32_t *v = pv;
 525     *v = qemu_get_be16(f);
 526     return 0;
 527 }
 528
 529 static void put_unused(QEMUFile *f, void *pv, size_t size)
 530 {
 531     fprintf(stderr, "uint32_as_uint16 is only used for backward compatibility.\n");
 532     fprintf(stderr, "This functions shouldn't be called.\n");
 533 }
 534
 535 static const VMStateInfo vmstate_hack_uint32_as_uint16 = {
 536     .name = "int32_as_uint16",
 537     .get  = get_uint32_as_uint16,
 538     .put  = put_unused,
 539 };
 540
 541 #define VMSTATE_UINT16_HACK(_f, _s, _t)                                    \
 542     VMSTATE_SINGLE_TEST(_f, _s, _t, 0, vmstate_hack_uint32_as_uint16, uint32_t)
 543
 544
 545 static bool is_version_1(void *opaque, int version_id)
 546 {
 547     return version_id == 1;
 548 }
 549
 550 static bool fw_cfg_dma_enabled(void *opaque)
 551 {
 552     FWCfgState *s = opaque;
 553
 554     return s->dma_enabled;
 555 }
 556
 557 static const VMStateDescription vmstate_fw_cfg_dma = {
 558     .name = "fw_cfg/dma",
 559     .needed = fw_cfg_dma_enabled,
 560     .fields = (VMStateField[]) {
 561         VMSTATE_UINT64(dma_addr, FWCfgState),
 562         VMSTATE_END_OF_LIST()
 563     },
 564 };
 565
 566 static const VMStateDescription vmstate_fw_cfg = {
 567     .name = "fw_cfg",
 568     .version_id = 2,
 569     .minimum_version_id = 1,
 570     .fields = (VMStateField[]) {
 571         VMSTATE_UINT16(cur_entry, FWCfgState),
 572         VMSTATE_UINT16_HACK(cur_offset, FWCfgState, is_version_1),
 573         VMSTATE_UINT32_V(cur_offset, FWCfgState, 2),
 574         VMSTATE_END_OF_LIST()
 575     },
 576     .subsections = (const VMStateDescription*[]) {
 577         &vmstate_fw_cfg_dma,
 578         NULL,
 579     }
 580 };
 581
 582 static void fw_cfg_add_bytes_read_callback(FWCfgState *s, uint16_t key,
 583                                            FWCfgReadCallback callback,
 584                                            void *callback_opaque,
 585                                            void *data, size_t len)
 586 {
 587     int arch = !!(key & FW_CFG_ARCH_LOCAL);
 588
 589     key &= FW_CFG_ENTRY_MASK;
 590
 591     assert(key < FW_CFG_MAX_ENTRY && len < UINT32_MAX);
 592     assert(s->entries[arch][key].data == NULL); /* avoid key conflict */
 593
 594     s->entries[arch][key].data = data;
 595     s->entries[arch][key].len = (uint32_t)len;
 596     s->entries[arch][key].read_callback = callback;
 597     s->entries[arch][key].callback_opaque = callback_opaque;
 598 }
 599
 600 static void *fw_cfg_modify_bytes_read(FWCfgState *s, uint16_t key,
 601                                               void *data, size_t len)
 602 {
 603     void *ptr;
 604     int arch = !!(key & FW_CFG_ARCH_LOCAL);
 605
 606     key &= FW_CFG_ENTRY_MASK;
 607
 608     assert(key < FW_CFG_MAX_ENTRY && len < UINT32_MAX);
 609
 610     /* return the old data to the function caller, avoid memory leak */
 611     ptr = s->entries[arch][key].data;
 612     s->entries[arch][key].data = data;
 613     s->entries[arch][key].len = len;
 614     s->entries[arch][key].callback_opaque = NULL;
 615
 616     return ptr;
 617 }
 618
 619 void fw_cfg_add_bytes(FWCfgState *s, uint16_t key, void *data, size_t len)
 620 {
 621     fw_cfg_add_bytes_read_callback(s, key, NULL, NULL, data, len);
 622 }
 623
 624 void fw_cfg_add_string(FWCfgState *s, uint16_t key, const char *value)
 625 {
 626     size_t sz = strlen(value) + 1;
 627
 628     fw_cfg_add_bytes(s, key, g_memdup(value, sz), sz);
 629 }
 630
 631 void fw_cfg_add_i16(FWCfgState *s, uint16_t key, uint16_t value)
 632 {
 633     uint16_t *copy;
 634
 635     copy = g_malloc(sizeof(value));
 636     *copy = cpu_to_le16(value);
 637     fw_cfg_add_bytes(s, key, copy, sizeof(value));
 638 }
 639
 640 void fw_cfg_modify_i16(FWCfgState *s, uint16_t key, uint16_t value)
 641 {
 642     uint16_t *copy, *old;
 643
 644     copy = g_malloc(sizeof(value));
 645     *copy = cpu_to_le16(value);
 646     old = fw_cfg_modify_bytes_read(s, key, copy, sizeof(value));
 647     g_free(old);
 648 }
 649
 650 void fw_cfg_add_i32(FWCfgState *s, uint16_t key, uint32_t value)
 651 {
 652     uint32_t *copy;
 653
 654     copy = g_malloc(sizeof(value));
 655     *copy = cpu_to_le32(value);
 656     fw_cfg_add_bytes(s, key, copy, sizeof(value));
 657 }
 658
 659 void fw_cfg_add_i64(FWCfgState *s, uint16_t key, uint64_t value)
 660 {
 661     uint64_t *copy;
 662
 663     copy = g_malloc(sizeof(value));
 664     *copy = cpu_to_le64(value);
 665     fw_cfg_add_bytes(s, key, copy, sizeof(value));
 666 }
 667
 668 void fw_cfg_add_file_callback(FWCfgState *s,  const char *filename,
 669                               FWCfgReadCallback callback, void *callback_opaque,
 670                               void *data, size_t len)
 671 {
 672     int i, index;
 673     size_t dsize;
 674
 675     if (!s->files) {
 676         dsize = sizeof(uint32_t) + sizeof(FWCfgFile) * FW_CFG_FILE_SLOTS;
 677         s->files = g_malloc0(dsize);
 678         fw_cfg_add_bytes(s, FW_CFG_FILE_DIR, s->files, dsize);
 679     }
 680
 681     index = be32_to_cpu(s->files->count);
 682     assert(index < FW_CFG_FILE_SLOTS);
 683
 684     pstrcpy(s->files->f[index].name, sizeof(s->files->f[index].name),
 685             filename);
 686     for (i = 0; i < index; i++) {
 687         if (strcmp(s->files->f[index].name, s->files->f[i].name) == 0) {
 688             error_report("duplicate fw_cfg file name: %s",
 689                          s->files->f[index].name);
 690             exit(1);
 691         }
 692     }
 693
 694     fw_cfg_add_bytes_read_callback(s, FW_CFG_FILE_FIRST + index,
 695                                    callback, callback_opaque, data, len);
 696
 697     s->files->f[index].size   = cpu_to_be32(len);
 698     s->files->f[index].select = cpu_to_be16(FW_CFG_FILE_FIRST + index);
 699     trace_fw_cfg_add_file(s, index, s->files->f[index].name, len);
 700
 701     s->files->count = cpu_to_be32(index+1);
 702 }
 703
 704 void fw_cfg_add_file(FWCfgState *s,  const char *filename,
 705                      void *data, size_t len)
 706 {
 707     fw_cfg_add_file_callback(s, filename, NULL, NULL, data, len);
 708 }
 709
 710 void *fw_cfg_modify_file(FWCfgState *s, const char *filename,
 711                         void *data, size_t len)
 712 {
 713     int i, index;
 714     void *ptr = NULL;
 715
 716     assert(s->files);
 717
 718     index = be32_to_cpu(s->files->count);
 719     assert(index < FW_CFG_FILE_SLOTS);
 720
 721     for (i = 0; i < index; i++) {
 722         if (strcmp(filename, s->files->f[i].name) == 0) {
 723             ptr = fw_cfg_modify_bytes_read(s, FW_CFG_FILE_FIRST + i,
 724                                            data, len);
 725             s->files->f[i].size   = cpu_to_be32(len);
 726             return ptr;
 727         }
 728     }
 729     /* add new one */
 730     fw_cfg_add_file_callback(s, filename, NULL, NULL, data, len);
 731     return NULL;
 732 }
 733
 734 static void fw_cfg_machine_reset(void *opaque)
 735 {
 736     void *ptr;
 737     size_t len;
 738     FWCfgState *s = opaque;
 739     char *bootindex = get_boot_devices_list(&len, false);
 740
 741     ptr = fw_cfg_modify_file(s, "bootorder", (uint8_t *)bootindex, len);
 742     g_free(ptr);
 743 }
 744
 745 static void fw_cfg_machine_ready(struct Notifier *n, void *data)
 746 {
 747     FWCfgState *s = container_of(n, FWCfgState, machine_ready);
 748     qemu_register_reset(fw_cfg_machine_reset, s);
 749 }
 750
 751
 752
 753 static void fw_cfg_init1(DeviceState *dev)
 754 {
 755     FWCfgState *s = FW_CFG(dev);
 756
 757     assert(!object_resolve_path(FW_CFG_PATH, NULL));
 758
 759     object_property_add_child(qdev_get_machine(), FW_CFG_NAME, OBJECT(s), NULL);
 760
 761     qdev_init_nofail(dev);
 762
 763     fw_cfg_add_bytes(s, FW_CFG_SIGNATURE, (char *)"QEMU", 4);
 764     fw_cfg_add_bytes(s, FW_CFG_UUID, qemu_uuid, 16);
 765     fw_cfg_add_i16(s, FW_CFG_NOGRAPHIC, (uint16_t)(display_type == DT_NOGRAPHIC));
 766     fw_cfg_add_i16(s, FW_CFG_NB_CPUS, (uint16_t)smp_cpus);
 767     fw_cfg_add_i16(s, FW_CFG_BOOT_MENU, (uint16_t)boot_menu);
 768     fw_cfg_bootsplash(s);
 769     fw_cfg_reboot(s);
 770
 771     s->machine_ready.notify = fw_cfg_machine_ready;
 772     qemu_add_machine_init_done_notifier(&s->machine_ready);
 773 }
 774
 775 FWCfgState *fw_cfg_init_io_dma(uint32_t iobase, uint32_t dma_iobase,
 776                                 AddressSpace *dma_as)
 777 {
 778     DeviceState *dev;
 779     FWCfgState *s;
 780     uint32_t version = FW_CFG_VERSION;
 781     bool dma_enabled = dma_iobase && dma_as;
 782
 783     dev = qdev_create(NULL, TYPE_FW_CFG_IO);
 784     qdev_prop_set_uint32(dev, "iobase", iobase);
 785     qdev_prop_set_uint32(dev, "dma_iobase", dma_iobase);
 786     qdev_prop_set_bit(dev, "dma_enabled", dma_enabled);
 787
 788     fw_cfg_init1(dev);
 789     s = FW_CFG(dev);
 790
 791     if (dma_enabled) {
 792         /* 64 bits for the address field */
 793         s->dma_as = dma_as;
 794         s->dma_addr = 0;
 795
 796         version |= FW_CFG_VERSION_DMA;
 797     }
 798
 799     fw_cfg_add_i32(s, FW_CFG_ID, version);
 800
 801     return s;
 802 }
 803
 804 FWCfgState *fw_cfg_init_io(uint32_t iobase)
 805 {
 806     return fw_cfg_init_io_dma(iobase, 0, NULL);
 807 }
 808
 809 FWCfgState *fw_cfg_init_mem_wide(hwaddr ctl_addr,
 810                                  hwaddr data_addr, uint32_t data_width,
 811                                  hwaddr dma_addr, AddressSpace *dma_as)
 812 {
 813     DeviceState *dev;
 814     SysBusDevice *sbd;
 815     FWCfgState *s;
 816     uint32_t version = FW_CFG_VERSION;
 817     bool dma_enabled = dma_addr && dma_as;
 818
 819     dev = qdev_create(NULL, TYPE_FW_CFG_MEM);
 820     qdev_prop_set_uint32(dev, "data_width", data_width);
 821     qdev_prop_set_bit(dev, "dma_enabled", dma_enabled);
 822
 823     fw_cfg_init1(dev);
 824
 825     sbd = SYS_BUS_DEVICE(dev);
 826     sysbus_mmio_map(sbd, 0, ctl_addr);
 827     sysbus_mmio_map(sbd, 1, data_addr);
 828
 829     s = FW_CFG(dev);
 830
 831     if (dma_enabled) {
 832         s->dma_as = dma_as;
 833         s->dma_addr = 0;
 834         sysbus_mmio_map(sbd, 2, dma_addr);
 835         version |= FW_CFG_VERSION_DMA;
 836     }
 837
 838     fw_cfg_add_i32(s, FW_CFG_ID, version);
 839
 840     return s;
 841 }
 842
 843 FWCfgState *fw_cfg_init_mem(hwaddr ctl_addr, hwaddr data_addr)
 844 {
 845     return fw_cfg_init_mem_wide(ctl_addr, data_addr,
 846                                 fw_cfg_data_mem_ops.valid.max_access_size,
 847                                 0, NULL);
 848 }
 849
 850
 851 FWCfgState *fw_cfg_find(void)
 852 {
 853     return FW_CFG(object_resolve_path(FW_CFG_PATH, NULL));
 854 }
 855
 856 static void fw_cfg_class_init(ObjectClass *klass, void *data)
 857 {
 858     DeviceClass *dc = DEVICE_CLASS(klass);
 859
 860     dc->reset = fw_cfg_reset;
 861     dc->vmsd = &vmstate_fw_cfg;
 862 }
 863
 864 static const TypeInfo fw_cfg_info = {
 865     .name          = TYPE_FW_CFG,
 866     .parent        = TYPE_SYS_BUS_DEVICE,
 867     .instance_size = sizeof(FWCfgState),
 868     .class_init    = fw_cfg_class_init,
 869 };
 870
 871
 872 static Property fw_cfg_io_properties[] = {
 873     DEFINE_PROP_UINT32("iobase", FWCfgIoState, iobase, -1),
 874     DEFINE_PROP_UINT32("dma_iobase", FWCfgIoState, dma_iobase, -1),
 875     DEFINE_PROP_BOOL("dma_enabled", FWCfgIoState, parent_obj.dma_enabled,
 876                      false),
 877     DEFINE_PROP_END_OF_LIST(),
 878 };
 879
 880 static void fw_cfg_io_realize(DeviceState *dev, Error **errp)
 881 {
 882     FWCfgIoState *s = FW_CFG_IO(dev);
 883     SysBusDevice *sbd = SYS_BUS_DEVICE(dev);
 884
 885     memory_region_init_io(&s->comb_iomem, OBJECT(s), &fw_cfg_comb_mem_ops,
 886                           FW_CFG(s), "fwcfg", FW_CFG_CTL_SIZE);
 887     sysbus_add_io(sbd, s->iobase, &s->comb_iomem);
 888
 889     if (FW_CFG(s)->dma_enabled) {
 890         memory_region_init_io(&FW_CFG(s)->dma_iomem, OBJECT(s),
 891                               &fw_cfg_dma_mem_ops, FW_CFG(s), "fwcfg.dma",
 892                               sizeof(dma_addr_t));
 893         sysbus_add_io(sbd, s->dma_iobase, &FW_CFG(s)->dma_iomem);
 894     }
 895 }
 896
 897 static void fw_cfg_io_class_init(ObjectClass *klass, void *data)
 898 {
 899     DeviceClass *dc = DEVICE_CLASS(klass);
 900
 901     dc->realize = fw_cfg_io_realize;
 902     dc->props = fw_cfg_io_properties;
 903 }
 904
 905 static const TypeInfo fw_cfg_io_info = {
 906     .name          = TYPE_FW_CFG_IO,
 907     .parent        = TYPE_FW_CFG,
 908     .instance_size = sizeof(FWCfgIoState),
 909     .class_init    = fw_cfg_io_class_init,
 910 };
 911
 912
 913 static Property fw_cfg_mem_properties[] = {
 914     DEFINE_PROP_UINT32("data_width", FWCfgMemState, data_width, -1),
 915     DEFINE_PROP_BOOL("dma_enabled", FWCfgMemState, parent_obj.dma_enabled,
 916                      false),
 917     DEFINE_PROP_END_OF_LIST(),
 918 };
 919
 920 static void fw_cfg_mem_realize(DeviceState *dev, Error **errp)
 921 {
 922     FWCfgMemState *s = FW_CFG_MEM(dev);
 923     SysBusDevice *sbd = SYS_BUS_DEVICE(dev);
 924     const MemoryRegionOps *data_ops = &fw_cfg_data_mem_ops;
 925
 926     memory_region_init_io(&s->ctl_iomem, OBJECT(s), &fw_cfg_ctl_mem_ops,
 927                           FW_CFG(s), "fwcfg.ctl", FW_CFG_CTL_SIZE);
 928     sysbus_init_mmio(sbd, &s->ctl_iomem);
 929
 930     if (s->data_width > data_ops->valid.max_access_size) {
 931         /* memberwise copy because the "old_mmio" member is const */
 932         s->wide_data_ops.read       = data_ops->read;
 933         s->wide_data_ops.write      = data_ops->write;
 934         s->wide_data_ops.endianness = data_ops->endianness;
 935         s->wide_data_ops.valid      = data_ops->valid;
 936         s->wide_data_ops.impl       = data_ops->impl;
 937
 938         s->wide_data_ops.valid.max_access_size = s->data_width;
 939         s->wide_data_ops.impl.max_access_size  = s->data_width;
 940         data_ops = &s->wide_data_ops;
 941     }
 942     memory_region_init_io(&s->data_iomem, OBJECT(s), data_ops, FW_CFG(s),
 943                           "fwcfg.data", data_ops->valid.max_access_size);
 944     sysbus_init_mmio(sbd, &s->data_iomem);
 945
 946     if (FW_CFG(s)->dma_enabled) {
 947         memory_region_init_io(&FW_CFG(s)->dma_iomem, OBJECT(s),
 948                               &fw_cfg_dma_mem_ops, FW_CFG(s), "fwcfg.dma",
 949                               sizeof(dma_addr_t));
 950         sysbus_init_mmio(sbd, &FW_CFG(s)->dma_iomem);
 951     }
 952 }
 953
 954 static void fw_cfg_mem_class_init(ObjectClass *klass, void *data)
 955 {
 956     DeviceClass *dc = DEVICE_CLASS(klass);
 957
 958     dc->realize = fw_cfg_mem_realize;
 959     dc->props = fw_cfg_mem_properties;
 960 }
 961
 962 static const TypeInfo fw_cfg_mem_info = {
 963     .name          = TYPE_FW_CFG_MEM,
 964     .parent        = TYPE_FW_CFG,
 965     .instance_size = sizeof(FWCfgMemState),
 966     .class_init    = fw_cfg_mem_class_init,
 967 };
 968
 969
 970 static void fw_cfg_register_types(void)
 971 {
 972     type_register_static(&fw_cfg_info);
 973     type_register_static(&fw_cfg_io_info);
 974     type_register_static(&fw_cfg_mem_info);
 975 }
 976
 977 type_init(fw_cfg_register_types)