2 * QEMU Firmware configuration device emulation
4 * Copyright (c) 2008 Gleb Natapov
6 * Permission is hereby granted, free of charge, to any person obtaining a copy
7 * of this software and associated documentation files (the "Software"), to deal
8 * in the Software without restriction, including without limitation the rights
9 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
10 * copies of the Software, and to permit persons to whom the Software is
11 * furnished to do so, subject to the following conditions:
13 * The above copyright notice and this permission notice shall be included in
14 * all copies or substantial portions of the Software.
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
21 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
25 #include "qemu/osdep.h"
26 #include "qemu-common.h"
27 #include "sysemu/sysemu.h"
28 #include "sysemu/dma.h"
29 #include "sysemu/reset.h"
30 #include "hw/boards.h"
31 #include "hw/nvram/fw_cfg.h"
32 #include "hw/sysbus.h"
33 #include "migration/qemu-file-types.h"
34 #include "migration/vmstate.h"
36 #include "qemu/error-report.h"
37 #include "qemu/option.h"
38 #include "qemu/config-file.h"
39 #include "qemu/cutils.h"
40 #include "qapi/error.h"
42 #define FW_CFG_FILE_SLOTS_DFLT 0x20
44 /* FW_CFG_VERSION bits */
45 #define FW_CFG_VERSION 0x01
46 #define FW_CFG_VERSION_DMA 0x02
48 /* FW_CFG_DMA_CONTROL bits */
49 #define FW_CFG_DMA_CTL_ERROR 0x01
50 #define FW_CFG_DMA_CTL_READ 0x02
51 #define FW_CFG_DMA_CTL_SKIP 0x04
52 #define FW_CFG_DMA_CTL_SELECT 0x08
53 #define FW_CFG_DMA_CTL_WRITE 0x10
55 #define FW_CFG_DMA_SIGNATURE 0x51454d5520434647ULL /* "QEMU CFG" */
61 void *callback_opaque
;
62 FWCfgCallback select_cb
;
63 FWCfgWriteCallback write_cb
;
69 * @key: The uint16 selector key.
71 * Returns: The stringified name if the selector refers to a well-known
72 * numerically defined item, or NULL on key lookup failure.
74 static const char *key_name(uint16_t key
)
76 static const char *fw_cfg_wellknown_keys
[FW_CFG_FILE_FIRST
] = {
77 [FW_CFG_SIGNATURE
] = "signature",
79 [FW_CFG_UUID
] = "uuid",
80 [FW_CFG_RAM_SIZE
] = "ram_size",
81 [FW_CFG_NOGRAPHIC
] = "nographic",
82 [FW_CFG_NB_CPUS
] = "nb_cpus",
83 [FW_CFG_MACHINE_ID
] = "machine_id",
84 [FW_CFG_KERNEL_ADDR
] = "kernel_addr",
85 [FW_CFG_KERNEL_SIZE
] = "kernel_size",
86 [FW_CFG_KERNEL_CMDLINE
] = "kernel_cmdline",
87 [FW_CFG_INITRD_ADDR
] = "initrd_addr",
88 [FW_CFG_INITRD_SIZE
] = "initdr_size",
89 [FW_CFG_BOOT_DEVICE
] = "boot_device",
90 [FW_CFG_NUMA
] = "numa",
91 [FW_CFG_BOOT_MENU
] = "boot_menu",
92 [FW_CFG_MAX_CPUS
] = "max_cpus",
93 [FW_CFG_KERNEL_ENTRY
] = "kernel_entry",
94 [FW_CFG_KERNEL_DATA
] = "kernel_data",
95 [FW_CFG_INITRD_DATA
] = "initrd_data",
96 [FW_CFG_CMDLINE_ADDR
] = "cmdline_addr",
97 [FW_CFG_CMDLINE_SIZE
] = "cmdline_size",
98 [FW_CFG_CMDLINE_DATA
] = "cmdline_data",
99 [FW_CFG_SETUP_ADDR
] = "setup_addr",
100 [FW_CFG_SETUP_SIZE
] = "setup_size",
101 [FW_CFG_SETUP_DATA
] = "setup_data",
102 [FW_CFG_FILE_DIR
] = "file_dir",
105 if (key
& FW_CFG_ARCH_LOCAL
) {
106 return fw_cfg_arch_key_name(key
);
108 if (key
< FW_CFG_FILE_FIRST
) {
109 return fw_cfg_wellknown_keys
[key
];
115 static inline const char *trace_key_name(uint16_t key
)
117 const char *name
= key_name(key
);
119 return name
? name
: "unknown";
125 static char *read_splashfile(char *filename
, gsize
*file_sizep
,
131 unsigned int filehead
;
134 if (!g_file_get_contents(filename
, &content
, file_sizep
, &err
)) {
135 error_report("failed to read splash file '%s': %s",
136 filename
, err
->message
);
141 /* check file size */
142 if (*file_sizep
< 30) {
147 filehead
= lduw_le_p(content
);
148 if (filehead
== 0xd8ff) {
149 file_type
= JPG_FILE
;
150 } else if (filehead
== 0x4d42) {
151 file_type
= BMP_FILE
;
157 if (file_type
== BMP_FILE
) {
158 bmp_bpp
= lduw_le_p(&content
[28]);
165 *file_typep
= file_type
;
170 error_report("splash file '%s' format not recognized; must be JPEG "
171 "or 24 bit BMP", filename
);
176 static void fw_cfg_bootsplash(FWCfgState
*s
)
178 const char *boot_splash_filename
= NULL
;
179 const char *boot_splash_time
= NULL
;
180 char *filename
, *file_data
;
184 /* get user configuration */
185 QemuOptsList
*plist
= qemu_find_opts("boot-opts");
186 QemuOpts
*opts
= QTAILQ_FIRST(&plist
->head
);
187 boot_splash_filename
= qemu_opt_get(opts
, "splash");
188 boot_splash_time
= qemu_opt_get(opts
, "splash-time");
190 /* insert splash time if user configurated */
191 if (boot_splash_time
) {
192 int64_t bst_val
= qemu_opt_get_number(opts
, "splash-time", -1);
195 /* validate the input */
196 if (bst_val
< 0 || bst_val
> 0xffff) {
197 error_report("splash-time is invalid,"
198 "it should be a value between 0 and 65535");
201 /* use little endian format */
202 bst_le16
= cpu_to_le16(bst_val
);
203 fw_cfg_add_file(s
, "etc/boot-menu-wait",
204 g_memdup(&bst_le16
, sizeof bst_le16
), sizeof bst_le16
);
207 /* insert splash file if user configurated */
208 if (boot_splash_filename
) {
209 filename
= qemu_find_file(QEMU_FILE_TYPE_BIOS
, boot_splash_filename
);
210 if (filename
== NULL
) {
211 error_report("failed to find file '%s'", boot_splash_filename
);
215 /* loading file data */
216 file_data
= read_splashfile(filename
, &file_size
, &file_type
);
217 if (file_data
== NULL
) {
221 g_free(boot_splash_filedata
);
222 boot_splash_filedata
= (uint8_t *)file_data
;
225 if (file_type
== JPG_FILE
) {
226 fw_cfg_add_file(s
, "bootsplash.jpg",
227 boot_splash_filedata
, file_size
);
229 fw_cfg_add_file(s
, "bootsplash.bmp",
230 boot_splash_filedata
, file_size
);
236 static void fw_cfg_reboot(FWCfgState
*s
)
238 const char *reboot_timeout
= NULL
;
242 /* get user configuration */
243 QemuOptsList
*plist
= qemu_find_opts("boot-opts");
244 QemuOpts
*opts
= QTAILQ_FIRST(&plist
->head
);
245 reboot_timeout
= qemu_opt_get(opts
, "reboot-timeout");
247 if (reboot_timeout
) {
248 rt_val
= qemu_opt_get_number(opts
, "reboot-timeout", -1);
249 /* validate the input */
250 if (rt_val
< 0 || rt_val
> 0xffff) {
251 error_report("reboot timeout is invalid,"
252 "it should be a value between 0 and 65535");
257 rt_le32
= cpu_to_le32(rt_val
);
258 fw_cfg_add_file(s
, "etc/boot-fail-wait", g_memdup(&rt_le32
, 4), 4);
261 static void fw_cfg_write(FWCfgState
*s
, uint8_t value
)
263 /* nothing, write support removed in QEMU v2.4+ */
266 static inline uint16_t fw_cfg_file_slots(const FWCfgState
*s
)
268 return s
->file_slots
;
271 /* Note: this function returns an exclusive limit. */
272 static inline uint32_t fw_cfg_max_entry(const FWCfgState
*s
)
274 return FW_CFG_FILE_FIRST
+ fw_cfg_file_slots(s
);
277 static int fw_cfg_select(FWCfgState
*s
, uint16_t key
)
283 if ((key
& FW_CFG_ENTRY_MASK
) >= fw_cfg_max_entry(s
)) {
284 s
->cur_entry
= FW_CFG_INVALID
;
289 /* entry successfully selected, now run callback if present */
290 arch
= !!(key
& FW_CFG_ARCH_LOCAL
);
291 e
= &s
->entries
[arch
][key
& FW_CFG_ENTRY_MASK
];
293 e
->select_cb(e
->callback_opaque
);
297 trace_fw_cfg_select(s
, key
, trace_key_name(key
), ret
);
301 static uint64_t fw_cfg_data_read(void *opaque
, hwaddr addr
, unsigned size
)
303 FWCfgState
*s
= opaque
;
304 int arch
= !!(s
->cur_entry
& FW_CFG_ARCH_LOCAL
);
305 FWCfgEntry
*e
= (s
->cur_entry
== FW_CFG_INVALID
) ? NULL
:
306 &s
->entries
[arch
][s
->cur_entry
& FW_CFG_ENTRY_MASK
];
309 assert(size
> 0 && size
<= sizeof(value
));
310 if (s
->cur_entry
!= FW_CFG_INVALID
&& e
->data
&& s
->cur_offset
< e
->len
) {
311 /* The least significant 'size' bytes of the return value are
312 * expected to contain a string preserving portion of the item
313 * data, padded with zeros on the right in case we run out early.
314 * In technical terms, we're composing the host-endian representation
315 * of the big endian interpretation of the fw_cfg string.
318 value
= (value
<< 8) | e
->data
[s
->cur_offset
++];
319 } while (--size
&& s
->cur_offset
< e
->len
);
320 /* If size is still not zero, we *did* run out early, so continue
321 * left-shifting, to add the appropriate number of padding zeros
327 trace_fw_cfg_read(s
, value
);
331 static void fw_cfg_data_mem_write(void *opaque
, hwaddr addr
,
332 uint64_t value
, unsigned size
)
334 FWCfgState
*s
= opaque
;
338 fw_cfg_write(s
, value
>> (8 * --i
));
342 static void fw_cfg_dma_transfer(FWCfgState
*s
)
348 int read
= 0, write
= 0;
351 /* Reset the address before the next access */
352 dma_addr
= s
->dma_addr
;
355 if (dma_memory_read(s
->dma_as
, dma_addr
, &dma
, sizeof(dma
))) {
356 stl_be_dma(s
->dma_as
, dma_addr
+ offsetof(FWCfgDmaAccess
, control
),
357 FW_CFG_DMA_CTL_ERROR
);
361 dma
.address
= be64_to_cpu(dma
.address
);
362 dma
.length
= be32_to_cpu(dma
.length
);
363 dma
.control
= be32_to_cpu(dma
.control
);
365 if (dma
.control
& FW_CFG_DMA_CTL_SELECT
) {
366 fw_cfg_select(s
, dma
.control
>> 16);
369 arch
= !!(s
->cur_entry
& FW_CFG_ARCH_LOCAL
);
370 e
= (s
->cur_entry
== FW_CFG_INVALID
) ? NULL
:
371 &s
->entries
[arch
][s
->cur_entry
& FW_CFG_ENTRY_MASK
];
373 if (dma
.control
& FW_CFG_DMA_CTL_READ
) {
376 } else if (dma
.control
& FW_CFG_DMA_CTL_WRITE
) {
379 } else if (dma
.control
& FW_CFG_DMA_CTL_SKIP
) {
388 while (dma
.length
> 0 && !(dma
.control
& FW_CFG_DMA_CTL_ERROR
)) {
389 if (s
->cur_entry
== FW_CFG_INVALID
|| !e
->data
||
390 s
->cur_offset
>= e
->len
) {
393 /* If the access is not a read access, it will be a skip access,
397 if (dma_memory_set(s
->dma_as
, dma
.address
, 0, len
)) {
398 dma
.control
|= FW_CFG_DMA_CTL_ERROR
;
402 dma
.control
|= FW_CFG_DMA_CTL_ERROR
;
405 if (dma
.length
<= (e
->len
- s
->cur_offset
)) {
408 len
= (e
->len
- s
->cur_offset
);
411 /* If the access is not a read access, it will be a skip access,
415 if (dma_memory_write(s
->dma_as
, dma
.address
,
416 &e
->data
[s
->cur_offset
], len
)) {
417 dma
.control
|= FW_CFG_DMA_CTL_ERROR
;
421 if (!e
->allow_write
||
423 dma_memory_read(s
->dma_as
, dma
.address
,
424 &e
->data
[s
->cur_offset
], len
)) {
425 dma
.control
|= FW_CFG_DMA_CTL_ERROR
;
426 } else if (e
->write_cb
) {
427 e
->write_cb(e
->callback_opaque
, s
->cur_offset
, len
);
431 s
->cur_offset
+= len
;
439 stl_be_dma(s
->dma_as
, dma_addr
+ offsetof(FWCfgDmaAccess
, control
),
442 trace_fw_cfg_read(s
, 0);
445 static uint64_t fw_cfg_dma_mem_read(void *opaque
, hwaddr addr
,
448 /* Return a signature value (and handle various read sizes) */
449 return extract64(FW_CFG_DMA_SIGNATURE
, (8 - addr
- size
) * 8, size
* 8);
452 static void fw_cfg_dma_mem_write(void *opaque
, hwaddr addr
,
453 uint64_t value
, unsigned size
)
455 FWCfgState
*s
= opaque
;
459 /* FWCfgDmaAccess high address */
460 s
->dma_addr
= value
<< 32;
461 } else if (addr
== 4) {
462 /* FWCfgDmaAccess low address */
463 s
->dma_addr
|= value
;
464 fw_cfg_dma_transfer(s
);
466 } else if (size
== 8 && addr
== 0) {
468 fw_cfg_dma_transfer(s
);
472 static bool fw_cfg_dma_mem_valid(void *opaque
, hwaddr addr
,
473 unsigned size
, bool is_write
,
476 return !is_write
|| ((size
== 4 && (addr
== 0 || addr
== 4)) ||
477 (size
== 8 && addr
== 0));
480 static bool fw_cfg_data_mem_valid(void *opaque
, hwaddr addr
,
481 unsigned size
, bool is_write
,
487 static uint64_t fw_cfg_ctl_mem_read(void *opaque
, hwaddr addr
, unsigned size
)
492 static void fw_cfg_ctl_mem_write(void *opaque
, hwaddr addr
,
493 uint64_t value
, unsigned size
)
495 fw_cfg_select(opaque
, (uint16_t)value
);
498 static bool fw_cfg_ctl_mem_valid(void *opaque
, hwaddr addr
,
499 unsigned size
, bool is_write
,
502 return is_write
&& size
== 2;
505 static void fw_cfg_comb_write(void *opaque
, hwaddr addr
,
506 uint64_t value
, unsigned size
)
510 fw_cfg_write(opaque
, (uint8_t)value
);
513 fw_cfg_select(opaque
, (uint16_t)value
);
518 static bool fw_cfg_comb_valid(void *opaque
, hwaddr addr
,
519 unsigned size
, bool is_write
,
522 return (size
== 1) || (is_write
&& size
== 2);
525 static const MemoryRegionOps fw_cfg_ctl_mem_ops
= {
526 .read
= fw_cfg_ctl_mem_read
,
527 .write
= fw_cfg_ctl_mem_write
,
528 .endianness
= DEVICE_BIG_ENDIAN
,
529 .valid
.accepts
= fw_cfg_ctl_mem_valid
,
532 static const MemoryRegionOps fw_cfg_data_mem_ops
= {
533 .read
= fw_cfg_data_read
,
534 .write
= fw_cfg_data_mem_write
,
535 .endianness
= DEVICE_BIG_ENDIAN
,
537 .min_access_size
= 1,
538 .max_access_size
= 1,
539 .accepts
= fw_cfg_data_mem_valid
,
543 static const MemoryRegionOps fw_cfg_comb_mem_ops
= {
544 .read
= fw_cfg_data_read
,
545 .write
= fw_cfg_comb_write
,
546 .endianness
= DEVICE_LITTLE_ENDIAN
,
547 .valid
.accepts
= fw_cfg_comb_valid
,
550 static const MemoryRegionOps fw_cfg_dma_mem_ops
= {
551 .read
= fw_cfg_dma_mem_read
,
552 .write
= fw_cfg_dma_mem_write
,
553 .endianness
= DEVICE_BIG_ENDIAN
,
554 .valid
.accepts
= fw_cfg_dma_mem_valid
,
555 .valid
.max_access_size
= 8,
556 .impl
.max_access_size
= 8,
559 static void fw_cfg_reset(DeviceState
*d
)
561 FWCfgState
*s
= FW_CFG(d
);
563 /* we never register a read callback for FW_CFG_SIGNATURE */
564 fw_cfg_select(s
, FW_CFG_SIGNATURE
);
567 /* Save restore 32 bit int as uint16_t
568 This is a Big hack, but it is how the old state did it.
569 Or we broke compatibility in the state, or we can't use struct tm
572 static int get_uint32_as_uint16(QEMUFile
*f
, void *pv
, size_t size
,
573 const VMStateField
*field
)
576 *v
= qemu_get_be16(f
);
580 static int put_unused(QEMUFile
*f
, void *pv
, size_t size
,
581 const VMStateField
*field
, QJSON
*vmdesc
)
583 fprintf(stderr
, "uint32_as_uint16 is only used for backward compatibility.\n");
584 fprintf(stderr
, "This functions shouldn't be called.\n");
589 static const VMStateInfo vmstate_hack_uint32_as_uint16
= {
590 .name
= "int32_as_uint16",
591 .get
= get_uint32_as_uint16
,
595 #define VMSTATE_UINT16_HACK(_f, _s, _t) \
596 VMSTATE_SINGLE_TEST(_f, _s, _t, 0, vmstate_hack_uint32_as_uint16, uint32_t)
599 static bool is_version_1(void *opaque
, int version_id
)
601 return version_id
== 1;
604 bool fw_cfg_dma_enabled(void *opaque
)
606 FWCfgState
*s
= opaque
;
608 return s
->dma_enabled
;
611 static const VMStateDescription vmstate_fw_cfg_dma
= {
612 .name
= "fw_cfg/dma",
613 .needed
= fw_cfg_dma_enabled
,
614 .fields
= (VMStateField
[]) {
615 VMSTATE_UINT64(dma_addr
, FWCfgState
),
616 VMSTATE_END_OF_LIST()
620 static const VMStateDescription vmstate_fw_cfg
= {
623 .minimum_version_id
= 1,
624 .fields
= (VMStateField
[]) {
625 VMSTATE_UINT16(cur_entry
, FWCfgState
),
626 VMSTATE_UINT16_HACK(cur_offset
, FWCfgState
, is_version_1
),
627 VMSTATE_UINT32_V(cur_offset
, FWCfgState
, 2),
628 VMSTATE_END_OF_LIST()
630 .subsections
= (const VMStateDescription
*[]) {
636 static void fw_cfg_add_bytes_callback(FWCfgState
*s
, uint16_t key
,
637 FWCfgCallback select_cb
,
638 FWCfgWriteCallback write_cb
,
639 void *callback_opaque
,
640 void *data
, size_t len
,
643 int arch
= !!(key
& FW_CFG_ARCH_LOCAL
);
645 key
&= FW_CFG_ENTRY_MASK
;
647 assert(key
< fw_cfg_max_entry(s
) && len
< UINT32_MAX
);
648 assert(s
->entries
[arch
][key
].data
== NULL
); /* avoid key conflict */
650 s
->entries
[arch
][key
].data
= data
;
651 s
->entries
[arch
][key
].len
= (uint32_t)len
;
652 s
->entries
[arch
][key
].select_cb
= select_cb
;
653 s
->entries
[arch
][key
].write_cb
= write_cb
;
654 s
->entries
[arch
][key
].callback_opaque
= callback_opaque
;
655 s
->entries
[arch
][key
].allow_write
= !read_only
;
658 static void *fw_cfg_modify_bytes_read(FWCfgState
*s
, uint16_t key
,
659 void *data
, size_t len
)
662 int arch
= !!(key
& FW_CFG_ARCH_LOCAL
);
664 key
&= FW_CFG_ENTRY_MASK
;
666 assert(key
< fw_cfg_max_entry(s
) && len
< UINT32_MAX
);
668 /* return the old data to the function caller, avoid memory leak */
669 ptr
= s
->entries
[arch
][key
].data
;
670 s
->entries
[arch
][key
].data
= data
;
671 s
->entries
[arch
][key
].len
= len
;
672 s
->entries
[arch
][key
].callback_opaque
= NULL
;
673 s
->entries
[arch
][key
].allow_write
= false;
678 void fw_cfg_add_bytes(FWCfgState
*s
, uint16_t key
, void *data
, size_t len
)
680 trace_fw_cfg_add_bytes(key
, trace_key_name(key
), len
);
681 fw_cfg_add_bytes_callback(s
, key
, NULL
, NULL
, NULL
, data
, len
, true);
684 void fw_cfg_add_string(FWCfgState
*s
, uint16_t key
, const char *value
)
686 size_t sz
= strlen(value
) + 1;
688 trace_fw_cfg_add_string(key
, trace_key_name(key
), value
);
689 fw_cfg_add_bytes(s
, key
, g_memdup(value
, sz
), sz
);
692 void fw_cfg_add_i16(FWCfgState
*s
, uint16_t key
, uint16_t value
)
696 copy
= g_malloc(sizeof(value
));
697 *copy
= cpu_to_le16(value
);
698 trace_fw_cfg_add_i16(key
, trace_key_name(key
), value
);
699 fw_cfg_add_bytes(s
, key
, copy
, sizeof(value
));
702 void fw_cfg_modify_i16(FWCfgState
*s
, uint16_t key
, uint16_t value
)
704 uint16_t *copy
, *old
;
706 copy
= g_malloc(sizeof(value
));
707 *copy
= cpu_to_le16(value
);
708 old
= fw_cfg_modify_bytes_read(s
, key
, copy
, sizeof(value
));
712 void fw_cfg_add_i32(FWCfgState
*s
, uint16_t key
, uint32_t value
)
716 copy
= g_malloc(sizeof(value
));
717 *copy
= cpu_to_le32(value
);
718 trace_fw_cfg_add_i32(key
, trace_key_name(key
), value
);
719 fw_cfg_add_bytes(s
, key
, copy
, sizeof(value
));
722 void fw_cfg_add_i64(FWCfgState
*s
, uint16_t key
, uint64_t value
)
726 copy
= g_malloc(sizeof(value
));
727 *copy
= cpu_to_le64(value
);
728 trace_fw_cfg_add_i64(key
, trace_key_name(key
), value
);
729 fw_cfg_add_bytes(s
, key
, copy
, sizeof(value
));
732 void fw_cfg_set_order_override(FWCfgState
*s
, int order
)
734 assert(s
->fw_cfg_order_override
== 0);
735 s
->fw_cfg_order_override
= order
;
738 void fw_cfg_reset_order_override(FWCfgState
*s
)
740 assert(s
->fw_cfg_order_override
!= 0);
741 s
->fw_cfg_order_override
= 0;
745 * This is the legacy order list. For legacy systems, files are in
746 * the fw_cfg in the order defined below, by the "order" value. Note
747 * that some entries (VGA ROMs, NIC option ROMS, etc.) go into a
748 * specific area, but there may be more than one and they occur in the
749 * order that the user specifies them on the command line. Those are
750 * handled in a special manner, using the order override above.
752 * For non-legacy, the files are sorted by filename to avoid this kind
753 * of complexity in the future.
755 * This is only for x86, other arches don't implement versioning so
756 * they won't set legacy mode.
762 { "etc/boot-menu-wait", 10 },
763 { "bootsplash.jpg", 11 },
764 { "bootsplash.bmp", 12 },
765 { "etc/boot-fail-wait", 15 },
766 { "etc/smbios/smbios-tables", 20 },
767 { "etc/smbios/smbios-anchor", 30 },
769 { "etc/reserved-memory-end", 50 },
770 { "genroms/kvmvapic.bin", 55 },
771 { "genroms/linuxboot.bin", 60 },
772 { }, /* VGA ROMs from pc_vga_init come here, 70. */
773 { }, /* NIC option ROMs from pc_nic_init come here, 80. */
774 { "etc/system-states", 90 },
775 { }, /* User ROMs come here, 100. */
776 { }, /* Device FW comes here, 110. */
777 { "etc/extra-pci-roots", 120 },
778 { "etc/acpi/tables", 130 },
779 { "etc/table-loader", 140 },
780 { "etc/tpm/log", 150 },
781 { "etc/acpi/rsdp", 160 },
782 { "bootorder", 170 },
784 #define FW_CFG_ORDER_OVERRIDE_LAST 200
787 static int get_fw_cfg_order(FWCfgState
*s
, const char *name
)
791 if (s
->fw_cfg_order_override
> 0) {
792 return s
->fw_cfg_order_override
;
795 for (i
= 0; i
< ARRAY_SIZE(fw_cfg_order
); i
++) {
796 if (fw_cfg_order
[i
].name
== NULL
) {
800 if (strcmp(name
, fw_cfg_order
[i
].name
) == 0) {
801 return fw_cfg_order
[i
].order
;
805 /* Stick unknown stuff at the end. */
806 warn_report("Unknown firmware file in legacy mode: %s", name
);
807 return FW_CFG_ORDER_OVERRIDE_LAST
;
810 void fw_cfg_add_file_callback(FWCfgState
*s
, const char *filename
,
811 FWCfgCallback select_cb
,
812 FWCfgWriteCallback write_cb
,
813 void *callback_opaque
,
814 void *data
, size_t len
, bool read_only
)
818 MachineClass
*mc
= MACHINE_GET_CLASS(qdev_get_machine());
822 dsize
= sizeof(uint32_t) + sizeof(FWCfgFile
) * fw_cfg_file_slots(s
);
823 s
->files
= g_malloc0(dsize
);
824 fw_cfg_add_bytes(s
, FW_CFG_FILE_DIR
, s
->files
, dsize
);
827 count
= be32_to_cpu(s
->files
->count
);
828 assert(count
< fw_cfg_file_slots(s
));
830 /* Find the insertion point. */
831 if (mc
->legacy_fw_cfg_order
) {
833 * Sort by order. For files with the same order, we keep them
834 * in the sequence in which they were added.
836 order
= get_fw_cfg_order(s
, filename
);
838 index
> 0 && order
< s
->entry_order
[index
- 1];
841 /* Sort by file name. */
843 index
> 0 && strcmp(filename
, s
->files
->f
[index
- 1].name
) < 0;
848 * Move all the entries from the index point and after down one
849 * to create a slot for the new entry. Because calculations are
850 * being done with the index, make it so that "i" is the current
851 * index and "i - 1" is the one being copied from, thus the
852 * unusual start and end in the for statement.
854 for (i
= count
; i
> index
; i
--) {
855 s
->files
->f
[i
] = s
->files
->f
[i
- 1];
856 s
->files
->f
[i
].select
= cpu_to_be16(FW_CFG_FILE_FIRST
+ i
);
857 s
->entries
[0][FW_CFG_FILE_FIRST
+ i
] =
858 s
->entries
[0][FW_CFG_FILE_FIRST
+ i
- 1];
859 s
->entry_order
[i
] = s
->entry_order
[i
- 1];
862 memset(&s
->files
->f
[index
], 0, sizeof(FWCfgFile
));
863 memset(&s
->entries
[0][FW_CFG_FILE_FIRST
+ index
], 0, sizeof(FWCfgEntry
));
865 pstrcpy(s
->files
->f
[index
].name
, sizeof(s
->files
->f
[index
].name
), filename
);
866 for (i
= 0; i
<= count
; i
++) {
868 strcmp(s
->files
->f
[index
].name
, s
->files
->f
[i
].name
) == 0) {
869 error_report("duplicate fw_cfg file name: %s",
870 s
->files
->f
[index
].name
);
875 fw_cfg_add_bytes_callback(s
, FW_CFG_FILE_FIRST
+ index
,
877 callback_opaque
, data
, len
,
880 s
->files
->f
[index
].size
= cpu_to_be32(len
);
881 s
->files
->f
[index
].select
= cpu_to_be16(FW_CFG_FILE_FIRST
+ index
);
882 s
->entry_order
[index
] = order
;
883 trace_fw_cfg_add_file(s
, index
, s
->files
->f
[index
].name
, len
);
885 s
->files
->count
= cpu_to_be32(count
+1);
888 void fw_cfg_add_file(FWCfgState
*s
, const char *filename
,
889 void *data
, size_t len
)
891 fw_cfg_add_file_callback(s
, filename
, NULL
, NULL
, NULL
, data
, len
, true);
894 void *fw_cfg_modify_file(FWCfgState
*s
, const char *filename
,
895 void *data
, size_t len
)
902 index
= be32_to_cpu(s
->files
->count
);
904 for (i
= 0; i
< index
; i
++) {
905 if (strcmp(filename
, s
->files
->f
[i
].name
) == 0) {
906 ptr
= fw_cfg_modify_bytes_read(s
, FW_CFG_FILE_FIRST
+ i
,
908 s
->files
->f
[i
].size
= cpu_to_be32(len
);
913 assert(index
< fw_cfg_file_slots(s
));
916 fw_cfg_add_file_callback(s
, filename
, NULL
, NULL
, NULL
, data
, len
, true);
920 static void fw_cfg_machine_reset(void *opaque
)
924 FWCfgState
*s
= opaque
;
925 char *bootindex
= get_boot_devices_list(&len
);
927 ptr
= fw_cfg_modify_file(s
, "bootorder", (uint8_t *)bootindex
, len
);
931 static void fw_cfg_machine_ready(struct Notifier
*n
, void *data
)
933 FWCfgState
*s
= container_of(n
, FWCfgState
, machine_ready
);
934 qemu_register_reset(fw_cfg_machine_reset
, s
);
939 static void fw_cfg_common_realize(DeviceState
*dev
, Error
**errp
)
941 FWCfgState
*s
= FW_CFG(dev
);
942 MachineState
*machine
= MACHINE(qdev_get_machine());
943 uint32_t version
= FW_CFG_VERSION
;
945 if (!fw_cfg_find()) {
946 error_setg(errp
, "at most one %s device is permitted", TYPE_FW_CFG
);
950 fw_cfg_add_bytes(s
, FW_CFG_SIGNATURE
, (char *)"QEMU", 4);
951 fw_cfg_add_bytes(s
, FW_CFG_UUID
, &qemu_uuid
, 16);
952 fw_cfg_add_i16(s
, FW_CFG_NOGRAPHIC
, (uint16_t)!machine
->enable_graphics
);
953 fw_cfg_add_i16(s
, FW_CFG_BOOT_MENU
, (uint16_t)boot_menu
);
954 fw_cfg_bootsplash(s
);
957 if (s
->dma_enabled
) {
958 version
|= FW_CFG_VERSION_DMA
;
961 fw_cfg_add_i32(s
, FW_CFG_ID
, version
);
963 s
->machine_ready
.notify
= fw_cfg_machine_ready
;
964 qemu_add_machine_init_done_notifier(&s
->machine_ready
);
967 FWCfgState
*fw_cfg_init_io_dma(uint32_t iobase
, uint32_t dma_iobase
,
968 AddressSpace
*dma_as
)
974 bool dma_requested
= dma_iobase
&& dma_as
;
976 dev
= qdev_create(NULL
, TYPE_FW_CFG_IO
);
977 if (!dma_requested
) {
978 qdev_prop_set_bit(dev
, "dma_enabled", false);
981 object_property_add_child(OBJECT(qdev_get_machine()), TYPE_FW_CFG
,
983 qdev_init_nofail(dev
);
985 sbd
= SYS_BUS_DEVICE(dev
);
986 ios
= FW_CFG_IO(dev
);
987 sysbus_add_io(sbd
, iobase
, &ios
->comb_iomem
);
991 if (s
->dma_enabled
) {
992 /* 64 bits for the address field */
995 sysbus_add_io(sbd
, dma_iobase
, &s
->dma_iomem
);
1001 FWCfgState
*fw_cfg_init_io(uint32_t iobase
)
1003 return fw_cfg_init_io_dma(iobase
, 0, NULL
);
1006 FWCfgState
*fw_cfg_init_mem_wide(hwaddr ctl_addr
,
1007 hwaddr data_addr
, uint32_t data_width
,
1008 hwaddr dma_addr
, AddressSpace
*dma_as
)
1013 bool dma_requested
= dma_addr
&& dma_as
;
1015 dev
= qdev_create(NULL
, TYPE_FW_CFG_MEM
);
1016 qdev_prop_set_uint32(dev
, "data_width", data_width
);
1017 if (!dma_requested
) {
1018 qdev_prop_set_bit(dev
, "dma_enabled", false);
1021 object_property_add_child(OBJECT(qdev_get_machine()), TYPE_FW_CFG
,
1023 qdev_init_nofail(dev
);
1025 sbd
= SYS_BUS_DEVICE(dev
);
1026 sysbus_mmio_map(sbd
, 0, ctl_addr
);
1027 sysbus_mmio_map(sbd
, 1, data_addr
);
1031 if (s
->dma_enabled
) {
1034 sysbus_mmio_map(sbd
, 2, dma_addr
);
1040 FWCfgState
*fw_cfg_init_mem(hwaddr ctl_addr
, hwaddr data_addr
)
1042 return fw_cfg_init_mem_wide(ctl_addr
, data_addr
,
1043 fw_cfg_data_mem_ops
.valid
.max_access_size
,
1048 FWCfgState
*fw_cfg_find(void)
1050 /* Returns NULL unless there is exactly one fw_cfg device */
1051 return FW_CFG(object_resolve_path_type("", TYPE_FW_CFG
, NULL
));
1055 static void fw_cfg_class_init(ObjectClass
*klass
, void *data
)
1057 DeviceClass
*dc
= DEVICE_CLASS(klass
);
1059 dc
->reset
= fw_cfg_reset
;
1060 dc
->vmsd
= &vmstate_fw_cfg
;
1063 static const TypeInfo fw_cfg_info
= {
1064 .name
= TYPE_FW_CFG
,
1065 .parent
= TYPE_SYS_BUS_DEVICE
,
1067 .instance_size
= sizeof(FWCfgState
),
1068 .class_init
= fw_cfg_class_init
,
1071 static void fw_cfg_file_slots_allocate(FWCfgState
*s
, Error
**errp
)
1073 uint16_t file_slots_max
;
1075 if (fw_cfg_file_slots(s
) < FW_CFG_FILE_SLOTS_MIN
) {
1076 error_setg(errp
, "\"file_slots\" must be at least 0x%x",
1077 FW_CFG_FILE_SLOTS_MIN
);
1081 /* (UINT16_MAX & FW_CFG_ENTRY_MASK) is the highest inclusive selector value
1082 * that we permit. The actual (exclusive) value coming from the
1083 * configuration is (FW_CFG_FILE_FIRST + fw_cfg_file_slots(s)). */
1084 file_slots_max
= (UINT16_MAX
& FW_CFG_ENTRY_MASK
) - FW_CFG_FILE_FIRST
+ 1;
1085 if (fw_cfg_file_slots(s
) > file_slots_max
) {
1086 error_setg(errp
, "\"file_slots\" must not exceed 0x%" PRIx16
,
1091 s
->entries
[0] = g_new0(FWCfgEntry
, fw_cfg_max_entry(s
));
1092 s
->entries
[1] = g_new0(FWCfgEntry
, fw_cfg_max_entry(s
));
1093 s
->entry_order
= g_new0(int, fw_cfg_max_entry(s
));
1096 static Property fw_cfg_io_properties
[] = {
1097 DEFINE_PROP_BOOL("dma_enabled", FWCfgIoState
, parent_obj
.dma_enabled
,
1099 DEFINE_PROP_UINT16("x-file-slots", FWCfgIoState
, parent_obj
.file_slots
,
1100 FW_CFG_FILE_SLOTS_DFLT
),
1101 DEFINE_PROP_END_OF_LIST(),
1104 static void fw_cfg_io_realize(DeviceState
*dev
, Error
**errp
)
1106 FWCfgIoState
*s
= FW_CFG_IO(dev
);
1107 Error
*local_err
= NULL
;
1109 fw_cfg_file_slots_allocate(FW_CFG(s
), &local_err
);
1111 error_propagate(errp
, local_err
);
1115 /* when using port i/o, the 8-bit data register ALWAYS overlaps
1116 * with half of the 16-bit control register. Hence, the total size
1117 * of the i/o region used is FW_CFG_CTL_SIZE */
1118 memory_region_init_io(&s
->comb_iomem
, OBJECT(s
), &fw_cfg_comb_mem_ops
,
1119 FW_CFG(s
), "fwcfg", FW_CFG_CTL_SIZE
);
1121 if (FW_CFG(s
)->dma_enabled
) {
1122 memory_region_init_io(&FW_CFG(s
)->dma_iomem
, OBJECT(s
),
1123 &fw_cfg_dma_mem_ops
, FW_CFG(s
), "fwcfg.dma",
1124 sizeof(dma_addr_t
));
1127 fw_cfg_common_realize(dev
, errp
);
1130 static void fw_cfg_io_class_init(ObjectClass
*klass
, void *data
)
1132 DeviceClass
*dc
= DEVICE_CLASS(klass
);
1134 dc
->realize
= fw_cfg_io_realize
;
1135 dc
->props
= fw_cfg_io_properties
;
1138 static const TypeInfo fw_cfg_io_info
= {
1139 .name
= TYPE_FW_CFG_IO
,
1140 .parent
= TYPE_FW_CFG
,
1141 .instance_size
= sizeof(FWCfgIoState
),
1142 .class_init
= fw_cfg_io_class_init
,
1146 static Property fw_cfg_mem_properties
[] = {
1147 DEFINE_PROP_UINT32("data_width", FWCfgMemState
, data_width
, -1),
1148 DEFINE_PROP_BOOL("dma_enabled", FWCfgMemState
, parent_obj
.dma_enabled
,
1150 DEFINE_PROP_UINT16("x-file-slots", FWCfgMemState
, parent_obj
.file_slots
,
1151 FW_CFG_FILE_SLOTS_DFLT
),
1152 DEFINE_PROP_END_OF_LIST(),
1155 static void fw_cfg_mem_realize(DeviceState
*dev
, Error
**errp
)
1157 FWCfgMemState
*s
= FW_CFG_MEM(dev
);
1158 SysBusDevice
*sbd
= SYS_BUS_DEVICE(dev
);
1159 const MemoryRegionOps
*data_ops
= &fw_cfg_data_mem_ops
;
1160 Error
*local_err
= NULL
;
1162 fw_cfg_file_slots_allocate(FW_CFG(s
), &local_err
);
1164 error_propagate(errp
, local_err
);
1168 memory_region_init_io(&s
->ctl_iomem
, OBJECT(s
), &fw_cfg_ctl_mem_ops
,
1169 FW_CFG(s
), "fwcfg.ctl", FW_CFG_CTL_SIZE
);
1170 sysbus_init_mmio(sbd
, &s
->ctl_iomem
);
1172 if (s
->data_width
> data_ops
->valid
.max_access_size
) {
1173 s
->wide_data_ops
= *data_ops
;
1175 s
->wide_data_ops
.valid
.max_access_size
= s
->data_width
;
1176 s
->wide_data_ops
.impl
.max_access_size
= s
->data_width
;
1177 data_ops
= &s
->wide_data_ops
;
1179 memory_region_init_io(&s
->data_iomem
, OBJECT(s
), data_ops
, FW_CFG(s
),
1180 "fwcfg.data", data_ops
->valid
.max_access_size
);
1181 sysbus_init_mmio(sbd
, &s
->data_iomem
);
1183 if (FW_CFG(s
)->dma_enabled
) {
1184 memory_region_init_io(&FW_CFG(s
)->dma_iomem
, OBJECT(s
),
1185 &fw_cfg_dma_mem_ops
, FW_CFG(s
), "fwcfg.dma",
1186 sizeof(dma_addr_t
));
1187 sysbus_init_mmio(sbd
, &FW_CFG(s
)->dma_iomem
);
1190 fw_cfg_common_realize(dev
, errp
);
1193 static void fw_cfg_mem_class_init(ObjectClass
*klass
, void *data
)
1195 DeviceClass
*dc
= DEVICE_CLASS(klass
);
1197 dc
->realize
= fw_cfg_mem_realize
;
1198 dc
->props
= fw_cfg_mem_properties
;
1201 static const TypeInfo fw_cfg_mem_info
= {
1202 .name
= TYPE_FW_CFG_MEM
,
1203 .parent
= TYPE_FW_CFG
,
1204 .instance_size
= sizeof(FWCfgMemState
),
1205 .class_init
= fw_cfg_mem_class_init
,
1209 static void fw_cfg_register_types(void)
1211 type_register_static(&fw_cfg_info
);
1212 type_register_static(&fw_cfg_io_info
);
1213 type_register_static(&fw_cfg_mem_info
);
1216 type_init(fw_cfg_register_types
)