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[thirdparty/qemu.git] / hw / ppc / spapr_vio.c
1 /*
2 * QEMU sPAPR VIO code
3 *
4 * Copyright (c) 2010 David Gibson, IBM Corporation <dwg@au1.ibm.com>
5 * Based on the s390 virtio bus code:
6 * Copyright (c) 2009 Alexander Graf <agraf@suse.de>
7 *
8 * This library is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU Lesser General Public
10 * License as published by the Free Software Foundation; either
11 * version 2 of the License, or (at your option) any later version.
12 *
13 * This library is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
16 * Lesser General Public License for more details.
17 *
18 * You should have received a copy of the GNU Lesser General Public
19 * License along with this library; if not, see <http://www.gnu.org/licenses/>.
20 */
21
22 #include "qemu/osdep.h"
23 #include "qemu/error-report.h"
24 #include "qapi/error.h"
25 #include "qapi/visitor.h"
26 #include "hw/hw.h"
27 #include "hw/irq.h"
28 #include "qemu/log.h"
29 #include "sysemu/sysemu.h"
30 #include "hw/boards.h"
31 #include "hw/loader.h"
32 #include "elf.h"
33 #include "hw/sysbus.h"
34 #include "sysemu/kvm.h"
35 #include "sysemu/device_tree.h"
36 #include "kvm_ppc.h"
37 #include "sysemu/qtest.h"
38
39 #include "hw/ppc/spapr.h"
40 #include "hw/ppc/spapr_vio.h"
41 #include "hw/ppc/fdt.h"
42 #include "trace.h"
43
44 #include <libfdt.h>
45
46 #define SPAPR_VIO_REG_BASE 0x71000000
47
48 static char *spapr_vio_get_dev_name(DeviceState *qdev)
49 {
50 SpaprVioDevice *dev = VIO_SPAPR_DEVICE(qdev);
51 SpaprVioDeviceClass *pc = VIO_SPAPR_DEVICE_GET_CLASS(dev);
52
53 /* Device tree style name device@reg */
54 return g_strdup_printf("%s@%x", pc->dt_name, dev->reg);
55 }
56
57 static void spapr_vio_bus_class_init(ObjectClass *klass, void *data)
58 {
59 BusClass *k = BUS_CLASS(klass);
60
61 k->get_dev_path = spapr_vio_get_dev_name;
62 k->get_fw_dev_path = spapr_vio_get_dev_name;
63 }
64
65 static const TypeInfo spapr_vio_bus_info = {
66 .name = TYPE_SPAPR_VIO_BUS,
67 .parent = TYPE_BUS,
68 .class_init = spapr_vio_bus_class_init,
69 .instance_size = sizeof(SpaprVioBus),
70 };
71
72 SpaprVioDevice *spapr_vio_find_by_reg(SpaprVioBus *bus, uint32_t reg)
73 {
74 BusChild *kid;
75 SpaprVioDevice *dev = NULL;
76
77 QTAILQ_FOREACH(kid, &bus->bus.children, sibling) {
78 dev = (SpaprVioDevice *)kid->child;
79 if (dev->reg == reg) {
80 return dev;
81 }
82 }
83
84 return NULL;
85 }
86
87 static int vio_make_devnode(SpaprVioDevice *dev,
88 void *fdt)
89 {
90 SpaprVioDeviceClass *pc = VIO_SPAPR_DEVICE_GET_CLASS(dev);
91 int vdevice_off, node_off, ret;
92 char *dt_name;
93
94 vdevice_off = fdt_path_offset(fdt, "/vdevice");
95 if (vdevice_off < 0) {
96 return vdevice_off;
97 }
98
99 dt_name = spapr_vio_get_dev_name(DEVICE(dev));
100 node_off = fdt_add_subnode(fdt, vdevice_off, dt_name);
101 g_free(dt_name);
102 if (node_off < 0) {
103 return node_off;
104 }
105
106 ret = fdt_setprop_cell(fdt, node_off, "reg", dev->reg);
107 if (ret < 0) {
108 return ret;
109 }
110
111 if (pc->dt_type) {
112 ret = fdt_setprop_string(fdt, node_off, "device_type",
113 pc->dt_type);
114 if (ret < 0) {
115 return ret;
116 }
117 }
118
119 if (pc->dt_compatible) {
120 ret = fdt_setprop_string(fdt, node_off, "compatible",
121 pc->dt_compatible);
122 if (ret < 0) {
123 return ret;
124 }
125 }
126
127 if (dev->irq) {
128 uint32_t ints_prop[2];
129
130 spapr_dt_irq(ints_prop, dev->irq, false);
131 ret = fdt_setprop(fdt, node_off, "interrupts", ints_prop,
132 sizeof(ints_prop));
133 if (ret < 0) {
134 return ret;
135 }
136 }
137
138 ret = spapr_tcet_dma_dt(fdt, node_off, "ibm,my-dma-window", dev->tcet);
139 if (ret < 0) {
140 return ret;
141 }
142
143 if (pc->devnode) {
144 ret = (pc->devnode)(dev, fdt, node_off);
145 if (ret < 0) {
146 return ret;
147 }
148 }
149
150 return node_off;
151 }
152
153 /*
154 * CRQ handling
155 */
156 static target_ulong h_reg_crq(PowerPCCPU *cpu, SpaprMachineState *spapr,
157 target_ulong opcode, target_ulong *args)
158 {
159 target_ulong reg = args[0];
160 target_ulong queue_addr = args[1];
161 target_ulong queue_len = args[2];
162 SpaprVioDevice *dev = spapr_vio_find_by_reg(spapr->vio_bus, reg);
163
164 if (!dev) {
165 hcall_dprintf("Unit 0x" TARGET_FMT_lx " does not exist\n", reg);
166 return H_PARAMETER;
167 }
168
169 /* We can't grok a queue size bigger than 256M for now */
170 if (queue_len < 0x1000 || queue_len > 0x10000000) {
171 hcall_dprintf("Queue size too small or too big (0x" TARGET_FMT_lx
172 ")\n", queue_len);
173 return H_PARAMETER;
174 }
175
176 /* Check queue alignment */
177 if (queue_addr & 0xfff) {
178 hcall_dprintf("Queue not aligned (0x" TARGET_FMT_lx ")\n", queue_addr);
179 return H_PARAMETER;
180 }
181
182 /* Check if device supports CRQs */
183 if (!dev->crq.SendFunc) {
184 hcall_dprintf("Device does not support CRQ\n");
185 return H_NOT_FOUND;
186 }
187
188 /* Already a queue ? */
189 if (dev->crq.qsize) {
190 hcall_dprintf("CRQ already registered\n");
191 return H_RESOURCE;
192 }
193 dev->crq.qladdr = queue_addr;
194 dev->crq.qsize = queue_len;
195 dev->crq.qnext = 0;
196
197 trace_spapr_vio_h_reg_crq(reg, queue_addr, queue_len);
198 return H_SUCCESS;
199 }
200
201 static target_ulong free_crq(SpaprVioDevice *dev)
202 {
203 dev->crq.qladdr = 0;
204 dev->crq.qsize = 0;
205 dev->crq.qnext = 0;
206
207 trace_spapr_vio_free_crq(dev->reg);
208
209 return H_SUCCESS;
210 }
211
212 static target_ulong h_free_crq(PowerPCCPU *cpu, SpaprMachineState *spapr,
213 target_ulong opcode, target_ulong *args)
214 {
215 target_ulong reg = args[0];
216 SpaprVioDevice *dev = spapr_vio_find_by_reg(spapr->vio_bus, reg);
217
218 if (!dev) {
219 hcall_dprintf("Unit 0x" TARGET_FMT_lx " does not exist\n", reg);
220 return H_PARAMETER;
221 }
222
223 return free_crq(dev);
224 }
225
226 static target_ulong h_send_crq(PowerPCCPU *cpu, SpaprMachineState *spapr,
227 target_ulong opcode, target_ulong *args)
228 {
229 target_ulong reg = args[0];
230 target_ulong msg_hi = args[1];
231 target_ulong msg_lo = args[2];
232 SpaprVioDevice *dev = spapr_vio_find_by_reg(spapr->vio_bus, reg);
233 uint64_t crq_mangle[2];
234
235 if (!dev) {
236 hcall_dprintf("Unit 0x" TARGET_FMT_lx " does not exist\n", reg);
237 return H_PARAMETER;
238 }
239 crq_mangle[0] = cpu_to_be64(msg_hi);
240 crq_mangle[1] = cpu_to_be64(msg_lo);
241
242 if (dev->crq.SendFunc) {
243 return dev->crq.SendFunc(dev, (uint8_t *)crq_mangle);
244 }
245
246 return H_HARDWARE;
247 }
248
249 static target_ulong h_enable_crq(PowerPCCPU *cpu, SpaprMachineState *spapr,
250 target_ulong opcode, target_ulong *args)
251 {
252 target_ulong reg = args[0];
253 SpaprVioDevice *dev = spapr_vio_find_by_reg(spapr->vio_bus, reg);
254
255 if (!dev) {
256 hcall_dprintf("Unit 0x" TARGET_FMT_lx " does not exist\n", reg);
257 return H_PARAMETER;
258 }
259
260 return 0;
261 }
262
263 /* Returns negative error, 0 success, or positive: queue full */
264 int spapr_vio_send_crq(SpaprVioDevice *dev, uint8_t *crq)
265 {
266 int rc;
267 uint8_t byte;
268
269 if (!dev->crq.qsize) {
270 error_report("spapr_vio_send_creq on uninitialized queue");
271 return -1;
272 }
273
274 /* Maybe do a fast path for KVM just writing to the pages */
275 rc = spapr_vio_dma_read(dev, dev->crq.qladdr + dev->crq.qnext, &byte, 1);
276 if (rc) {
277 return rc;
278 }
279 if (byte != 0) {
280 return 1;
281 }
282
283 rc = spapr_vio_dma_write(dev, dev->crq.qladdr + dev->crq.qnext + 8,
284 &crq[8], 8);
285 if (rc) {
286 return rc;
287 }
288
289 kvmppc_eieio();
290
291 rc = spapr_vio_dma_write(dev, dev->crq.qladdr + dev->crq.qnext, crq, 8);
292 if (rc) {
293 return rc;
294 }
295
296 dev->crq.qnext = (dev->crq.qnext + 16) % dev->crq.qsize;
297
298 if (dev->signal_state & 1) {
299 qemu_irq_pulse(spapr_vio_qirq(dev));
300 }
301
302 return 0;
303 }
304
305 /* "quiesce" handling */
306
307 static void spapr_vio_quiesce_one(SpaprVioDevice *dev)
308 {
309 if (dev->tcet) {
310 device_reset(DEVICE(dev->tcet));
311 }
312 free_crq(dev);
313 }
314
315 void spapr_vio_set_bypass(SpaprVioDevice *dev, bool bypass)
316 {
317 if (!dev->tcet) {
318 return;
319 }
320
321 memory_region_set_enabled(&dev->mrbypass, bypass);
322 memory_region_set_enabled(spapr_tce_get_iommu(dev->tcet), !bypass);
323
324 dev->tcet->bypass = bypass;
325 }
326
327 static void rtas_set_tce_bypass(PowerPCCPU *cpu, SpaprMachineState *spapr,
328 uint32_t token,
329 uint32_t nargs, target_ulong args,
330 uint32_t nret, target_ulong rets)
331 {
332 SpaprVioBus *bus = spapr->vio_bus;
333 SpaprVioDevice *dev;
334 uint32_t unit, enable;
335
336 if (nargs != 2) {
337 rtas_st(rets, 0, RTAS_OUT_PARAM_ERROR);
338 return;
339 }
340 unit = rtas_ld(args, 0);
341 enable = rtas_ld(args, 1);
342 dev = spapr_vio_find_by_reg(bus, unit);
343 if (!dev) {
344 rtas_st(rets, 0, RTAS_OUT_PARAM_ERROR);
345 return;
346 }
347
348 if (!dev->tcet) {
349 rtas_st(rets, 0, RTAS_OUT_PARAM_ERROR);
350 return;
351 }
352
353 spapr_vio_set_bypass(dev, !!enable);
354
355 rtas_st(rets, 0, RTAS_OUT_SUCCESS);
356 }
357
358 static void rtas_quiesce(PowerPCCPU *cpu, SpaprMachineState *spapr,
359 uint32_t token,
360 uint32_t nargs, target_ulong args,
361 uint32_t nret, target_ulong rets)
362 {
363 SpaprVioBus *bus = spapr->vio_bus;
364 BusChild *kid;
365 SpaprVioDevice *dev = NULL;
366
367 if (nargs != 0) {
368 rtas_st(rets, 0, RTAS_OUT_PARAM_ERROR);
369 return;
370 }
371
372 QTAILQ_FOREACH(kid, &bus->bus.children, sibling) {
373 dev = (SpaprVioDevice *)kid->child;
374 spapr_vio_quiesce_one(dev);
375 }
376
377 rtas_st(rets, 0, RTAS_OUT_SUCCESS);
378 }
379
380 static SpaprVioDevice *reg_conflict(SpaprVioDevice *dev)
381 {
382 SpaprVioBus *bus = SPAPR_VIO_BUS(dev->qdev.parent_bus);
383 BusChild *kid;
384 SpaprVioDevice *other;
385
386 /*
387 * Check for a device other than the given one which is already
388 * using the requested address. We have to open code this because
389 * the given dev might already be in the list.
390 */
391 QTAILQ_FOREACH(kid, &bus->bus.children, sibling) {
392 other = VIO_SPAPR_DEVICE(kid->child);
393
394 if (other != dev && other->reg == dev->reg) {
395 return other;
396 }
397 }
398
399 return 0;
400 }
401
402 static void spapr_vio_busdev_reset(DeviceState *qdev)
403 {
404 SpaprVioDevice *dev = VIO_SPAPR_DEVICE(qdev);
405 SpaprVioDeviceClass *pc = VIO_SPAPR_DEVICE_GET_CLASS(dev);
406
407 /* Shut down the request queue and TCEs if necessary */
408 spapr_vio_quiesce_one(dev);
409
410 dev->signal_state = 0;
411
412 spapr_vio_set_bypass(dev, false);
413 if (pc->reset) {
414 pc->reset(dev);
415 }
416 }
417
418 /*
419 * The register property of a VIO device is defined in livirt using
420 * 0x1000 as a base register number plus a 0x1000 increment. For the
421 * VIO tty device, the base number is changed to 0x30000000. QEMU uses
422 * a base register number of 0x71000000 and then a simple increment.
423 *
424 * The formula below tries to compute a unique index number from the
425 * register value that will be used to define the IRQ number of the
426 * VIO device.
427 *
428 * A maximum of 256 VIO devices is covered. Collisions are possible
429 * but they will be detected when the IRQ is claimed.
430 */
431 static inline uint32_t spapr_vio_reg_to_irq(uint32_t reg)
432 {
433 uint32_t irq;
434
435 if (reg >= SPAPR_VIO_REG_BASE) {
436 /*
437 * VIO device register values when allocated by QEMU. For
438 * these, we simply mask the high bits to fit the overall
439 * range: [0x00 - 0xff].
440 *
441 * The nvram VIO device (reg=0x71000000) is a static device of
442 * the pseries machine and so is always allocated by QEMU. Its
443 * IRQ number is 0x0.
444 */
445 irq = reg & 0xff;
446
447 } else if (reg >= 0x30000000) {
448 /*
449 * VIO tty devices register values, when allocated by livirt,
450 * are mapped in range [0xf0 - 0xff], gives us a maximum of 16
451 * vtys.
452 */
453 irq = 0xf0 | ((reg >> 12) & 0xf);
454
455 } else {
456 /*
457 * Other VIO devices register values, when allocated by
458 * livirt, should be mapped in range [0x00 - 0xef]. Conflicts
459 * will be detected when IRQ is claimed.
460 */
461 irq = (reg >> 12) & 0xff;
462 }
463
464 return SPAPR_IRQ_VIO | irq;
465 }
466
467 static void spapr_vio_busdev_realize(DeviceState *qdev, Error **errp)
468 {
469 SpaprMachineState *spapr = SPAPR_MACHINE(qdev_get_machine());
470 SpaprVioDevice *dev = (SpaprVioDevice *)qdev;
471 SpaprVioDeviceClass *pc = VIO_SPAPR_DEVICE_GET_CLASS(dev);
472 char *id;
473 Error *local_err = NULL;
474
475 if (dev->reg != -1) {
476 /*
477 * Explicitly assigned address, just verify that no-one else
478 * is using it. other mechanism). We have to open code this
479 * rather than using spapr_vio_find_by_reg() because sdev
480 * itself is already in the list.
481 */
482 SpaprVioDevice *other = reg_conflict(dev);
483
484 if (other) {
485 error_setg(errp, "%s and %s devices conflict at address %#x",
486 object_get_typename(OBJECT(qdev)),
487 object_get_typename(OBJECT(&other->qdev)),
488 dev->reg);
489 return;
490 }
491 } else {
492 /* Need to assign an address */
493 SpaprVioBus *bus = SPAPR_VIO_BUS(dev->qdev.parent_bus);
494
495 do {
496 dev->reg = bus->next_reg++;
497 } while (reg_conflict(dev));
498 }
499
500 /* Don't overwrite ids assigned on the command line */
501 if (!dev->qdev.id) {
502 id = spapr_vio_get_dev_name(DEVICE(dev));
503 dev->qdev.id = id;
504 }
505
506 dev->irq = spapr_vio_reg_to_irq(dev->reg);
507
508 if (SPAPR_MACHINE_GET_CLASS(spapr)->legacy_irq_allocation) {
509 dev->irq = spapr_irq_findone(spapr, &local_err);
510 if (local_err) {
511 error_propagate(errp, local_err);
512 return;
513 }
514 }
515
516 spapr_irq_claim(spapr, dev->irq, false, &local_err);
517 if (local_err) {
518 error_propagate(errp, local_err);
519 return;
520 }
521
522 if (pc->rtce_window_size) {
523 uint32_t liobn = SPAPR_VIO_LIOBN(dev->reg);
524
525 memory_region_init(&dev->mrroot, OBJECT(dev), "iommu-spapr-root",
526 ram_size);
527 memory_region_init_alias(&dev->mrbypass, OBJECT(dev),
528 "iommu-spapr-bypass", get_system_memory(),
529 0, ram_size);
530 memory_region_add_subregion_overlap(&dev->mrroot, 0, &dev->mrbypass, 1);
531 address_space_init(&dev->as, &dev->mrroot, qdev->id);
532
533 dev->tcet = spapr_tce_new_table(qdev, liobn);
534 spapr_tce_table_enable(dev->tcet, SPAPR_TCE_PAGE_SHIFT, 0,
535 pc->rtce_window_size >> SPAPR_TCE_PAGE_SHIFT);
536 dev->tcet->vdev = dev;
537 memory_region_add_subregion_overlap(&dev->mrroot, 0,
538 spapr_tce_get_iommu(dev->tcet), 2);
539 }
540
541 pc->realize(dev, errp);
542 }
543
544 static target_ulong h_vio_signal(PowerPCCPU *cpu, SpaprMachineState *spapr,
545 target_ulong opcode,
546 target_ulong *args)
547 {
548 target_ulong reg = args[0];
549 target_ulong mode = args[1];
550 SpaprVioDevice *dev = spapr_vio_find_by_reg(spapr->vio_bus, reg);
551 SpaprVioDeviceClass *pc;
552
553 if (!dev) {
554 return H_PARAMETER;
555 }
556
557 pc = VIO_SPAPR_DEVICE_GET_CLASS(dev);
558
559 if (mode & ~pc->signal_mask) {
560 return H_PARAMETER;
561 }
562
563 dev->signal_state = mode;
564
565 return H_SUCCESS;
566 }
567
568 SpaprVioBus *spapr_vio_bus_init(void)
569 {
570 SpaprVioBus *bus;
571 BusState *qbus;
572 DeviceState *dev;
573
574 /* Create bridge device */
575 dev = qdev_create(NULL, TYPE_SPAPR_VIO_BRIDGE);
576 qdev_init_nofail(dev);
577
578 /* Create bus on bridge device */
579 qbus = qbus_create(TYPE_SPAPR_VIO_BUS, dev, "spapr-vio");
580 bus = SPAPR_VIO_BUS(qbus);
581 bus->next_reg = SPAPR_VIO_REG_BASE;
582
583 /* hcall-vio */
584 spapr_register_hypercall(H_VIO_SIGNAL, h_vio_signal);
585
586 /* hcall-crq */
587 spapr_register_hypercall(H_REG_CRQ, h_reg_crq);
588 spapr_register_hypercall(H_FREE_CRQ, h_free_crq);
589 spapr_register_hypercall(H_SEND_CRQ, h_send_crq);
590 spapr_register_hypercall(H_ENABLE_CRQ, h_enable_crq);
591
592 /* RTAS calls */
593 spapr_rtas_register(RTAS_IBM_SET_TCE_BYPASS, "ibm,set-tce-bypass",
594 rtas_set_tce_bypass);
595 spapr_rtas_register(RTAS_QUIESCE, "quiesce", rtas_quiesce);
596
597 return bus;
598 }
599
600 static void spapr_vio_bridge_class_init(ObjectClass *klass, void *data)
601 {
602 DeviceClass *dc = DEVICE_CLASS(klass);
603
604 dc->fw_name = "vdevice";
605 }
606
607 static const TypeInfo spapr_vio_bridge_info = {
608 .name = TYPE_SPAPR_VIO_BRIDGE,
609 .parent = TYPE_SYS_BUS_DEVICE,
610 .class_init = spapr_vio_bridge_class_init,
611 };
612
613 const VMStateDescription vmstate_spapr_vio = {
614 .name = "spapr_vio",
615 .version_id = 1,
616 .minimum_version_id = 1,
617 .fields = (VMStateField[]) {
618 /* Sanity check */
619 VMSTATE_UINT32_EQUAL(reg, SpaprVioDevice, NULL),
620 VMSTATE_UINT32_EQUAL(irq, SpaprVioDevice, NULL),
621
622 /* General VIO device state */
623 VMSTATE_UINT64(signal_state, SpaprVioDevice),
624 VMSTATE_UINT64(crq.qladdr, SpaprVioDevice),
625 VMSTATE_UINT32(crq.qsize, SpaprVioDevice),
626 VMSTATE_UINT32(crq.qnext, SpaprVioDevice),
627
628 VMSTATE_END_OF_LIST()
629 },
630 };
631
632 static void vio_spapr_device_class_init(ObjectClass *klass, void *data)
633 {
634 DeviceClass *k = DEVICE_CLASS(klass);
635 k->realize = spapr_vio_busdev_realize;
636 k->reset = spapr_vio_busdev_reset;
637 k->bus_type = TYPE_SPAPR_VIO_BUS;
638 }
639
640 static const TypeInfo spapr_vio_type_info = {
641 .name = TYPE_VIO_SPAPR_DEVICE,
642 .parent = TYPE_DEVICE,
643 .instance_size = sizeof(SpaprVioDevice),
644 .abstract = true,
645 .class_size = sizeof(SpaprVioDeviceClass),
646 .class_init = vio_spapr_device_class_init,
647 };
648
649 static void spapr_vio_register_types(void)
650 {
651 type_register_static(&spapr_vio_bus_info);
652 type_register_static(&spapr_vio_bridge_info);
653 type_register_static(&spapr_vio_type_info);
654 }
655
656 type_init(spapr_vio_register_types)
657
658 static int compare_reg(const void *p1, const void *p2)
659 {
660 SpaprVioDevice const *dev1, *dev2;
661
662 dev1 = (SpaprVioDevice *)*(DeviceState **)p1;
663 dev2 = (SpaprVioDevice *)*(DeviceState **)p2;
664
665 if (dev1->reg < dev2->reg) {
666 return -1;
667 }
668 if (dev1->reg == dev2->reg) {
669 return 0;
670 }
671
672 /* dev1->reg > dev2->reg */
673 return 1;
674 }
675
676 void spapr_dt_vdevice(SpaprVioBus *bus, void *fdt)
677 {
678 DeviceState *qdev, **qdevs;
679 BusChild *kid;
680 int i, num, ret = 0;
681 int node;
682
683 _FDT(node = fdt_add_subnode(fdt, 0, "vdevice"));
684
685 _FDT(fdt_setprop_string(fdt, node, "device_type", "vdevice"));
686 _FDT(fdt_setprop_string(fdt, node, "compatible", "IBM,vdevice"));
687 _FDT(fdt_setprop_cell(fdt, node, "#address-cells", 1));
688 _FDT(fdt_setprop_cell(fdt, node, "#size-cells", 0));
689 _FDT(fdt_setprop_cell(fdt, node, "#interrupt-cells", 2));
690 _FDT(fdt_setprop(fdt, node, "interrupt-controller", NULL, 0));
691
692 /* Count qdevs on the bus list */
693 num = 0;
694 QTAILQ_FOREACH(kid, &bus->bus.children, sibling) {
695 num++;
696 }
697
698 /* Copy out into an array of pointers */
699 qdevs = g_new(DeviceState *, num);
700 num = 0;
701 QTAILQ_FOREACH(kid, &bus->bus.children, sibling) {
702 qdevs[num++] = kid->child;
703 }
704
705 /* Sort the array */
706 qsort(qdevs, num, sizeof(qdev), compare_reg);
707
708 /* Hack alert. Give the devices to libfdt in reverse order, we happen
709 * to know that will mean they are in forward order in the tree. */
710 for (i = num - 1; i >= 0; i--) {
711 SpaprVioDevice *dev = (SpaprVioDevice *)(qdevs[i]);
712 SpaprVioDeviceClass *vdc = VIO_SPAPR_DEVICE_GET_CLASS(dev);
713
714 ret = vio_make_devnode(dev, fdt);
715 if (ret < 0) {
716 error_report("Couldn't create device node /vdevice/%s@%"PRIx32,
717 vdc->dt_name, dev->reg);
718 exit(1);
719 }
720 }
721
722 g_free(qdevs);
723 }
724
725 gchar *spapr_vio_stdout_path(SpaprVioBus *bus)
726 {
727 SpaprVioDevice *dev;
728 char *name, *path;
729
730 dev = spapr_vty_get_default(bus);
731 if (!dev) {
732 return NULL;
733 }
734
735 name = spapr_vio_get_dev_name(DEVICE(dev));
736 path = g_strdup_printf("/vdevice/%s", name);
737
738 g_free(name);
739 return path;
740 }