hw/timer/nrf51_timer.c

   1 /*
   2  * nRF51 System-on-Chip Timer peripheral
   3  *
   4  * Reference Manual: http://infocenter.nordicsemi.com/pdf/nRF51_RM_v3.0.pdf
   5  * Product Spec: http://infocenter.nordicsemi.com/pdf/nRF51822_PS_v3.1.pdf
   6  *
   7  * Copyright 2018 Steffen Görtz <contrib@steffen-goertz.de>
   8  * Copyright (c) 2019 Red Hat, Inc.
   9  *
  10  * This code is licensed under the GPL version 2 or later.  See
  11  * the COPYING file in the top-level directory.
  12  */
  13
  14 #include "qemu/osdep.h"
  15 #include "qemu/log.h"
  16 #include "qemu/module.h"
  17 #include "hw/arm/nrf51.h"
  18 #include "hw/irq.h"
  19 #include "hw/timer/nrf51_timer.h"
  20 #include "trace.h"
  21
  22 #define TIMER_CLK_FREQ 16000000UL
  23
  24 static uint32_t const bitwidths[] = {16, 8, 24, 32};
  25
  26 static uint32_t ns_to_ticks(NRF51TimerState *s, int64_t ns)
  27 {
  28     uint32_t freq = TIMER_CLK_FREQ >> s->prescaler;
  29
  30     return muldiv64(ns, freq, NANOSECONDS_PER_SECOND);
  31 }
  32
  33 static int64_t ticks_to_ns(NRF51TimerState *s, uint32_t ticks)
  34 {
  35     uint32_t freq = TIMER_CLK_FREQ >> s->prescaler;
  36
  37     return muldiv64(ticks, NANOSECONDS_PER_SECOND, freq);
  38 }
  39
  40 /* Returns number of ticks since last call */
  41 static uint32_t update_counter(NRF51TimerState *s, int64_t now)
  42 {
  43     uint32_t ticks = ns_to_ticks(s, now - s->update_counter_ns);
  44
  45     s->counter = (s->counter + ticks) % BIT(bitwidths[s->bitmode]);
  46     s->update_counter_ns = now;
  47     return ticks;
  48 }
  49
  50 /* Assumes s->counter is up-to-date */
  51 static void rearm_timer(NRF51TimerState *s, int64_t now)
  52 {
  53     int64_t min_ns = INT64_MAX;
  54     size_t i;
  55
  56     for (i = 0; i < NRF51_TIMER_REG_COUNT; i++) {
  57         int64_t delta_ns;
  58
  59         if (s->events_compare[i]) {
  60             continue; /* already expired, ignore it for now */
  61         }
  62
  63         if (s->cc[i] <= s->counter) {
  64             delta_ns = ticks_to_ns(s, BIT(bitwidths[s->bitmode]) -
  65                                       s->counter + s->cc[i]);
  66         } else {
  67             delta_ns = ticks_to_ns(s, s->cc[i] - s->counter);
  68         }
  69
  70         if (delta_ns < min_ns) {
  71             min_ns = delta_ns;
  72         }
  73     }
  74
  75     if (min_ns != INT64_MAX) {
  76         timer_mod_ns(&s->timer, now + min_ns);
  77     }
  78 }
  79
  80 static void update_irq(NRF51TimerState *s)
  81 {
  82     bool flag = false;
  83     size_t i;
  84
  85     for (i = 0; i < NRF51_TIMER_REG_COUNT; i++) {
  86         flag |= s->events_compare[i] && extract32(s->inten, 16 + i, 1);
  87     }
  88     qemu_set_irq(s->irq, flag);
  89 }
  90
  91 static void timer_expire(void *opaque)
  92 {
  93     NRF51TimerState *s = NRF51_TIMER(opaque);
  94     int64_t now = qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL);
  95     uint32_t cc_remaining[NRF51_TIMER_REG_COUNT];
  96     bool should_stop = false;
  97     uint32_t ticks;
  98     size_t i;
  99
 100     for (i = 0; i < NRF51_TIMER_REG_COUNT; i++) {
 101         if (s->cc[i] > s->counter) {
 102             cc_remaining[i] = s->cc[i] - s->counter;
 103         } else {
 104             cc_remaining[i] = BIT(bitwidths[s->bitmode]) -
 105                               s->counter + s->cc[i];
 106         }
 107     }
 108
 109     ticks = update_counter(s, now);
 110
 111     for (i = 0; i < NRF51_TIMER_REG_COUNT; i++) {
 112         if (cc_remaining[i] <= ticks) {
 113             s->events_compare[i] = 1;
 114
 115             if (s->shorts & BIT(i)) {
 116                 s->timer_start_ns = now;
 117                 s->update_counter_ns = s->timer_start_ns;
 118                 s->counter = 0;
 119             }
 120
 121             should_stop |= s->shorts & BIT(i + 8);
 122         }
 123     }
 124
 125     update_irq(s);
 126
 127     if (should_stop) {
 128         s->running = false;
 129         timer_del(&s->timer);
 130     } else {
 131         rearm_timer(s, now);
 132     }
 133 }
 134
 135 static void counter_compare(NRF51TimerState *s)
 136 {
 137     uint32_t counter = s->counter;
 138     size_t i;
 139
 140     for (i = 0; i < NRF51_TIMER_REG_COUNT; i++) {
 141         if (counter == s->cc[i]) {
 142             s->events_compare[i] = 1;
 143
 144             if (s->shorts & BIT(i)) {
 145                 s->counter = 0;
 146             }
 147         }
 148     }
 149 }
 150
 151 static uint64_t nrf51_timer_read(void *opaque, hwaddr offset, unsigned int size)
 152 {
 153     NRF51TimerState *s = NRF51_TIMER(opaque);
 154     uint64_t r = 0;
 155
 156     switch (offset) {
 157     case NRF51_TIMER_EVENT_COMPARE_0 ... NRF51_TIMER_EVENT_COMPARE_3:
 158         r = s->events_compare[(offset - NRF51_TIMER_EVENT_COMPARE_0) / 4];
 159         break;
 160     case NRF51_TIMER_REG_SHORTS:
 161         r = s->shorts;
 162         break;
 163     case NRF51_TIMER_REG_INTENSET:
 164         r = s->inten;
 165         break;
 166     case NRF51_TIMER_REG_INTENCLR:
 167         r = s->inten;
 168         break;
 169     case NRF51_TIMER_REG_MODE:
 170         r = s->mode;
 171         break;
 172     case NRF51_TIMER_REG_BITMODE:
 173         r = s->bitmode;
 174         break;
 175     case NRF51_TIMER_REG_PRESCALER:
 176         r = s->prescaler;
 177         break;
 178     case NRF51_TIMER_REG_CC0 ... NRF51_TIMER_REG_CC3:
 179         r = s->cc[(offset - NRF51_TIMER_REG_CC0) / 4];
 180         break;
 181     default:
 182         qemu_log_mask(LOG_GUEST_ERROR,
 183                 "%s: bad read offset 0x%" HWADDR_PRIx "\n",
 184                       __func__, offset);
 185     }
 186
 187     trace_nrf51_timer_read(offset, r, size);
 188
 189     return r;
 190 }
 191
 192 static void nrf51_timer_write(void *opaque, hwaddr offset,
 193                        uint64_t value, unsigned int size)
 194 {
 195     NRF51TimerState *s = NRF51_TIMER(opaque);
 196     uint64_t now = qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL);
 197     size_t idx;
 198
 199     trace_nrf51_timer_write(offset, value, size);
 200
 201     switch (offset) {
 202     case NRF51_TIMER_TASK_START:
 203         if (value == NRF51_TRIGGER_TASK && s->mode == NRF51_TIMER_TIMER) {
 204             s->running = true;
 205             s->timer_start_ns = now - ticks_to_ns(s, s->counter);
 206             s->update_counter_ns = s->timer_start_ns;
 207             rearm_timer(s, now);
 208         }
 209         break;
 210     case NRF51_TIMER_TASK_STOP:
 211     case NRF51_TIMER_TASK_SHUTDOWN:
 212         if (value == NRF51_TRIGGER_TASK) {
 213             s->running = false;
 214             timer_del(&s->timer);
 215         }
 216         break;
 217     case NRF51_TIMER_TASK_COUNT:
 218         if (value == NRF51_TRIGGER_TASK && s->mode == NRF51_TIMER_COUNTER) {
 219             s->counter = (s->counter + 1) % BIT(bitwidths[s->bitmode]);
 220             counter_compare(s);
 221         }
 222         break;
 223     case NRF51_TIMER_TASK_CLEAR:
 224         if (value == NRF51_TRIGGER_TASK) {
 225             s->timer_start_ns = now;
 226             s->update_counter_ns = s->timer_start_ns;
 227             s->counter = 0;
 228             if (s->running) {
 229                 rearm_timer(s, now);
 230             }
 231         }
 232         break;
 233     case NRF51_TIMER_TASK_CAPTURE_0 ... NRF51_TIMER_TASK_CAPTURE_3:
 234         if (value == NRF51_TRIGGER_TASK) {
 235             if (s->running) {
 236                 timer_expire(s); /* update counter and all state */
 237             }
 238
 239             idx = (offset - NRF51_TIMER_TASK_CAPTURE_0) / 4;
 240             s->cc[idx] = s->counter;
 241         }
 242         break;
 243     case NRF51_TIMER_EVENT_COMPARE_0 ... NRF51_TIMER_EVENT_COMPARE_3:
 244         if (value == NRF51_EVENT_CLEAR) {
 245             s->events_compare[(offset - NRF51_TIMER_EVENT_COMPARE_0) / 4] = 0;
 246
 247             if (s->running) {
 248                 timer_expire(s); /* update counter and all state */
 249             }
 250         }
 251         break;
 252     case NRF51_TIMER_REG_SHORTS:
 253         s->shorts = value & NRF51_TIMER_REG_SHORTS_MASK;
 254         break;
 255     case NRF51_TIMER_REG_INTENSET:
 256         s->inten |= value & NRF51_TIMER_REG_INTEN_MASK;
 257         break;
 258     case NRF51_TIMER_REG_INTENCLR:
 259         s->inten &= ~(value & NRF51_TIMER_REG_INTEN_MASK);
 260         break;
 261     case NRF51_TIMER_REG_MODE:
 262         s->mode = value;
 263         break;
 264     case NRF51_TIMER_REG_BITMODE:
 265         if (s->mode == NRF51_TIMER_TIMER && s->running) {
 266             qemu_log_mask(LOG_GUEST_ERROR,
 267                     "%s: erroneous change of BITMODE while timer is running\n",
 268                     __func__);
 269         }
 270         s->bitmode = value & NRF51_TIMER_REG_BITMODE_MASK;
 271         break;
 272     case NRF51_TIMER_REG_PRESCALER:
 273         if (s->mode == NRF51_TIMER_TIMER && s->running) {
 274             qemu_log_mask(LOG_GUEST_ERROR,
 275                 "%s: erroneous change of PRESCALER while timer is running\n",
 276                 __func__);
 277         }
 278         s->prescaler = value & NRF51_TIMER_REG_PRESCALER_MASK;
 279         break;
 280     case NRF51_TIMER_REG_CC0 ... NRF51_TIMER_REG_CC3:
 281         if (s->running) {
 282             timer_expire(s); /* update counter */
 283         }
 284
 285         idx = (offset - NRF51_TIMER_REG_CC0) / 4;
 286         s->cc[idx] = value % BIT(bitwidths[s->bitmode]);
 287
 288         if (s->running) {
 289             rearm_timer(s, now);
 290         }
 291         break;
 292     default:
 293         qemu_log_mask(LOG_GUEST_ERROR,
 294                       "%s: bad write offset 0x%" HWADDR_PRIx "\n",
 295                       __func__, offset);
 296     }
 297
 298     update_irq(s);
 299 }
 300
 301 static const MemoryRegionOps rng_ops = {
 302     .read =  nrf51_timer_read,
 303     .write = nrf51_timer_write,
 304     .endianness = DEVICE_LITTLE_ENDIAN,
 305     .impl.min_access_size = 4,
 306     .impl.max_access_size = 4,
 307 };
 308
 309 static void nrf51_timer_init(Object *obj)
 310 {
 311     NRF51TimerState *s = NRF51_TIMER(obj);
 312     SysBusDevice *sbd = SYS_BUS_DEVICE(obj);
 313
 314     memory_region_init_io(&s->iomem, obj, &rng_ops, s,
 315             TYPE_NRF51_TIMER, NRF51_TIMER_SIZE);
 316     sysbus_init_mmio(sbd, &s->iomem);
 317     sysbus_init_irq(sbd, &s->irq);
 318
 319     timer_init_ns(&s->timer, QEMU_CLOCK_VIRTUAL, timer_expire, s);
 320 }
 321
 322 static void nrf51_timer_reset(DeviceState *dev)
 323 {
 324     NRF51TimerState *s = NRF51_TIMER(dev);
 325
 326     timer_del(&s->timer);
 327     s->timer_start_ns = 0x00;
 328     s->update_counter_ns = 0x00;
 329     s->counter = 0x00;
 330     s->running = false;
 331
 332     memset(s->events_compare, 0x00, sizeof(s->events_compare));
 333     memset(s->cc, 0x00, sizeof(s->cc));
 334
 335     s->shorts = 0x00;
 336     s->inten = 0x00;
 337     s->mode = 0x00;
 338     s->bitmode = 0x00;
 339     s->prescaler = 0x00;
 340 }
 341
 342 static int nrf51_timer_post_load(void *opaque, int version_id)
 343 {
 344     NRF51TimerState *s = NRF51_TIMER(opaque);
 345
 346     if (s->running && s->mode == NRF51_TIMER_TIMER) {
 347         timer_expire(s);
 348     }
 349     return 0;
 350 }
 351
 352 static const VMStateDescription vmstate_nrf51_timer = {
 353     .name = TYPE_NRF51_TIMER,
 354     .version_id = 1,
 355     .post_load = nrf51_timer_post_load,
 356     .fields = (VMStateField[]) {
 357         VMSTATE_TIMER(timer, NRF51TimerState),
 358         VMSTATE_INT64(timer_start_ns, NRF51TimerState),
 359         VMSTATE_INT64(update_counter_ns, NRF51TimerState),
 360         VMSTATE_UINT32(counter, NRF51TimerState),
 361         VMSTATE_BOOL(running, NRF51TimerState),
 362         VMSTATE_UINT8_ARRAY(events_compare, NRF51TimerState,
 363                             NRF51_TIMER_REG_COUNT),
 364         VMSTATE_UINT32_ARRAY(cc, NRF51TimerState, NRF51_TIMER_REG_COUNT),
 365         VMSTATE_UINT32(shorts, NRF51TimerState),
 366         VMSTATE_UINT32(inten, NRF51TimerState),
 367         VMSTATE_UINT32(mode, NRF51TimerState),
 368         VMSTATE_UINT32(bitmode, NRF51TimerState),
 369         VMSTATE_UINT32(prescaler, NRF51TimerState),
 370         VMSTATE_END_OF_LIST()
 371     }
 372 };
 373
 374 static void nrf51_timer_class_init(ObjectClass *klass, void *data)
 375 {
 376     DeviceClass *dc = DEVICE_CLASS(klass);
 377
 378     dc->reset = nrf51_timer_reset;
 379     dc->vmsd = &vmstate_nrf51_timer;
 380 }
 381
 382 static const TypeInfo nrf51_timer_info = {
 383     .name = TYPE_NRF51_TIMER,
 384     .parent = TYPE_SYS_BUS_DEVICE,
 385     .instance_size = sizeof(NRF51TimerState),
 386     .instance_init = nrf51_timer_init,
 387     .class_init = nrf51_timer_class_init
 388 };
 389
 390 static void nrf51_timer_register_types(void)
 391 {
 392     type_register_static(&nrf51_timer_info);
 393 }
 394
 395 type_init(nrf51_timer_register_types)