]> git.ipfire.org Git - thirdparty/qemu.git/blob - hw/virtio/virtio-pci.c
projects / thirdparty / qemu.git / blob
? search:
summary | shortlog | log | commit | commitdiff | tree
blame | history | raw | HEAD
Merge tag 'for_upstream' of https://git.kernel.org/pub/scm/virt/kvm/mst/qemu into...
[thirdparty/qemu.git] / hw / virtio / virtio-pci.c
1 /*
2 * Virtio PCI Bindings
3 *
4 * Copyright IBM, Corp. 2007
5 * Copyright (c) 2009 CodeSourcery
6 *
7 * Authors:
8 * Anthony Liguori <aliguori@us.ibm.com>
9 * Paul Brook <paul@codesourcery.com>
10 *
11 * This work is licensed under the terms of the GNU GPL, version 2. See
12 * the COPYING file in the top-level directory.
13 *
14 * Contributions after 2012-01-13 are licensed under the terms of the
15 * GNU GPL, version 2 or (at your option) any later version.
16 */
17
18 #include "qemu/osdep.h"
19
20 #include "exec/memop.h"
21 #include "standard-headers/linux/virtio_pci.h"
22 #include "standard-headers/linux/virtio_ids.h"
23 #include "hw/boards.h"
24 #include "hw/virtio/virtio.h"
25 #include "migration/qemu-file-types.h"
26 #include "hw/pci/pci.h"
27 #include "hw/pci/pci_bus.h"
28 #include "hw/qdev-properties.h"
29 #include "qapi/error.h"
30 #include "qemu/error-report.h"
31 #include "qemu/log.h"
32 #include "qemu/module.h"
33 #include "hw/pci/msi.h"
34 #include "hw/pci/msix.h"
35 #include "hw/loader.h"
36 #include "sysemu/kvm.h"
37 #include "hw/virtio/virtio-pci.h"
38 #include "qemu/range.h"
39 #include "hw/virtio/virtio-bus.h"
40 #include "qapi/visitor.h"
41 #include "sysemu/replay.h"
42 #include "trace.h"
43
44 #define VIRTIO_PCI_REGION_SIZE(dev) VIRTIO_PCI_CONFIG_OFF(msix_present(dev))
45
46 #undef VIRTIO_PCI_CONFIG
47
48 /* The remaining space is defined by each driver as the per-driver
49 * configuration space */
50 #define VIRTIO_PCI_CONFIG_SIZE(dev) VIRTIO_PCI_CONFIG_OFF(msix_enabled(dev))
51
52 static void virtio_pci_bus_new(VirtioBusState *bus, size_t bus_size,
53 VirtIOPCIProxy *dev);
54 static void virtio_pci_reset(DeviceState *qdev);
55
56 /* virtio device */
57 /* DeviceState to VirtIOPCIProxy. For use off data-path. TODO: use QOM. */
58 static inline VirtIOPCIProxy *to_virtio_pci_proxy(DeviceState *d)
59 {
60 return container_of(d, VirtIOPCIProxy, pci_dev.qdev);
61 }
62
63 /* DeviceState to VirtIOPCIProxy. Note: used on datapath,
64 * be careful and test performance if you change this.
65 */
66 static inline VirtIOPCIProxy *to_virtio_pci_proxy_fast(DeviceState *d)
67 {
68 return container_of(d, VirtIOPCIProxy, pci_dev.qdev);
69 }
70
71 static void virtio_pci_notify(DeviceState *d, uint16_t vector)
72 {
73 VirtIOPCIProxy *proxy = to_virtio_pci_proxy_fast(d);
74
75 if (msix_enabled(&proxy->pci_dev)) {
76 if (vector != VIRTIO_NO_VECTOR) {
77 msix_notify(&proxy->pci_dev, vector);
78 }
79 } else {
80 VirtIODevice *vdev = virtio_bus_get_device(&proxy->bus);
81 pci_set_irq(&proxy->pci_dev, qatomic_read(&vdev->isr) & 1);
82 }
83 }
84
85 static void virtio_pci_save_config(DeviceState *d, QEMUFile *f)
86 {
87 VirtIOPCIProxy *proxy = to_virtio_pci_proxy(d);
88 VirtIODevice *vdev = virtio_bus_get_device(&proxy->bus);
89
90 pci_device_save(&proxy->pci_dev, f);
91 msix_save(&proxy->pci_dev, f);
92 if (msix_present(&proxy->pci_dev))
93 qemu_put_be16(f, vdev->config_vector);
94 }
95
96 static const VMStateDescription vmstate_virtio_pci_modern_queue_state = {
97 .name = "virtio_pci/modern_queue_state",
98 .version_id = 1,
99 .minimum_version_id = 1,
100 .fields = (const VMStateField[]) {
101 VMSTATE_UINT16(num, VirtIOPCIQueue),
102 VMSTATE_UNUSED(1), /* enabled was stored as be16 */
103 VMSTATE_BOOL(enabled, VirtIOPCIQueue),
104 VMSTATE_UINT32_ARRAY(desc, VirtIOPCIQueue, 2),
105 VMSTATE_UINT32_ARRAY(avail, VirtIOPCIQueue, 2),
106 VMSTATE_UINT32_ARRAY(used, VirtIOPCIQueue, 2),
107 VMSTATE_END_OF_LIST()
108 }
109 };
110
111 static bool virtio_pci_modern_state_needed(void *opaque)
112 {
113 VirtIOPCIProxy *proxy = opaque;
114
115 return virtio_pci_modern(proxy);
116 }
117
118 static const VMStateDescription vmstate_virtio_pci_modern_state_sub = {
119 .name = "virtio_pci/modern_state",
120 .version_id = 1,
121 .minimum_version_id = 1,
122 .needed = &virtio_pci_modern_state_needed,
123 .fields = (const VMStateField[]) {
124 VMSTATE_UINT32(dfselect, VirtIOPCIProxy),
125 VMSTATE_UINT32(gfselect, VirtIOPCIProxy),
126 VMSTATE_UINT32_ARRAY(guest_features, VirtIOPCIProxy, 2),
127 VMSTATE_STRUCT_ARRAY(vqs, VirtIOPCIProxy, VIRTIO_QUEUE_MAX, 0,
128 vmstate_virtio_pci_modern_queue_state,
129 VirtIOPCIQueue),
130 VMSTATE_END_OF_LIST()
131 }
132 };
133
134 static const VMStateDescription vmstate_virtio_pci = {
135 .name = "virtio_pci",
136 .version_id = 1,
137 .minimum_version_id = 1,
138 .fields = (const VMStateField[]) {
139 VMSTATE_END_OF_LIST()
140 },
141 .subsections = (const VMStateDescription * const []) {
142 &vmstate_virtio_pci_modern_state_sub,
143 NULL
144 }
145 };
146
147 static bool virtio_pci_has_extra_state(DeviceState *d)
148 {
149 VirtIOPCIProxy *proxy = to_virtio_pci_proxy(d);
150
151 return proxy->flags & VIRTIO_PCI_FLAG_MIGRATE_EXTRA;
152 }
153
154 static void virtio_pci_save_extra_state(DeviceState *d, QEMUFile *f)
155 {
156 VirtIOPCIProxy *proxy = to_virtio_pci_proxy(d);
157
158 vmstate_save_state(f, &vmstate_virtio_pci, proxy, NULL);
159 }
160
161 static int virtio_pci_load_extra_state(DeviceState *d, QEMUFile *f)
162 {
163 VirtIOPCIProxy *proxy = to_virtio_pci_proxy(d);
164
165 return vmstate_load_state(f, &vmstate_virtio_pci, proxy, 1);
166 }
167
168 static void virtio_pci_save_queue(DeviceState *d, int n, QEMUFile *f)
169 {
170 VirtIOPCIProxy *proxy = to_virtio_pci_proxy(d);
171 VirtIODevice *vdev = virtio_bus_get_device(&proxy->bus);
172
173 if (msix_present(&proxy->pci_dev))
174 qemu_put_be16(f, virtio_queue_vector(vdev, n));
175 }
176
177 static int virtio_pci_load_config(DeviceState *d, QEMUFile *f)
178 {
179 VirtIOPCIProxy *proxy = to_virtio_pci_proxy(d);
180 VirtIODevice *vdev = virtio_bus_get_device(&proxy->bus);
181 uint16_t vector;
182
183 int ret;
184 ret = pci_device_load(&proxy->pci_dev, f);
185 if (ret) {
186 return ret;
187 }
188 msix_unuse_all_vectors(&proxy->pci_dev);
189 msix_load(&proxy->pci_dev, f);
190 if (msix_present(&proxy->pci_dev)) {
191 qemu_get_be16s(f, &vector);
192
193 if (vector != VIRTIO_NO_VECTOR && vector >= proxy->nvectors) {
194 return -EINVAL;
195 }
196 } else {
197 vector = VIRTIO_NO_VECTOR;
198 }
199 vdev->config_vector = vector;
200 if (vector != VIRTIO_NO_VECTOR) {
201 msix_vector_use(&proxy->pci_dev, vector);
202 }
203 return 0;
204 }
205
206 static int virtio_pci_load_queue(DeviceState *d, int n, QEMUFile *f)
207 {
208 VirtIOPCIProxy *proxy = to_virtio_pci_proxy(d);
209 VirtIODevice *vdev = virtio_bus_get_device(&proxy->bus);
210
211 uint16_t vector;
212 if (msix_present(&proxy->pci_dev)) {
213 qemu_get_be16s(f, &vector);
214 if (vector != VIRTIO_NO_VECTOR && vector >= proxy->nvectors) {
215 return -EINVAL;
216 }
217 } else {
218 vector = VIRTIO_NO_VECTOR;
219 }
220 virtio_queue_set_vector(vdev, n, vector);
221 if (vector != VIRTIO_NO_VECTOR) {
222 msix_vector_use(&proxy->pci_dev, vector);
223 }
224
225 return 0;
226 }
227
228 typedef struct VirtIOPCIIDInfo {
229 /* virtio id */
230 uint16_t vdev_id;
231 /* pci device id for the transitional device */
232 uint16_t trans_devid;
233 uint16_t class_id;
234 } VirtIOPCIIDInfo;
235
236 static const VirtIOPCIIDInfo virtio_pci_id_info[] = {
237 {
238 .vdev_id = VIRTIO_ID_CRYPTO,
239 .class_id = PCI_CLASS_OTHERS,
240 }, {
241 .vdev_id = VIRTIO_ID_FS,
242 .class_id = PCI_CLASS_STORAGE_OTHER,
243 }, {
244 .vdev_id = VIRTIO_ID_NET,
245 .trans_devid = PCI_DEVICE_ID_VIRTIO_NET,
246 .class_id = PCI_CLASS_NETWORK_ETHERNET,
247 }, {
248 .vdev_id = VIRTIO_ID_BLOCK,
249 .trans_devid = PCI_DEVICE_ID_VIRTIO_BLOCK,
250 .class_id = PCI_CLASS_STORAGE_SCSI,
251 }, {
252 .vdev_id = VIRTIO_ID_CONSOLE,
253 .trans_devid = PCI_DEVICE_ID_VIRTIO_CONSOLE,
254 .class_id = PCI_CLASS_COMMUNICATION_OTHER,
255 }, {
256 .vdev_id = VIRTIO_ID_SCSI,
257 .trans_devid = PCI_DEVICE_ID_VIRTIO_SCSI,
258 .class_id = PCI_CLASS_STORAGE_SCSI
259 }, {
260 .vdev_id = VIRTIO_ID_9P,
261 .trans_devid = PCI_DEVICE_ID_VIRTIO_9P,
262 .class_id = PCI_BASE_CLASS_NETWORK,
263 }, {
264 .vdev_id = VIRTIO_ID_BALLOON,
265 .trans_devid = PCI_DEVICE_ID_VIRTIO_BALLOON,
266 .class_id = PCI_CLASS_OTHERS,
267 }, {
268 .vdev_id = VIRTIO_ID_RNG,
269 .trans_devid = PCI_DEVICE_ID_VIRTIO_RNG,
270 .class_id = PCI_CLASS_OTHERS,
271 },
272 };
273
274 static const VirtIOPCIIDInfo *virtio_pci_get_id_info(uint16_t vdev_id)
275 {
276 const VirtIOPCIIDInfo *info = NULL;
277 int i;
278
279 for (i = 0; i < ARRAY_SIZE(virtio_pci_id_info); i++) {
280 if (virtio_pci_id_info[i].vdev_id == vdev_id) {
281 info = &virtio_pci_id_info[i];
282 break;
283 }
284 }
285
286 if (!info) {
287 /* The device id is invalid or not added to the id_info yet. */
288 error_report("Invalid virtio device(id %u)", vdev_id);
289 abort();
290 }
291
292 return info;
293 }
294
295 /*
296 * Get the Transitional Device ID for the specific device, return
297 * zero if the device is non-transitional.
298 */
299 uint16_t virtio_pci_get_trans_devid(uint16_t device_id)
300 {
301 return virtio_pci_get_id_info(device_id)->trans_devid;
302 }
303
304 /*
305 * Get the Class ID for the specific device.
306 */
307 uint16_t virtio_pci_get_class_id(uint16_t device_id)
308 {
309 return virtio_pci_get_id_info(device_id)->class_id;
310 }
311
312 static bool virtio_pci_ioeventfd_enabled(DeviceState *d)
313 {
314 VirtIOPCIProxy *proxy = to_virtio_pci_proxy(d);
315
316 return (proxy->flags & VIRTIO_PCI_FLAG_USE_IOEVENTFD) != 0;
317 }
318
319 #define QEMU_VIRTIO_PCI_QUEUE_MEM_MULT 0x1000
320
321 static inline int virtio_pci_queue_mem_mult(struct VirtIOPCIProxy *proxy)
322 {
323 return (proxy->flags & VIRTIO_PCI_FLAG_PAGE_PER_VQ) ?
324 QEMU_VIRTIO_PCI_QUEUE_MEM_MULT : 4;
325 }
326
327 static int virtio_pci_ioeventfd_assign(DeviceState *d, EventNotifier *notifier,
328 int n, bool assign)
329 {
330 VirtIOPCIProxy *proxy = to_virtio_pci_proxy(d);
331 VirtIODevice *vdev = virtio_bus_get_device(&proxy->bus);
332 VirtQueue *vq = virtio_get_queue(vdev, n);
333 bool legacy = virtio_pci_legacy(proxy);
334 bool modern = virtio_pci_modern(proxy);
335 bool modern_pio = proxy->flags & VIRTIO_PCI_FLAG_MODERN_PIO_NOTIFY;
336 MemoryRegion *modern_mr = &proxy->notify.mr;
337 MemoryRegion *modern_notify_mr = &proxy->notify_pio.mr;
338 MemoryRegion *legacy_mr = &proxy->bar;
339 hwaddr modern_addr = virtio_pci_queue_mem_mult(proxy) *
340 virtio_get_queue_index(vq);
341 hwaddr legacy_addr = VIRTIO_PCI_QUEUE_NOTIFY;
342
343 if (assign) {
344 if (modern) {
345 memory_region_add_eventfd(modern_mr, modern_addr, 0,
346 false, n, notifier);
347 if (modern_pio) {
348 memory_region_add_eventfd(modern_notify_mr, 0, 2,
349 true, n, notifier);
350 }
351 }
352 if (legacy) {
353 memory_region_add_eventfd(legacy_mr, legacy_addr, 2,
354 true, n, notifier);
355 }
356 } else {
357 if (modern) {
358 memory_region_del_eventfd(modern_mr, modern_addr, 0,
359 false, n, notifier);
360 if (modern_pio) {
361 memory_region_del_eventfd(modern_notify_mr, 0, 2,
362 true, n, notifier);
363 }
364 }
365 if (legacy) {
366 memory_region_del_eventfd(legacy_mr, legacy_addr, 2,
367 true, n, notifier);
368 }
369 }
370 return 0;
371 }
372
373 static void virtio_pci_start_ioeventfd(VirtIOPCIProxy *proxy)
374 {
375 virtio_bus_start_ioeventfd(&proxy->bus);
376 }
377
378 static void virtio_pci_stop_ioeventfd(VirtIOPCIProxy *proxy)
379 {
380 virtio_bus_stop_ioeventfd(&proxy->bus);
381 }
382
383 static void virtio_ioport_write(void *opaque, uint32_t addr, uint32_t val)
384 {
385 VirtIOPCIProxy *proxy = opaque;
386 VirtIODevice *vdev = virtio_bus_get_device(&proxy->bus);
387 uint16_t vector;
388 hwaddr pa;
389
390 switch (addr) {
391 case VIRTIO_PCI_GUEST_FEATURES:
392 /* Guest does not negotiate properly? We have to assume nothing. */
393 if (val & (1 << VIRTIO_F_BAD_FEATURE)) {
394 val = virtio_bus_get_vdev_bad_features(&proxy->bus);
395 }
396 virtio_set_features(vdev, val);
397 break;
398 case VIRTIO_PCI_QUEUE_PFN:
399 pa = (hwaddr)val << VIRTIO_PCI_QUEUE_ADDR_SHIFT;
400 if (pa == 0) {
401 virtio_pci_reset(DEVICE(proxy));
402 }
403 else
404 virtio_queue_set_addr(vdev, vdev->queue_sel, pa);
405 break;
406 case VIRTIO_PCI_QUEUE_SEL:
407 if (val < VIRTIO_QUEUE_MAX)
408 vdev->queue_sel = val;
409 break;
410 case VIRTIO_PCI_QUEUE_NOTIFY:
411 if (val < VIRTIO_QUEUE_MAX) {
412 virtio_queue_notify(vdev, val);
413 }
414 break;
415 case VIRTIO_PCI_STATUS:
416 if (!(val & VIRTIO_CONFIG_S_DRIVER_OK)) {
417 virtio_pci_stop_ioeventfd(proxy);
418 }
419
420 virtio_set_status(vdev, val & 0xFF);
421
422 if (val & VIRTIO_CONFIG_S_DRIVER_OK) {
423 virtio_pci_start_ioeventfd(proxy);
424 }
425
426 if (vdev->status == 0) {
427 virtio_pci_reset(DEVICE(proxy));
428 }
429
430 /* Linux before 2.6.34 drives the device without enabling
431 the PCI device bus master bit. Enable it automatically
432 for the guest. This is a PCI spec violation but so is
433 initiating DMA with bus master bit clear. */
434 if (val == (VIRTIO_CONFIG_S_ACKNOWLEDGE | VIRTIO_CONFIG_S_DRIVER)) {
435 pci_default_write_config(&proxy->pci_dev, PCI_COMMAND,
436 proxy->pci_dev.config[PCI_COMMAND] |
437 PCI_COMMAND_MASTER, 1);
438 }
439 break;
440 case VIRTIO_MSI_CONFIG_VECTOR:
441 if (vdev->config_vector != VIRTIO_NO_VECTOR) {
442 msix_vector_unuse(&proxy->pci_dev, vdev->config_vector);
443 }
444 /* Make it possible for guest to discover an error took place. */
445 if (val < proxy->nvectors) {
446 msix_vector_use(&proxy->pci_dev, val);
447 } else {
448 val = VIRTIO_NO_VECTOR;
449 }
450 vdev->config_vector = val;
451 break;
452 case VIRTIO_MSI_QUEUE_VECTOR:
453 vector = virtio_queue_vector(vdev, vdev->queue_sel);
454 if (vector != VIRTIO_NO_VECTOR) {
455 msix_vector_unuse(&proxy->pci_dev, vector);
456 }
457 /* Make it possible for guest to discover an error took place. */
458 if (val < proxy->nvectors) {
459 msix_vector_use(&proxy->pci_dev, val);
460 } else {
461 val = VIRTIO_NO_VECTOR;
462 }
463 virtio_queue_set_vector(vdev, vdev->queue_sel, val);
464 break;
465 default:
466 qemu_log_mask(LOG_GUEST_ERROR,
467 "%s: unexpected address 0x%x value 0x%x\n",
468 __func__, addr, val);
469 break;
470 }
471 }
472
473 static uint32_t virtio_ioport_read(VirtIOPCIProxy *proxy, uint32_t addr)
474 {
475 VirtIODevice *vdev = virtio_bus_get_device(&proxy->bus);
476 uint32_t ret = 0xFFFFFFFF;
477
478 switch (addr) {
479 case VIRTIO_PCI_HOST_FEATURES:
480 ret = vdev->host_features;
481 break;
482 case VIRTIO_PCI_GUEST_FEATURES:
483 ret = vdev->guest_features;
484 break;
485 case VIRTIO_PCI_QUEUE_PFN:
486 ret = virtio_queue_get_addr(vdev, vdev->queue_sel)
487 >> VIRTIO_PCI_QUEUE_ADDR_SHIFT;
488 break;
489 case VIRTIO_PCI_QUEUE_NUM:
490 ret = virtio_queue_get_num(vdev, vdev->queue_sel);
491 break;
492 case VIRTIO_PCI_QUEUE_SEL:
493 ret = vdev->queue_sel;
494 break;
495 case VIRTIO_PCI_STATUS:
496 ret = vdev->status;
497 break;
498 case VIRTIO_PCI_ISR:
499 /* reading from the ISR also clears it. */
500 ret = qatomic_xchg(&vdev->isr, 0);
501 pci_irq_deassert(&proxy->pci_dev);
502 break;
503 case VIRTIO_MSI_CONFIG_VECTOR:
504 ret = vdev->config_vector;
505 break;
506 case VIRTIO_MSI_QUEUE_VECTOR:
507 ret = virtio_queue_vector(vdev, vdev->queue_sel);
508 break;
509 default:
510 break;
511 }
512
513 return ret;
514 }
515
516 static uint64_t virtio_pci_config_read(void *opaque, hwaddr addr,
517 unsigned size)
518 {
519 VirtIOPCIProxy *proxy = opaque;
520 VirtIODevice *vdev = virtio_bus_get_device(&proxy->bus);
521 uint32_t config = VIRTIO_PCI_CONFIG_SIZE(&proxy->pci_dev);
522 uint64_t val = 0;
523
524 if (vdev == NULL) {
525 return UINT64_MAX;
526 }
527
528 if (addr < config) {
529 return virtio_ioport_read(proxy, addr);
530 }
531 addr -= config;
532
533 switch (size) {
534 case 1:
535 val = virtio_config_readb(vdev, addr);
536 break;
537 case 2:
538 val = virtio_config_readw(vdev, addr);
539 if (virtio_is_big_endian(vdev)) {
540 val = bswap16(val);
541 }
542 break;
543 case 4:
544 val = virtio_config_readl(vdev, addr);
545 if (virtio_is_big_endian(vdev)) {
546 val = bswap32(val);
547 }
548 break;
549 }
550 return val;
551 }
552
553 static void virtio_pci_config_write(void *opaque, hwaddr addr,
554 uint64_t val, unsigned size)
555 {
556 VirtIOPCIProxy *proxy = opaque;
557 uint32_t config = VIRTIO_PCI_CONFIG_SIZE(&proxy->pci_dev);
558 VirtIODevice *vdev = virtio_bus_get_device(&proxy->bus);
559
560 if (vdev == NULL) {
561 return;
562 }
563
564 if (addr < config) {
565 virtio_ioport_write(proxy, addr, val);
566 return;
567 }
568 addr -= config;
569 /*
570 * Virtio-PCI is odd. Ioports are LE but config space is target native
571 * endian.
572 */
573 switch (size) {
574 case 1:
575 virtio_config_writeb(vdev, addr, val);
576 break;
577 case 2:
578 if (virtio_is_big_endian(vdev)) {
579 val = bswap16(val);
580 }
581 virtio_config_writew(vdev, addr, val);
582 break;
583 case 4:
584 if (virtio_is_big_endian(vdev)) {
585 val = bswap32(val);
586 }
587 virtio_config_writel(vdev, addr, val);
588 break;
589 }
590 }
591
592 static const MemoryRegionOps virtio_pci_config_ops = {
593 .read = virtio_pci_config_read,
594 .write = virtio_pci_config_write,
595 .impl = {
596 .min_access_size = 1,
597 .max_access_size = 4,
598 },
599 .endianness = DEVICE_LITTLE_ENDIAN,
600 };
601
602 static MemoryRegion *virtio_address_space_lookup(VirtIOPCIProxy *proxy,
603 hwaddr *off, int len)
604 {
605 int i;
606 VirtIOPCIRegion *reg;
607
608 for (i = 0; i < ARRAY_SIZE(proxy->regs); ++i) {
609 reg = &proxy->regs[i];
610 if (*off >= reg->offset &&
611 *off + len <= reg->offset + reg->size) {
612 *off -= reg->offset;
613 return &reg->mr;
614 }
615 }
616
617 return NULL;
618 }
619
620 /* Below are generic functions to do memcpy from/to an address space,
621 * without byteswaps, with input validation.
622 *
623 * As regular address_space_* APIs all do some kind of byteswap at least for
624 * some host/target combinations, we are forced to explicitly convert to a
625 * known-endianness integer value.
626 * It doesn't really matter which endian format to go through, so the code
627 * below selects the endian that causes the least amount of work on the given
628 * host.
629 *
630 * Note: host pointer must be aligned.
631 */
632 static
633 void virtio_address_space_write(VirtIOPCIProxy *proxy, hwaddr addr,
634 const uint8_t *buf, int len)
635 {
636 uint64_t val;
637 MemoryRegion *mr;
638
639 /* address_space_* APIs assume an aligned address.
640 * As address is under guest control, handle illegal values.
641 */
642 addr &= ~(len - 1);
643
644 mr = virtio_address_space_lookup(proxy, &addr, len);
645 if (!mr) {
646 return;
647 }
648
649 /* Make sure caller aligned buf properly */
650 assert(!(((uintptr_t)buf) & (len - 1)));
651
652 switch (len) {
653 case 1:
654 val = pci_get_byte(buf);
655 break;
656 case 2:
657 val = pci_get_word(buf);
658 break;
659 case 4:
660 val = pci_get_long(buf);
661 break;
662 default:
663 /* As length is under guest control, handle illegal values. */
664 return;
665 }
666 memory_region_dispatch_write(mr, addr, val, size_memop(len) | MO_LE,
667 MEMTXATTRS_UNSPECIFIED);
668 }
669
670 static void
671 virtio_address_space_read(VirtIOPCIProxy *proxy, hwaddr addr,
672 uint8_t *buf, int len)
673 {
674 uint64_t val;
675 MemoryRegion *mr;
676
677 /* address_space_* APIs assume an aligned address.
678 * As address is under guest control, handle illegal values.
679 */
680 addr &= ~(len - 1);
681
682 mr = virtio_address_space_lookup(proxy, &addr, len);
683 if (!mr) {
684 return;
685 }
686
687 /* Make sure caller aligned buf properly */
688 assert(!(((uintptr_t)buf) & (len - 1)));
689
690 memory_region_dispatch_read(mr, addr, &val, size_memop(len) | MO_LE,
691 MEMTXATTRS_UNSPECIFIED);
692 switch (len) {
693 case 1:
694 pci_set_byte(buf, val);
695 break;
696 case 2:
697 pci_set_word(buf, val);
698 break;
699 case 4:
700 pci_set_long(buf, val);
701 break;
702 default:
703 /* As length is under guest control, handle illegal values. */
704 break;
705 }
706 }
707
708 static void virtio_pci_ats_ctrl_trigger(PCIDevice *pci_dev, bool enable)
709 {
710 VirtIOPCIProxy *proxy = VIRTIO_PCI(pci_dev);
711 VirtIODevice *vdev = virtio_bus_get_device(&proxy->bus);
712 VirtioDeviceClass *k = VIRTIO_DEVICE_GET_CLASS(vdev);
713
714 vdev->device_iotlb_enabled = enable;
715
716 if (k->toggle_device_iotlb) {
717 k->toggle_device_iotlb(vdev);
718 }
719 }
720
721 static void pcie_ats_config_write(PCIDevice *dev, uint32_t address,
722 uint32_t val, int len)
723 {
724 uint32_t off;
725 uint16_t ats_cap = dev->exp.ats_cap;
726
727 if (!ats_cap || address < ats_cap) {
728 return;
729 }
730 off = address - ats_cap;
731 if (off >= PCI_EXT_CAP_ATS_SIZEOF) {
732 return;
733 }
734
735 if (range_covers_byte(off, len, PCI_ATS_CTRL + 1)) {
736 virtio_pci_ats_ctrl_trigger(dev, !!(val & PCI_ATS_CTRL_ENABLE));
737 }
738 }
739
740 static void virtio_write_config(PCIDevice *pci_dev, uint32_t address,
741 uint32_t val, int len)
742 {
743 VirtIOPCIProxy *proxy = VIRTIO_PCI(pci_dev);
744 VirtIODevice *vdev = virtio_bus_get_device(&proxy->bus);
745 struct virtio_pci_cfg_cap *cfg;
746
747 pci_default_write_config(pci_dev, address, val, len);
748
749 if (proxy->flags & VIRTIO_PCI_FLAG_INIT_FLR) {
750 pcie_cap_flr_write_config(pci_dev, address, val, len);
751 }
752
753 if (proxy->flags & VIRTIO_PCI_FLAG_ATS) {
754 pcie_ats_config_write(pci_dev, address, val, len);
755 }
756
757 if (range_covers_byte(address, len, PCI_COMMAND)) {
758 if (!(pci_dev->config[PCI_COMMAND] & PCI_COMMAND_MASTER)) {
759 virtio_set_disabled(vdev, true);
760 virtio_pci_stop_ioeventfd(proxy);
761 virtio_set_status(vdev, vdev->status & ~VIRTIO_CONFIG_S_DRIVER_OK);
762 } else {
763 virtio_set_disabled(vdev, false);
764 }
765 }
766
767 if (proxy->config_cap &&
768 ranges_overlap(address, len, proxy->config_cap + offsetof(struct virtio_pci_cfg_cap,
769 pci_cfg_data),
770 sizeof cfg->pci_cfg_data)) {
771 uint32_t off;
772 uint32_t caplen;
773
774 cfg = (void *)(proxy->pci_dev.config + proxy->config_cap);
775 off = le32_to_cpu(cfg->cap.offset);
776 caplen = le32_to_cpu(cfg->cap.length);
777
778 if (caplen == 1 || caplen == 2 || caplen == 4) {
779 assert(caplen <= sizeof cfg->pci_cfg_data);
780 virtio_address_space_write(proxy, off, cfg->pci_cfg_data, caplen);
781 }
782 }
783 }
784
785 static uint32_t virtio_read_config(PCIDevice *pci_dev,
786 uint32_t address, int len)
787 {
788 VirtIOPCIProxy *proxy = VIRTIO_PCI(pci_dev);
789 struct virtio_pci_cfg_cap *cfg;
790
791 if (proxy->config_cap &&
792 ranges_overlap(address, len, proxy->config_cap + offsetof(struct virtio_pci_cfg_cap,
793 pci_cfg_data),
794 sizeof cfg->pci_cfg_data)) {
795 uint32_t off;
796 uint32_t caplen;
797
798 cfg = (void *)(proxy->pci_dev.config + proxy->config_cap);
799 off = le32_to_cpu(cfg->cap.offset);
800 caplen = le32_to_cpu(cfg->cap.length);
801
802 if (caplen == 1 || caplen == 2 || caplen == 4) {
803 assert(caplen <= sizeof cfg->pci_cfg_data);
804 virtio_address_space_read(proxy, off, cfg->pci_cfg_data, caplen);
805 }
806 }
807
808 return pci_default_read_config(pci_dev, address, len);
809 }
810
811 static int kvm_virtio_pci_vq_vector_use(VirtIOPCIProxy *proxy,
812 unsigned int vector)
813 {
814 VirtIOIRQFD *irqfd = &proxy->vector_irqfd[vector];
815 int ret;
816
817 if (irqfd->users == 0) {
818 KVMRouteChange c = kvm_irqchip_begin_route_changes(kvm_state);
819 ret = kvm_irqchip_add_msi_route(&c, vector, &proxy->pci_dev);
820 if (ret < 0) {
821 return ret;
822 }
823 kvm_irqchip_commit_route_changes(&c);
824 irqfd->virq = ret;
825 }
826 irqfd->users++;
827 return 0;
828 }
829
830 static void kvm_virtio_pci_vq_vector_release(VirtIOPCIProxy *proxy,
831 unsigned int vector)
832 {
833 VirtIOIRQFD *irqfd = &proxy->vector_irqfd[vector];
834 if (--irqfd->users == 0) {
835 kvm_irqchip_release_virq(kvm_state, irqfd->virq);
836 }
837 }
838
839 static int kvm_virtio_pci_irqfd_use(VirtIOPCIProxy *proxy,
840 EventNotifier *n,
841 unsigned int vector)
842 {
843 VirtIOIRQFD *irqfd = &proxy->vector_irqfd[vector];
844 return kvm_irqchip_add_irqfd_notifier_gsi(kvm_state, n, NULL, irqfd->virq);
845 }
846
847 static void kvm_virtio_pci_irqfd_release(VirtIOPCIProxy *proxy,
848 EventNotifier *n ,
849 unsigned int vector)
850 {
851 VirtIOIRQFD *irqfd = &proxy->vector_irqfd[vector];
852 int ret;
853
854 ret = kvm_irqchip_remove_irqfd_notifier_gsi(kvm_state, n, irqfd->virq);
855 assert(ret == 0);
856 }
857 static int virtio_pci_get_notifier(VirtIOPCIProxy *proxy, int queue_no,
858 EventNotifier **n, unsigned int *vector)
859 {
860 VirtIODevice *vdev = virtio_bus_get_device(&proxy->bus);
861 VirtQueue *vq;
862
863 if (queue_no == VIRTIO_CONFIG_IRQ_IDX) {
864 *n = virtio_config_get_guest_notifier(vdev);
865 *vector = vdev->config_vector;
866 } else {
867 if (!virtio_queue_get_num(vdev, queue_no)) {
868 return -1;
869 }
870 *vector = virtio_queue_vector(vdev, queue_no);
871 vq = virtio_get_queue(vdev, queue_no);
872 *n = virtio_queue_get_guest_notifier(vq);
873 }
874 return 0;
875 }
876
877 static int kvm_virtio_pci_vector_use_one(VirtIOPCIProxy *proxy, int queue_no)
878 {
879 unsigned int vector;
880 int ret;
881 EventNotifier *n;
882 PCIDevice *dev = &proxy->pci_dev;
883 VirtIODevice *vdev = virtio_bus_get_device(&proxy->bus);
884 VirtioDeviceClass *k = VIRTIO_DEVICE_GET_CLASS(vdev);
885
886 ret = virtio_pci_get_notifier(proxy, queue_no, &n, &vector);
887 if (ret < 0) {
888 return ret;
889 }
890 if (vector >= msix_nr_vectors_allocated(dev)) {
891 return 0;
892 }
893 ret = kvm_virtio_pci_vq_vector_use(proxy, vector);
894 if (ret < 0) {
895 goto undo;
896 }
897 /*
898 * If guest supports masking, set up irqfd now.
899 * Otherwise, delay until unmasked in the frontend.
900 */
901 if (vdev->use_guest_notifier_mask && k->guest_notifier_mask) {
902 ret = kvm_virtio_pci_irqfd_use(proxy, n, vector);
903 if (ret < 0) {
904 kvm_virtio_pci_vq_vector_release(proxy, vector);
905 goto undo;
906 }
907 }
908
909 return 0;
910 undo:
911
912 vector = virtio_queue_vector(vdev, queue_no);
913 if (vector >= msix_nr_vectors_allocated(dev)) {
914 return ret;
915 }
916 if (vdev->use_guest_notifier_mask && k->guest_notifier_mask) {
917 ret = virtio_pci_get_notifier(proxy, queue_no, &n, &vector);
918 if (ret < 0) {
919 return ret;
920 }
921 kvm_virtio_pci_irqfd_release(proxy, n, vector);
922 }
923 return ret;
924 }
925 static int kvm_virtio_pci_vector_vq_use(VirtIOPCIProxy *proxy, int nvqs)
926 {
927 int queue_no;
928 int ret = 0;
929 VirtIODevice *vdev = virtio_bus_get_device(&proxy->bus);
930
931 for (queue_no = 0; queue_no < nvqs; queue_no++) {
932 if (!virtio_queue_get_num(vdev, queue_no)) {
933 return -1;
934 }
935 ret = kvm_virtio_pci_vector_use_one(proxy, queue_no);
936 }
937 return ret;
938 }
939
940 static int kvm_virtio_pci_vector_config_use(VirtIOPCIProxy *proxy)
941 {
942 return kvm_virtio_pci_vector_use_one(proxy, VIRTIO_CONFIG_IRQ_IDX);
943 }
944
945 static void kvm_virtio_pci_vector_release_one(VirtIOPCIProxy *proxy,
946 int queue_no)
947 {
948 VirtIODevice *vdev = virtio_bus_get_device(&proxy->bus);
949 unsigned int vector;
950 EventNotifier *n;
951 int ret;
952 VirtioDeviceClass *k = VIRTIO_DEVICE_GET_CLASS(vdev);
953 PCIDevice *dev = &proxy->pci_dev;
954
955 ret = virtio_pci_get_notifier(proxy, queue_no, &n, &vector);
956 if (ret < 0) {
957 return;
958 }
959 if (vector >= msix_nr_vectors_allocated(dev)) {
960 return;
961 }
962 if (vdev->use_guest_notifier_mask && k->guest_notifier_mask) {
963 kvm_virtio_pci_irqfd_release(proxy, n, vector);
964 }
965 kvm_virtio_pci_vq_vector_release(proxy, vector);
966 }
967
968 static void kvm_virtio_pci_vector_vq_release(VirtIOPCIProxy *proxy, int nvqs)
969 {
970 int queue_no;
971 VirtIODevice *vdev = virtio_bus_get_device(&proxy->bus);
972
973 for (queue_no = 0; queue_no < nvqs; queue_no++) {
974 if (!virtio_queue_get_num(vdev, queue_no)) {
975 break;
976 }
977 kvm_virtio_pci_vector_release_one(proxy, queue_no);
978 }
979 }
980
981 static void kvm_virtio_pci_vector_config_release(VirtIOPCIProxy *proxy)
982 {
983 kvm_virtio_pci_vector_release_one(proxy, VIRTIO_CONFIG_IRQ_IDX);
984 }
985
986 static int virtio_pci_one_vector_unmask(VirtIOPCIProxy *proxy,
987 unsigned int queue_no,
988 unsigned int vector,
989 MSIMessage msg,
990 EventNotifier *n)
991 {
992 VirtIODevice *vdev = virtio_bus_get_device(&proxy->bus);
993 VirtioDeviceClass *k = VIRTIO_DEVICE_GET_CLASS(vdev);
994 VirtIOIRQFD *irqfd;
995 int ret = 0;
996
997 if (proxy->vector_irqfd) {
998 irqfd = &proxy->vector_irqfd[vector];
999 if (irqfd->msg.data != msg.data || irqfd->msg.address != msg.address) {
1000 ret = kvm_irqchip_update_msi_route(kvm_state, irqfd->virq, msg,
1001 &proxy->pci_dev);
1002 if (ret < 0) {
1003 return ret;
1004 }
1005 kvm_irqchip_commit_routes(kvm_state);
1006 }
1007 }
1008
1009 /* If guest supports masking, irqfd is already setup, unmask it.
1010 * Otherwise, set it up now.
1011 */
1012 if (vdev->use_guest_notifier_mask && k->guest_notifier_mask) {
1013 k->guest_notifier_mask(vdev, queue_no, false);
1014 /* Test after unmasking to avoid losing events. */
1015 if (k->guest_notifier_pending &&
1016 k->guest_notifier_pending(vdev, queue_no)) {
1017 event_notifier_set(n);
1018 }
1019 } else {
1020 ret = kvm_virtio_pci_irqfd_use(proxy, n, vector);
1021 }
1022 return ret;
1023 }
1024
1025 static void virtio_pci_one_vector_mask(VirtIOPCIProxy *proxy,
1026 unsigned int queue_no,
1027 unsigned int vector,
1028 EventNotifier *n)
1029 {
1030 VirtIODevice *vdev = virtio_bus_get_device(&proxy->bus);
1031 VirtioDeviceClass *k = VIRTIO_DEVICE_GET_CLASS(vdev);
1032
1033 /* If guest supports masking, keep irqfd but mask it.
1034 * Otherwise, clean it up now.
1035 */
1036 if (vdev->use_guest_notifier_mask && k->guest_notifier_mask) {
1037 k->guest_notifier_mask(vdev, queue_no, true);
1038 } else {
1039 kvm_virtio_pci_irqfd_release(proxy, n, vector);
1040 }
1041 }
1042
1043 static int virtio_pci_vector_unmask(PCIDevice *dev, unsigned vector,
1044 MSIMessage msg)
1045 {
1046 VirtIOPCIProxy *proxy = container_of(dev, VirtIOPCIProxy, pci_dev);
1047 VirtIODevice *vdev = virtio_bus_get_device(&proxy->bus);
1048 VirtQueue *vq = virtio_vector_first_queue(vdev, vector);
1049 EventNotifier *n;
1050 int ret, index, unmasked = 0;
1051
1052 while (vq) {
1053 index = virtio_get_queue_index(vq);
1054 if (!virtio_queue_get_num(vdev, index)) {
1055 break;
1056 }
1057 if (index < proxy->nvqs_with_notifiers) {
1058 n = virtio_queue_get_guest_notifier(vq);
1059 ret = virtio_pci_one_vector_unmask(proxy, index, vector, msg, n);
1060 if (ret < 0) {
1061 goto undo;
1062 }
1063 ++unmasked;
1064 }
1065 vq = virtio_vector_next_queue(vq);
1066 }
1067 /* unmask config intr */
1068 if (vector == vdev->config_vector) {
1069 n = virtio_config_get_guest_notifier(vdev);
1070 ret = virtio_pci_one_vector_unmask(proxy, VIRTIO_CONFIG_IRQ_IDX, vector,
1071 msg, n);
1072 if (ret < 0) {
1073 goto undo_config;
1074 }
1075 }
1076 return 0;
1077 undo_config:
1078 n = virtio_config_get_guest_notifier(vdev);
1079 virtio_pci_one_vector_mask(proxy, VIRTIO_CONFIG_IRQ_IDX, vector, n);
1080 undo:
1081 vq = virtio_vector_first_queue(vdev, vector);
1082 while (vq && unmasked >= 0) {
1083 index = virtio_get_queue_index(vq);
1084 if (index < proxy->nvqs_with_notifiers) {
1085 n = virtio_queue_get_guest_notifier(vq);
1086 virtio_pci_one_vector_mask(proxy, index, vector, n);
1087 --unmasked;
1088 }
1089 vq = virtio_vector_next_queue(vq);
1090 }
1091 return ret;
1092 }
1093
1094 static void virtio_pci_vector_mask(PCIDevice *dev, unsigned vector)
1095 {
1096 VirtIOPCIProxy *proxy = container_of(dev, VirtIOPCIProxy, pci_dev);
1097 VirtIODevice *vdev = virtio_bus_get_device(&proxy->bus);
1098 VirtQueue *vq = virtio_vector_first_queue(vdev, vector);
1099 EventNotifier *n;
1100 int index;
1101
1102 while (vq) {
1103 index = virtio_get_queue_index(vq);
1104 n = virtio_queue_get_guest_notifier(vq);
1105 if (!virtio_queue_get_num(vdev, index)) {
1106 break;
1107 }
1108 if (index < proxy->nvqs_with_notifiers) {
1109 virtio_pci_one_vector_mask(proxy, index, vector, n);
1110 }
1111 vq = virtio_vector_next_queue(vq);
1112 }
1113
1114 if (vector == vdev->config_vector) {
1115 n = virtio_config_get_guest_notifier(vdev);
1116 virtio_pci_one_vector_mask(proxy, VIRTIO_CONFIG_IRQ_IDX, vector, n);
1117 }
1118 }
1119
1120 static void virtio_pci_vector_poll(PCIDevice *dev,
1121 unsigned int vector_start,
1122 unsigned int vector_end)
1123 {
1124 VirtIOPCIProxy *proxy = container_of(dev, VirtIOPCIProxy, pci_dev);
1125 VirtIODevice *vdev = virtio_bus_get_device(&proxy->bus);
1126 VirtioDeviceClass *k = VIRTIO_DEVICE_GET_CLASS(vdev);
1127 int queue_no;
1128 unsigned int vector;
1129 EventNotifier *notifier;
1130 int ret;
1131
1132 for (queue_no = 0; queue_no < proxy->nvqs_with_notifiers; queue_no++) {
1133 ret = virtio_pci_get_notifier(proxy, queue_no, &notifier, &vector);
1134 if (ret < 0) {
1135 break;
1136 }
1137 if (vector < vector_start || vector >= vector_end ||
1138 !msix_is_masked(dev, vector)) {
1139 continue;
1140 }
1141 if (k->guest_notifier_pending) {
1142 if (k->guest_notifier_pending(vdev, queue_no)) {
1143 msix_set_pending(dev, vector);
1144 }
1145 } else if (event_notifier_test_and_clear(notifier)) {
1146 msix_set_pending(dev, vector);
1147 }
1148 }
1149 /* poll the config intr */
1150 ret = virtio_pci_get_notifier(proxy, VIRTIO_CONFIG_IRQ_IDX, &notifier,
1151 &vector);
1152 if (ret < 0) {
1153 return;
1154 }
1155 if (vector < vector_start || vector >= vector_end ||
1156 !msix_is_masked(dev, vector)) {
1157 return;
1158 }
1159 if (k->guest_notifier_pending) {
1160 if (k->guest_notifier_pending(vdev, VIRTIO_CONFIG_IRQ_IDX)) {
1161 msix_set_pending(dev, vector);
1162 }
1163 } else if (event_notifier_test_and_clear(notifier)) {
1164 msix_set_pending(dev, vector);
1165 }
1166 }
1167
1168 void virtio_pci_set_guest_notifier_fd_handler(VirtIODevice *vdev, VirtQueue *vq,
1169 int n, bool assign,
1170 bool with_irqfd)
1171 {
1172 if (n == VIRTIO_CONFIG_IRQ_IDX) {
1173 virtio_config_set_guest_notifier_fd_handler(vdev, assign, with_irqfd);
1174 } else {
1175 virtio_queue_set_guest_notifier_fd_handler(vq, assign, with_irqfd);
1176 }
1177 }
1178
1179 static int virtio_pci_set_guest_notifier(DeviceState *d, int n, bool assign,
1180 bool with_irqfd)
1181 {
1182 VirtIOPCIProxy *proxy = to_virtio_pci_proxy(d);
1183 VirtIODevice *vdev = virtio_bus_get_device(&proxy->bus);
1184 VirtioDeviceClass *vdc = VIRTIO_DEVICE_GET_CLASS(vdev);
1185 VirtQueue *vq = NULL;
1186 EventNotifier *notifier = NULL;
1187
1188 if (n == VIRTIO_CONFIG_IRQ_IDX) {
1189 notifier = virtio_config_get_guest_notifier(vdev);
1190 } else {
1191 vq = virtio_get_queue(vdev, n);
1192 notifier = virtio_queue_get_guest_notifier(vq);
1193 }
1194
1195 if (assign) {
1196 int r = event_notifier_init(notifier, 0);
1197 if (r < 0) {
1198 return r;
1199 }
1200 virtio_pci_set_guest_notifier_fd_handler(vdev, vq, n, true, with_irqfd);
1201 } else {
1202 virtio_pci_set_guest_notifier_fd_handler(vdev, vq, n, false,
1203 with_irqfd);
1204 event_notifier_cleanup(notifier);
1205 }
1206
1207 if (!msix_enabled(&proxy->pci_dev) &&
1208 vdev->use_guest_notifier_mask &&
1209 vdc->guest_notifier_mask) {
1210 vdc->guest_notifier_mask(vdev, n, !assign);
1211 }
1212
1213 return 0;
1214 }
1215
1216 static bool virtio_pci_query_guest_notifiers(DeviceState *d)
1217 {
1218 VirtIOPCIProxy *proxy = to_virtio_pci_proxy(d);
1219 return msix_enabled(&proxy->pci_dev);
1220 }
1221
1222 static int virtio_pci_set_guest_notifiers(DeviceState *d, int nvqs, bool assign)
1223 {
1224 VirtIOPCIProxy *proxy = to_virtio_pci_proxy(d);
1225 VirtIODevice *vdev = virtio_bus_get_device(&proxy->bus);
1226 VirtioDeviceClass *k = VIRTIO_DEVICE_GET_CLASS(vdev);
1227 int r, n;
1228 bool with_irqfd = msix_enabled(&proxy->pci_dev) &&
1229 kvm_msi_via_irqfd_enabled();
1230
1231 nvqs = MIN(nvqs, VIRTIO_QUEUE_MAX);
1232
1233 /*
1234 * When deassigning, pass a consistent nvqs value to avoid leaking
1235 * notifiers. But first check we've actually been configured, exit
1236 * early if we haven't.
1237 */
1238 if (!assign && !proxy->nvqs_with_notifiers) {
1239 return 0;
1240 }
1241 assert(assign || nvqs == proxy->nvqs_with_notifiers);
1242
1243 proxy->nvqs_with_notifiers = nvqs;
1244
1245 /* Must unset vector notifier while guest notifier is still assigned */
1246 if ((proxy->vector_irqfd ||
1247 (vdev->use_guest_notifier_mask && k->guest_notifier_mask)) &&
1248 !assign) {
1249 msix_unset_vector_notifiers(&proxy->pci_dev);
1250 if (proxy->vector_irqfd) {
1251 kvm_virtio_pci_vector_vq_release(proxy, nvqs);
1252 kvm_virtio_pci_vector_config_release(proxy);
1253 g_free(proxy->vector_irqfd);
1254 proxy->vector_irqfd = NULL;
1255 }
1256 }
1257
1258 for (n = 0; n < nvqs; n++) {
1259 if (!virtio_queue_get_num(vdev, n)) {
1260 break;
1261 }
1262
1263 r = virtio_pci_set_guest_notifier(d, n, assign, with_irqfd);
1264 if (r < 0) {
1265 goto assign_error;
1266 }
1267 }
1268 r = virtio_pci_set_guest_notifier(d, VIRTIO_CONFIG_IRQ_IDX, assign,
1269 with_irqfd);
1270 if (r < 0) {
1271 goto config_assign_error;
1272 }
1273 /* Must set vector notifier after guest notifier has been assigned */
1274 if ((with_irqfd ||
1275 (vdev->use_guest_notifier_mask && k->guest_notifier_mask)) &&
1276 assign) {
1277 if (with_irqfd) {
1278 proxy->vector_irqfd =
1279 g_malloc0(sizeof(*proxy->vector_irqfd) *
1280 msix_nr_vectors_allocated(&proxy->pci_dev));
1281 r = kvm_virtio_pci_vector_vq_use(proxy, nvqs);
1282 if (r < 0) {
1283 goto config_assign_error;
1284 }
1285 r = kvm_virtio_pci_vector_config_use(proxy);
1286 if (r < 0) {
1287 goto config_error;
1288 }
1289 }
1290
1291 r = msix_set_vector_notifiers(&proxy->pci_dev, virtio_pci_vector_unmask,
1292 virtio_pci_vector_mask,
1293 virtio_pci_vector_poll);
1294 if (r < 0) {
1295 goto notifiers_error;
1296 }
1297 }
1298
1299 return 0;
1300
1301 notifiers_error:
1302 if (with_irqfd) {
1303 assert(assign);
1304 kvm_virtio_pci_vector_vq_release(proxy, nvqs);
1305 }
1306 config_error:
1307 if (with_irqfd) {
1308 kvm_virtio_pci_vector_config_release(proxy);
1309 }
1310 config_assign_error:
1311 virtio_pci_set_guest_notifier(d, VIRTIO_CONFIG_IRQ_IDX, !assign,
1312 with_irqfd);
1313 assign_error:
1314 /* We get here on assignment failure. Recover by undoing for VQs 0 .. n. */
1315 assert(assign);
1316 while (--n >= 0) {
1317 virtio_pci_set_guest_notifier(d, n, !assign, with_irqfd);
1318 }
1319 g_free(proxy->vector_irqfd);
1320 proxy->vector_irqfd = NULL;
1321 return r;
1322 }
1323
1324 static int virtio_pci_set_host_notifier_mr(DeviceState *d, int n,
1325 MemoryRegion *mr, bool assign)
1326 {
1327 VirtIOPCIProxy *proxy = to_virtio_pci_proxy(d);
1328 int offset;
1329
1330 if (n >= VIRTIO_QUEUE_MAX || !virtio_pci_modern(proxy) ||
1331 virtio_pci_queue_mem_mult(proxy) != memory_region_size(mr)) {
1332 return -1;
1333 }
1334
1335 if (assign) {
1336 offset = virtio_pci_queue_mem_mult(proxy) * n;
1337 memory_region_add_subregion_overlap(&proxy->notify.mr, offset, mr, 1);
1338 } else {
1339 memory_region_del_subregion(&proxy->notify.mr, mr);
1340 }
1341
1342 return 0;
1343 }
1344
1345 static void virtio_pci_vmstate_change(DeviceState *d, bool running)
1346 {
1347 VirtIOPCIProxy *proxy = to_virtio_pci_proxy(d);
1348 VirtIODevice *vdev = virtio_bus_get_device(&proxy->bus);
1349
1350 if (running) {
1351 /* Old QEMU versions did not set bus master enable on status write.
1352 * Detect DRIVER set and enable it.
1353 */
1354 if ((proxy->flags & VIRTIO_PCI_FLAG_BUS_MASTER_BUG_MIGRATION) &&
1355 (vdev->status & VIRTIO_CONFIG_S_DRIVER) &&
1356 !(proxy->pci_dev.config[PCI_COMMAND] & PCI_COMMAND_MASTER)) {
1357 pci_default_write_config(&proxy->pci_dev, PCI_COMMAND,
1358 proxy->pci_dev.config[PCI_COMMAND] |
1359 PCI_COMMAND_MASTER, 1);
1360 }
1361 virtio_pci_start_ioeventfd(proxy);
1362 } else {
1363 virtio_pci_stop_ioeventfd(proxy);
1364 }
1365 }
1366
1367 /*
1368 * virtio-pci: This is the PCIDevice which has a virtio-pci-bus.
1369 */
1370
1371 static int virtio_pci_query_nvectors(DeviceState *d)
1372 {
1373 VirtIOPCIProxy *proxy = VIRTIO_PCI(d);
1374
1375 return proxy->nvectors;
1376 }
1377
1378 static AddressSpace *virtio_pci_get_dma_as(DeviceState *d)
1379 {
1380 VirtIOPCIProxy *proxy = VIRTIO_PCI(d);
1381 PCIDevice *dev = &proxy->pci_dev;
1382
1383 return pci_get_address_space(dev);
1384 }
1385
1386 static bool virtio_pci_iommu_enabled(DeviceState *d)
1387 {
1388 VirtIOPCIProxy *proxy = VIRTIO_PCI(d);
1389 PCIDevice *dev = &proxy->pci_dev;
1390 AddressSpace *dma_as = pci_device_iommu_address_space(dev);
1391
1392 if (dma_as == &address_space_memory) {
1393 return false;
1394 }
1395
1396 return true;
1397 }
1398
1399 static bool virtio_pci_queue_enabled(DeviceState *d, int n)
1400 {
1401 VirtIOPCIProxy *proxy = VIRTIO_PCI(d);
1402 VirtIODevice *vdev = virtio_bus_get_device(&proxy->bus);
1403
1404 if (virtio_vdev_has_feature(vdev, VIRTIO_F_VERSION_1)) {
1405 return proxy->vqs[n].enabled;
1406 }
1407
1408 return virtio_queue_enabled_legacy(vdev, n);
1409 }
1410
1411 static int virtio_pci_add_mem_cap(VirtIOPCIProxy *proxy,
1412 struct virtio_pci_cap *cap)
1413 {
1414 PCIDevice *dev = &proxy->pci_dev;
1415 int offset;
1416
1417 offset = pci_add_capability(dev, PCI_CAP_ID_VNDR, 0,
1418 cap->cap_len, &error_abort);
1419
1420 assert(cap->cap_len >= sizeof *cap);
1421 memcpy(dev->config + offset + PCI_CAP_FLAGS, &cap->cap_len,
1422 cap->cap_len - PCI_CAP_FLAGS);
1423
1424 return offset;
1425 }
1426
1427 int virtio_pci_add_shm_cap(VirtIOPCIProxy *proxy,
1428 uint8_t bar, uint64_t offset, uint64_t length,
1429 uint8_t id)
1430 {
1431 struct virtio_pci_cap64 cap = {
1432 .cap.cap_len = sizeof cap,
1433 .cap.cfg_type = VIRTIO_PCI_CAP_SHARED_MEMORY_CFG,
1434 };
1435
1436 cap.cap.bar = bar;
1437 cap.cap.length = cpu_to_le32(length);
1438 cap.length_hi = cpu_to_le32(length >> 32);
1439 cap.cap.offset = cpu_to_le32(offset);
1440 cap.offset_hi = cpu_to_le32(offset >> 32);
1441 cap.cap.id = id;
1442 return virtio_pci_add_mem_cap(proxy, &cap.cap);
1443 }
1444
1445 /* Called within call_rcu(). */
1446 static void bitmap_free_region_cache(BitmapMemoryRegionCaches *caches)
1447 {
1448 assert(caches != NULL);
1449 address_space_cache_destroy(&caches->bitmap);
1450 g_free(caches);
1451 }
1452
1453 static void lm_disable(VirtIODevice *vdev)
1454 {
1455 BitmapMemoryRegionCaches *caches;
1456 caches = qatomic_read(&vdev->caches);
1457 qatomic_rcu_set(&vdev->caches, NULL);
1458 if (caches) {
1459 call_rcu(caches, bitmap_free_region_cache, rcu);
1460 }
1461 }
1462
1463 static void lm_enable(VirtIODevice *vdev)
1464 {
1465 BitmapMemoryRegionCaches *old = vdev->caches;
1466 BitmapMemoryRegionCaches *new = NULL;
1467 hwaddr addr, end, size;
1468 int64_t len;
1469
1470 addr = vdev->lm_base_addr_low | ((hwaddr)(vdev->lm_base_addr_high) << 32);
1471 end = vdev->lm_end_addr_low | ((hwaddr)(vdev->lm_end_addr_high) << 32);
1472 size = end - addr;
1473 if (size <= 0) {
1474 error_report("Invalid lm size.");
1475 return;
1476 }
1477
1478 new = g_new0(BitmapMemoryRegionCaches, 1);
1479 len = address_space_cache_init(&new->bitmap, vdev->dma_as, addr, size,
1480 true);
1481 if (len < size) {
1482 virtio_error(vdev, "Cannot map bitmap");
1483 goto err_bitmap;
1484 }
1485 qatomic_rcu_set(&vdev->caches, new);
1486
1487 if (old) {
1488 call_rcu(old, bitmap_free_region_cache, rcu);
1489 }
1490
1491 return;
1492
1493 err_bitmap:
1494 address_space_cache_destroy(&new->bitmap);
1495 g_free(new);
1496 }
1497
1498 static uint64_t virtio_pci_lm_read(void *opaque, hwaddr addr,
1499 unsigned size)
1500 {
1501 VirtIOPCIProxy *proxy = opaque;
1502 VirtIODevice *vdev = virtio_bus_get_device(&proxy->bus);
1503 hwaddr offset_end = LM_VRING_STATE_OFFSET +
1504 virtio_pci_queue_mem_mult(proxy) * VIRTIO_QUEUE_MAX;
1505 uint32_t val;
1506 int qid;
1507
1508 if (vdev == NULL) {
1509 return UINT64_MAX;
1510 }
1511 switch (addr) {
1512 case LM_LOGGING_CTRL:
1513 val = vdev->lm_logging_ctrl;
1514 break;
1515 case LM_BASE_ADDR_LOW:
1516 val = vdev->lm_base_addr_low;
1517 break;
1518 case LM_BASE_ADDR_HIGH:
1519 val = vdev->lm_base_addr_high;
1520 break;
1521 case LM_END_ADDR_LOW:
1522 val = vdev->lm_end_addr_low;
1523 break;
1524 case LM_END_ADDR_HIGH:
1525 val = vdev->lm_end_addr_high;
1526 break;
1527 default:
1528 if (addr >= LM_VRING_STATE_OFFSET && addr <= offset_end) {
1529 qid = (addr - LM_VRING_STATE_OFFSET) /
1530 virtio_pci_queue_mem_mult(proxy);
1531 val = virtio_queue_get_vring_states(vdev, qid);
1532 } else
1533 val = 0;
1534
1535 break;
1536 }
1537
1538 return val;
1539 }
1540
1541 static void virtio_pci_lm_write(void *opaque, hwaddr addr,
1542 uint64_t val, unsigned size)
1543 {
1544 VirtIOPCIProxy *proxy = opaque;
1545 VirtIODevice *vdev = virtio_bus_get_device(&proxy->bus);
1546 hwaddr offset_end = LM_VRING_STATE_OFFSET +
1547 virtio_pci_queue_mem_mult(proxy) * VIRTIO_QUEUE_MAX;
1548 int qid;
1549
1550 if (vdev == NULL) {
1551 return;
1552 }
1553
1554 switch (addr) {
1555 case LM_LOGGING_CTRL:
1556 vdev->lm_logging_ctrl = val;
1557 switch (val) {
1558 case LM_DISABLE:
1559 lm_disable(vdev);
1560 break;
1561 case LM_ENABLE:
1562 lm_enable(vdev);
1563 break;
1564 default:
1565 virtio_error(vdev, "Unsupport LM_LOGGING_CTRL value: %"PRIx64,
1566 val);
1567 break;
1568 };
1569
1570 break;
1571 case LM_BASE_ADDR_LOW:
1572 vdev->lm_base_addr_low = val;
1573 break;
1574 case LM_BASE_ADDR_HIGH:
1575 vdev->lm_base_addr_high = val;
1576 break;
1577 case LM_END_ADDR_LOW:
1578 vdev->lm_end_addr_low = val;
1579 break;
1580 case LM_END_ADDR_HIGH:
1581 vdev->lm_end_addr_high = val;
1582 break;
1583 default:
1584 if (addr >= LM_VRING_STATE_OFFSET && addr <= offset_end) {
1585 qid = (addr - LM_VRING_STATE_OFFSET) /
1586 virtio_pci_queue_mem_mult(proxy);
1587 virtio_queue_set_vring_states(vdev, qid, val);
1588 } else
1589 virtio_error(vdev, "Unsupport addr: %"PRIx64, addr);
1590 break;
1591 }
1592 }
1593
1594 static uint64_t virtio_pci_common_read(void *opaque, hwaddr addr,
1595 unsigned size)
1596 {
1597 VirtIOPCIProxy *proxy = opaque;
1598 VirtIODevice *vdev = virtio_bus_get_device(&proxy->bus);
1599 uint32_t val = 0;
1600 int i;
1601
1602 if (vdev == NULL) {
1603 return UINT64_MAX;
1604 }
1605
1606 switch (addr) {
1607 case VIRTIO_PCI_COMMON_DFSELECT:
1608 val = proxy->dfselect;
1609 break;
1610 case VIRTIO_PCI_COMMON_DF:
1611 if (proxy->dfselect <= 1) {
1612 VirtioDeviceClass *vdc = VIRTIO_DEVICE_GET_CLASS(vdev);
1613
1614 val = (vdev->host_features & ~vdc->legacy_features) >>
1615 (32 * proxy->dfselect);
1616 }
1617 break;
1618 case VIRTIO_PCI_COMMON_GFSELECT:
1619 val = proxy->gfselect;
1620 break;
1621 case VIRTIO_PCI_COMMON_GF:
1622 if (proxy->gfselect < ARRAY_SIZE(proxy->guest_features)) {
1623 val = proxy->guest_features[proxy->gfselect];
1624 }
1625 break;
1626 case VIRTIO_PCI_COMMON_MSIX:
1627 val = vdev->config_vector;
1628 break;
1629 case VIRTIO_PCI_COMMON_NUMQ:
1630 for (i = 0; i < VIRTIO_QUEUE_MAX; ++i) {
1631 if (virtio_queue_get_num(vdev, i)) {
1632 val = i + 1;
1633 }
1634 }
1635 break;
1636 case VIRTIO_PCI_COMMON_STATUS:
1637 val = vdev->status;
1638 break;
1639 case VIRTIO_PCI_COMMON_CFGGENERATION:
1640 val = vdev->generation;
1641 break;
1642 case VIRTIO_PCI_COMMON_Q_SELECT:
1643 val = vdev->queue_sel;
1644 break;
1645 case VIRTIO_PCI_COMMON_Q_SIZE:
1646 val = virtio_queue_get_num(vdev, vdev->queue_sel);
1647 break;
1648 case VIRTIO_PCI_COMMON_Q_MSIX:
1649 val = virtio_queue_vector(vdev, vdev->queue_sel);
1650 break;
1651 case VIRTIO_PCI_COMMON_Q_ENABLE:
1652 val = proxy->vqs[vdev->queue_sel].enabled;
1653 break;
1654 case VIRTIO_PCI_COMMON_Q_NOFF:
1655 /* Simply map queues in order */
1656 val = vdev->queue_sel;
1657 break;
1658 case VIRTIO_PCI_COMMON_Q_DESCLO:
1659 val = proxy->vqs[vdev->queue_sel].desc[0];
1660 break;
1661 case VIRTIO_PCI_COMMON_Q_DESCHI:
1662 val = proxy->vqs[vdev->queue_sel].desc[1];
1663 break;
1664 case VIRTIO_PCI_COMMON_Q_AVAILLO:
1665 val = proxy->vqs[vdev->queue_sel].avail[0];
1666 break;
1667 case VIRTIO_PCI_COMMON_Q_AVAILHI:
1668 val = proxy->vqs[vdev->queue_sel].avail[1];
1669 break;
1670 case VIRTIO_PCI_COMMON_Q_USEDLO:
1671 val = proxy->vqs[vdev->queue_sel].used[0];
1672 break;
1673 case VIRTIO_PCI_COMMON_Q_USEDHI:
1674 val = proxy->vqs[vdev->queue_sel].used[1];
1675 break;
1676 case VIRTIO_PCI_COMMON_Q_RESET:
1677 val = proxy->vqs[vdev->queue_sel].reset;
1678 break;
1679 default:
1680 val = 0;
1681 }
1682
1683 return val;
1684 }
1685
1686 static void virtio_pci_common_write(void *opaque, hwaddr addr,
1687 uint64_t val, unsigned size)
1688 {
1689 VirtIOPCIProxy *proxy = opaque;
1690 VirtIODevice *vdev = virtio_bus_get_device(&proxy->bus);
1691 uint16_t vector;
1692
1693 if (vdev == NULL) {
1694 return;
1695 }
1696
1697 switch (addr) {
1698 case VIRTIO_PCI_COMMON_DFSELECT:
1699 proxy->dfselect = val;
1700 break;
1701 case VIRTIO_PCI_COMMON_GFSELECT:
1702 proxy->gfselect = val;
1703 break;
1704 case VIRTIO_PCI_COMMON_GF:
1705 if (proxy->gfselect < ARRAY_SIZE(proxy->guest_features)) {
1706 proxy->guest_features[proxy->gfselect] = val;
1707 virtio_set_features(vdev,
1708 (((uint64_t)proxy->guest_features[1]) << 32) |
1709 proxy->guest_features[0]);
1710 }
1711 break;
1712 case VIRTIO_PCI_COMMON_MSIX:
1713 if (vdev->config_vector != VIRTIO_NO_VECTOR) {
1714 msix_vector_unuse(&proxy->pci_dev, vdev->config_vector);
1715 }
1716 /* Make it possible for guest to discover an error took place. */
1717 if (val < proxy->nvectors) {
1718 msix_vector_use(&proxy->pci_dev, val);
1719 } else {
1720 val = VIRTIO_NO_VECTOR;
1721 }
1722 vdev->config_vector = val;
1723 break;
1724 case VIRTIO_PCI_COMMON_STATUS:
1725 if (!(val & VIRTIO_CONFIG_S_DRIVER_OK)) {
1726 virtio_pci_stop_ioeventfd(proxy);
1727 }
1728
1729 virtio_set_status(vdev, val & 0xFF);
1730
1731 if (val & VIRTIO_CONFIG_S_DRIVER_OK) {
1732 virtio_pci_start_ioeventfd(proxy);
1733 }
1734
1735 if (vdev->status == 0) {
1736 virtio_pci_reset(DEVICE(proxy));
1737 }
1738
1739 break;
1740 case VIRTIO_PCI_COMMON_Q_SELECT:
1741 if (val < VIRTIO_QUEUE_MAX) {
1742 vdev->queue_sel = val;
1743 }
1744 break;
1745 case VIRTIO_PCI_COMMON_Q_SIZE:
1746 proxy->vqs[vdev->queue_sel].num = val;
1747 virtio_queue_set_num(vdev, vdev->queue_sel,
1748 proxy->vqs[vdev->queue_sel].num);
1749 virtio_init_region_cache(vdev, vdev->queue_sel);
1750 break;
1751 case VIRTIO_PCI_COMMON_Q_MSIX:
1752 vector = virtio_queue_vector(vdev, vdev->queue_sel);
1753 if (vector != VIRTIO_NO_VECTOR) {
1754 msix_vector_unuse(&proxy->pci_dev, vector);
1755 }
1756 /* Make it possible for guest to discover an error took place. */
1757 if (val < proxy->nvectors) {
1758 msix_vector_use(&proxy->pci_dev, val);
1759 } else {
1760 val = VIRTIO_NO_VECTOR;
1761 }
1762 virtio_queue_set_vector(vdev, vdev->queue_sel, val);
1763 break;
1764 case VIRTIO_PCI_COMMON_Q_ENABLE:
1765 if (val == 1) {
1766 virtio_queue_set_num(vdev, vdev->queue_sel,
1767 proxy->vqs[vdev->queue_sel].num);
1768 virtio_queue_set_rings(vdev, vdev->queue_sel,
1769 ((uint64_t)proxy->vqs[vdev->queue_sel].desc[1]) << 32 |
1770 proxy->vqs[vdev->queue_sel].desc[0],
1771 ((uint64_t)proxy->vqs[vdev->queue_sel].avail[1]) << 32 |
1772 proxy->vqs[vdev->queue_sel].avail[0],
1773 ((uint64_t)proxy->vqs[vdev->queue_sel].used[1]) << 32 |
1774 proxy->vqs[vdev->queue_sel].used[0]);
1775 proxy->vqs[vdev->queue_sel].enabled = 1;
1776 proxy->vqs[vdev->queue_sel].reset = 0;
1777 virtio_queue_enable(vdev, vdev->queue_sel);
1778 } else {
1779 virtio_error(vdev, "wrong value for queue_enable %"PRIx64, val);
1780 }
1781 break;
1782 case VIRTIO_PCI_COMMON_Q_DESCLO:
1783 proxy->vqs[vdev->queue_sel].desc[0] = val;
1784 break;
1785 case VIRTIO_PCI_COMMON_Q_DESCHI:
1786 proxy->vqs[vdev->queue_sel].desc[1] = val;
1787 break;
1788 case VIRTIO_PCI_COMMON_Q_AVAILLO:
1789 proxy->vqs[vdev->queue_sel].avail[0] = val;
1790 break;
1791 case VIRTIO_PCI_COMMON_Q_AVAILHI:
1792 proxy->vqs[vdev->queue_sel].avail[1] = val;
1793 break;
1794 case VIRTIO_PCI_COMMON_Q_USEDLO:
1795 proxy->vqs[vdev->queue_sel].used[0] = val;
1796 break;
1797 case VIRTIO_PCI_COMMON_Q_USEDHI:
1798 proxy->vqs[vdev->queue_sel].used[1] = val;
1799 break;
1800 case VIRTIO_PCI_COMMON_Q_RESET:
1801 if (val == 1) {
1802 proxy->vqs[vdev->queue_sel].reset = 1;
1803
1804 virtio_queue_reset(vdev, vdev->queue_sel);
1805
1806 proxy->vqs[vdev->queue_sel].reset = 0;
1807 proxy->vqs[vdev->queue_sel].enabled = 0;
1808 }
1809 break;
1810 default:
1811 break;
1812 }
1813 }
1814
1815
1816 static uint64_t virtio_pci_notify_read(void *opaque, hwaddr addr,
1817 unsigned size)
1818 {
1819 VirtIOPCIProxy *proxy = opaque;
1820 if (virtio_bus_get_device(&proxy->bus) == NULL) {
1821 return UINT64_MAX;
1822 }
1823
1824 return 0;
1825 }
1826
1827 static void virtio_pci_notify_write(void *opaque, hwaddr addr,
1828 uint64_t val, unsigned size)
1829 {
1830 VirtIOPCIProxy *proxy = opaque;
1831 VirtIODevice *vdev = virtio_bus_get_device(&proxy->bus);
1832
1833 unsigned queue = addr / virtio_pci_queue_mem_mult(proxy);
1834
1835 if (vdev != NULL && queue < VIRTIO_QUEUE_MAX) {
1836 trace_virtio_pci_notify_write(addr, val, size);
1837 virtio_queue_notify(vdev, queue);
1838 }
1839 }
1840
1841 static void virtio_pci_notify_write_pio(void *opaque, hwaddr addr,
1842 uint64_t val, unsigned size)
1843 {
1844 VirtIOPCIProxy *proxy = opaque;
1845 VirtIODevice *vdev = virtio_bus_get_device(&proxy->bus);
1846
1847 unsigned queue = val;
1848
1849 if (vdev != NULL && queue < VIRTIO_QUEUE_MAX) {
1850 trace_virtio_pci_notify_write_pio(addr, val, size);
1851 virtio_queue_notify(vdev, queue);
1852 }
1853 }
1854
1855 static uint64_t virtio_pci_isr_read(void *opaque, hwaddr addr,
1856 unsigned size)
1857 {
1858 VirtIOPCIProxy *proxy = opaque;
1859 VirtIODevice *vdev = virtio_bus_get_device(&proxy->bus);
1860 uint64_t val;
1861
1862 if (vdev == NULL) {
1863 return UINT64_MAX;
1864 }
1865
1866 val = qatomic_xchg(&vdev->isr, 0);
1867 pci_irq_deassert(&proxy->pci_dev);
1868 return val;
1869 }
1870
1871 static void virtio_pci_isr_write(void *opaque, hwaddr addr,
1872 uint64_t val, unsigned size)
1873 {
1874 }
1875
1876 static uint64_t virtio_pci_device_read(void *opaque, hwaddr addr,
1877 unsigned size)
1878 {
1879 VirtIOPCIProxy *proxy = opaque;
1880 VirtIODevice *vdev = virtio_bus_get_device(&proxy->bus);
1881 uint64_t val;
1882
1883 if (vdev == NULL) {
1884 return UINT64_MAX;
1885 }
1886
1887 switch (size) {
1888 case 1:
1889 val = virtio_config_modern_readb(vdev, addr);
1890 break;
1891 case 2:
1892 val = virtio_config_modern_readw(vdev, addr);
1893 break;
1894 case 4:
1895 val = virtio_config_modern_readl(vdev, addr);
1896 break;
1897 default:
1898 val = 0;
1899 break;
1900 }
1901 return val;
1902 }
1903
1904 static void virtio_pci_device_write(void *opaque, hwaddr addr,
1905 uint64_t val, unsigned size)
1906 {
1907 VirtIOPCIProxy *proxy = opaque;
1908 VirtIODevice *vdev = virtio_bus_get_device(&proxy->bus);
1909
1910 if (vdev == NULL) {
1911 return;
1912 }
1913
1914 switch (size) {
1915 case 1:
1916 virtio_config_modern_writeb(vdev, addr, val);
1917 break;
1918 case 2:
1919 virtio_config_modern_writew(vdev, addr, val);
1920 break;
1921 case 4:
1922 virtio_config_modern_writel(vdev, addr, val);
1923 break;
1924 }
1925 }
1926
1927 static void virtio_pci_modern_regions_init(VirtIOPCIProxy *proxy,
1928 const char *vdev_name)
1929 {
1930 static const MemoryRegionOps common_ops = {
1931 .read = virtio_pci_common_read,
1932 .write = virtio_pci_common_write,
1933 .impl = {
1934 .min_access_size = 1,
1935 .max_access_size = 4,
1936 },
1937 .endianness = DEVICE_LITTLE_ENDIAN,
1938 };
1939 static const MemoryRegionOps isr_ops = {
1940 .read = virtio_pci_isr_read,
1941 .write = virtio_pci_isr_write,
1942 .impl = {
1943 .min_access_size = 1,
1944 .max_access_size = 4,
1945 },
1946 .endianness = DEVICE_LITTLE_ENDIAN,
1947 };
1948 static const MemoryRegionOps device_ops = {
1949 .read = virtio_pci_device_read,
1950 .write = virtio_pci_device_write,
1951 .impl = {
1952 .min_access_size = 1,
1953 .max_access_size = 4,
1954 },
1955 .endianness = DEVICE_LITTLE_ENDIAN,
1956 };
1957 static const MemoryRegionOps notify_ops = {
1958 .read = virtio_pci_notify_read,
1959 .write = virtio_pci_notify_write,
1960 .impl = {
1961 .min_access_size = 1,
1962 .max_access_size = 4,
1963 },
1964 .endianness = DEVICE_LITTLE_ENDIAN,
1965 };
1966 static const MemoryRegionOps notify_pio_ops = {
1967 .read = virtio_pci_notify_read,
1968 .write = virtio_pci_notify_write_pio,
1969 .impl = {
1970 .min_access_size = 1,
1971 .max_access_size = 4,
1972 },
1973 .endianness = DEVICE_LITTLE_ENDIAN,
1974 };
1975 static const MemoryRegionOps lm_ops = {
1976 .read = virtio_pci_lm_read,
1977 .write = virtio_pci_lm_write,
1978 .impl = {
1979 .min_access_size = 1,
1980 .max_access_size = 4,
1981 },
1982 .endianness = DEVICE_LITTLE_ENDIAN,
1983 };
1984 g_autoptr(GString) name = g_string_new(NULL);
1985
1986 g_string_printf(name, "virtio-pci-common-%s", vdev_name);
1987 memory_region_init_io(&proxy->common.mr, OBJECT(proxy),
1988 &common_ops,
1989 proxy,
1990 name->str,
1991 proxy->common.size);
1992
1993 g_string_printf(name, "virtio-pci-isr-%s", vdev_name);
1994 memory_region_init_io(&proxy->isr.mr, OBJECT(proxy),
1995 &isr_ops,
1996 proxy,
1997 name->str,
1998 proxy->isr.size);
1999
2000 g_string_printf(name, "virtio-pci-device-%s", vdev_name);
2001 memory_region_init_io(&proxy->device.mr, OBJECT(proxy),
2002 &device_ops,
2003 proxy,
2004 name->str,
2005 proxy->device.size);
2006
2007 g_string_printf(name, "virtio-pci-notify-%s", vdev_name);
2008 memory_region_init_io(&proxy->notify.mr, OBJECT(proxy),
2009 &notify_ops,
2010 proxy,
2011 name->str,
2012 proxy->notify.size);
2013
2014 g_string_printf(name, "virtio-pci-notify-pio-%s", vdev_name);
2015 memory_region_init_io(&proxy->notify_pio.mr, OBJECT(proxy),
2016 &notify_pio_ops,
2017 proxy,
2018 name->str,
2019 proxy->notify_pio.size);
2020 if (proxy->flags & VIRTIO_PCI_FLAG_VDPA) {
2021 g_string_printf(name, "virtio-pci-lm-%s", vdev_name);
2022 memory_region_init_io(&proxy->lm.mr, OBJECT(proxy),
2023 &lm_ops,
2024 proxy,
2025 name->str,
2026 proxy->lm.size);
2027 }
2028 }
2029
2030 static void virtio_pci_modern_region_map(VirtIOPCIProxy *proxy,
2031 VirtIOPCIRegion *region,
2032 struct virtio_pci_cap *cap,
2033 MemoryRegion *mr,
2034 uint8_t bar)
2035 {
2036 memory_region_add_subregion(mr, region->offset, &region->mr);
2037
2038 cap->cfg_type = region->type;
2039 cap->bar = bar;
2040 cap->offset = cpu_to_le32(region->offset);
2041 cap->length = cpu_to_le32(region->size);
2042 virtio_pci_add_mem_cap(proxy, cap);
2043
2044 }
2045
2046 static void virtio_pci_modern_mem_region_map(VirtIOPCIProxy *proxy,
2047 VirtIOPCIRegion *region,
2048 struct virtio_pci_cap *cap)
2049 {
2050 virtio_pci_modern_region_map(proxy, region, cap,
2051 &proxy->modern_bar, proxy->modern_mem_bar_idx);
2052 }
2053
2054 static void virtio_pci_modern_io_region_map(VirtIOPCIProxy *proxy,
2055 VirtIOPCIRegion *region,
2056 struct virtio_pci_cap *cap)
2057 {
2058 virtio_pci_modern_region_map(proxy, region, cap,
2059 &proxy->io_bar, proxy->modern_io_bar_idx);
2060 }
2061
2062 static void virtio_pci_modern_mem_region_unmap(VirtIOPCIProxy *proxy,
2063 VirtIOPCIRegion *region)
2064 {
2065 memory_region_del_subregion(&proxy->modern_bar,
2066 &region->mr);
2067 }
2068
2069 static void virtio_pci_modern_io_region_unmap(VirtIOPCIProxy *proxy,
2070 VirtIOPCIRegion *region)
2071 {
2072 memory_region_del_subregion(&proxy->io_bar,
2073 &region->mr);
2074 }
2075
2076 static void virtio_pci_pre_plugged(DeviceState *d, Error **errp)
2077 {
2078 VirtIOPCIProxy *proxy = VIRTIO_PCI(d);
2079 VirtIODevice *vdev = virtio_bus_get_device(&proxy->bus);
2080
2081 if (virtio_pci_modern(proxy)) {
2082 virtio_add_feature(&vdev->host_features, VIRTIO_F_VERSION_1);
2083 }
2084
2085 virtio_add_feature(&vdev->host_features, VIRTIO_F_BAD_FEATURE);
2086 }
2087
2088 /* This is called by virtio-bus just after the device is plugged. */
2089 static void virtio_pci_device_plugged(DeviceState *d, Error **errp)
2090 {
2091 VirtIOPCIProxy *proxy = VIRTIO_PCI(d);
2092 VirtioBusState *bus = &proxy->bus;
2093 bool legacy = virtio_pci_legacy(proxy);
2094 bool modern;
2095 bool modern_pio = proxy->flags & VIRTIO_PCI_FLAG_MODERN_PIO_NOTIFY;
2096 uint8_t *config;
2097 uint32_t size;
2098 VirtIODevice *vdev = virtio_bus_get_device(bus);
2099
2100 /*
2101 * Virtio capabilities present without
2102 * VIRTIO_F_VERSION_1 confuses guests
2103 */
2104 if (!proxy->ignore_backend_features &&
2105 !virtio_has_feature(vdev->host_features, VIRTIO_F_VERSION_1)) {
2106 virtio_pci_disable_modern(proxy);
2107
2108 if (!legacy) {
2109 error_setg(errp, "Device doesn't support modern mode, and legacy"
2110 " mode is disabled");
2111 error_append_hint(errp, "Set disable-legacy to off\n");
2112
2113 return;
2114 }
2115 }
2116
2117 modern = virtio_pci_modern(proxy);
2118
2119 config = proxy->pci_dev.config;
2120 if (proxy->class_code) {
2121 pci_config_set_class(config, proxy->class_code);
2122 }
2123
2124 if (legacy) {
2125 if (!virtio_legacy_allowed(vdev)) {
2126 /*
2127 * To avoid migration issues, we allow legacy mode when legacy
2128 * check is disabled in the old machine types (< 5.1).
2129 */
2130 if (virtio_legacy_check_disabled(vdev)) {
2131 warn_report("device is modern-only, but for backward "
2132 "compatibility legacy is allowed");
2133 } else {
2134 error_setg(errp,
2135 "device is modern-only, use disable-legacy=on");
2136 return;
2137 }
2138 }
2139 if (virtio_host_has_feature(vdev, VIRTIO_F_IOMMU_PLATFORM)) {
2140 error_setg(errp, "VIRTIO_F_IOMMU_PLATFORM was supported by"
2141 " neither legacy nor transitional device");
2142 return;
2143 }
2144 /*
2145 * Legacy and transitional devices use specific subsystem IDs.
2146 * Note that the subsystem vendor ID (config + PCI_SUBSYSTEM_VENDOR_ID)
2147 * is set to PCI_SUBVENDOR_ID_REDHAT_QUMRANET by default.
2148 */
2149 pci_set_word(config + PCI_SUBSYSTEM_ID, virtio_bus_get_vdev_id(bus));
2150 if (proxy->trans_devid) {
2151 pci_config_set_device_id(config, proxy->trans_devid);
2152 }
2153 } else {
2154 /* pure virtio-1.0 */
2155 pci_set_word(config + PCI_VENDOR_ID,
2156 PCI_VENDOR_ID_REDHAT_QUMRANET);
2157 pci_set_word(config + PCI_DEVICE_ID,
2158 PCI_DEVICE_ID_VIRTIO_10_BASE + virtio_bus_get_vdev_id(bus));
2159 pci_config_set_revision(config, 1);
2160 }
2161 config[PCI_INTERRUPT_PIN] = 1;
2162
2163
2164 if (modern) {
2165 struct virtio_pci_cap cap = {
2166 .cap_len = sizeof cap,
2167 };
2168 struct virtio_pci_notify_cap notify = {
2169 .cap.cap_len = sizeof notify,
2170 .notify_off_multiplier =
2171 cpu_to_le32(virtio_pci_queue_mem_mult(proxy)),
2172 };
2173 struct virtio_pci_cfg_cap cfg = {
2174 .cap.cap_len = sizeof cfg,
2175 .cap.cfg_type = VIRTIO_PCI_CAP_PCI_CFG,
2176 };
2177 struct virtio_pci_notify_cap notify_pio = {
2178 .cap.cap_len = sizeof notify,
2179 .notify_off_multiplier = cpu_to_le32(0x0),
2180 };
2181
2182 struct virtio_pci_cfg_cap *cfg_mask;
2183
2184 virtio_pci_modern_regions_init(proxy, vdev->name);
2185
2186 virtio_pci_modern_mem_region_map(proxy, &proxy->common, &cap);
2187 virtio_pci_modern_mem_region_map(proxy, &proxy->isr, &cap);
2188 virtio_pci_modern_mem_region_map(proxy, &proxy->device, &cap);
2189 virtio_pci_modern_mem_region_map(proxy, &proxy->notify, &notify.cap);
2190 if (proxy->flags & VIRTIO_PCI_FLAG_VDPA) {
2191 memory_region_add_subregion(&proxy->modern_bar,
2192 proxy->lm.offset, &proxy->lm.mr);
2193 }
2194
2195 if (modern_pio) {
2196 memory_region_init(&proxy->io_bar, OBJECT(proxy),
2197 "virtio-pci-io", 0x4);
2198
2199 pci_register_bar(&proxy->pci_dev, proxy->modern_io_bar_idx,
2200 PCI_BASE_ADDRESS_SPACE_IO, &proxy->io_bar);
2201
2202 virtio_pci_modern_io_region_map(proxy, &proxy->notify_pio,
2203 &notify_pio.cap);
2204 }
2205
2206 pci_register_bar(&proxy->pci_dev, proxy->modern_mem_bar_idx,
2207 PCI_BASE_ADDRESS_SPACE_MEMORY |
2208 PCI_BASE_ADDRESS_MEM_PREFETCH |
2209 PCI_BASE_ADDRESS_MEM_TYPE_64,
2210 &proxy->modern_bar);
2211
2212 proxy->config_cap = virtio_pci_add_mem_cap(proxy, &cfg.cap);
2213 cfg_mask = (void *)(proxy->pci_dev.wmask + proxy->config_cap);
2214 pci_set_byte(&cfg_mask->cap.bar, ~0x0);
2215 pci_set_long((uint8_t *)&cfg_mask->cap.offset, ~0x0);
2216 pci_set_long((uint8_t *)&cfg_mask->cap.length, ~0x0);
2217 pci_set_long(cfg_mask->pci_cfg_data, ~0x0);
2218 }
2219
2220 if (proxy->nvectors) {
2221 int err = msix_init_exclusive_bar(&proxy->pci_dev, proxy->nvectors,
2222 proxy->msix_bar_idx, NULL);
2223 if (err) {
2224 /* Notice when a system that supports MSIx can't initialize it */
2225 if (err != -ENOTSUP) {
2226 warn_report("unable to init msix vectors to %" PRIu32,
2227 proxy->nvectors);
2228 }
2229 proxy->nvectors = 0;
2230 }
2231 }
2232
2233 proxy->pci_dev.config_write = virtio_write_config;
2234 proxy->pci_dev.config_read = virtio_read_config;
2235
2236 if (legacy) {
2237 size = VIRTIO_PCI_REGION_SIZE(&proxy->pci_dev)
2238 + virtio_bus_get_vdev_config_len(bus);
2239 size = pow2ceil(size);
2240
2241 memory_region_init_io(&proxy->bar, OBJECT(proxy),
2242 &virtio_pci_config_ops,
2243 proxy, "virtio-pci", size);
2244
2245 pci_register_bar(&proxy->pci_dev, proxy->legacy_io_bar_idx,
2246 PCI_BASE_ADDRESS_SPACE_IO, &proxy->bar);
2247 }
2248 }
2249
2250 static void virtio_pci_device_unplugged(DeviceState *d)
2251 {
2252 VirtIOPCIProxy *proxy = VIRTIO_PCI(d);
2253 bool modern = virtio_pci_modern(proxy);
2254 bool modern_pio = proxy->flags & VIRTIO_PCI_FLAG_MODERN_PIO_NOTIFY;
2255
2256 virtio_pci_stop_ioeventfd(proxy);
2257
2258 if (modern) {
2259 virtio_pci_modern_mem_region_unmap(proxy, &proxy->common);
2260 virtio_pci_modern_mem_region_unmap(proxy, &proxy->isr);
2261 virtio_pci_modern_mem_region_unmap(proxy, &proxy->device);
2262 virtio_pci_modern_mem_region_unmap(proxy, &proxy->notify);
2263 if (proxy->flags & VIRTIO_PCI_FLAG_VDPA) {
2264 memory_region_del_subregion(&proxy->modern_bar, &proxy->lm.mr);
2265 }
2266 if (modern_pio) {
2267 virtio_pci_modern_io_region_unmap(proxy, &proxy->notify_pio);
2268 }
2269 }
2270 }
2271
2272 static void virtio_pci_realize(PCIDevice *pci_dev, Error **errp)
2273 {
2274 VirtIOPCIProxy *proxy = VIRTIO_PCI(pci_dev);
2275 VirtioPCIClass *k = VIRTIO_PCI_GET_CLASS(pci_dev);
2276 bool pcie_port = pci_bus_is_express(pci_get_bus(pci_dev)) &&
2277 !pci_bus_is_root(pci_get_bus(pci_dev));
2278
2279 /* fd-based ioevents can't be synchronized in record/replay */
2280 if (replay_mode != REPLAY_MODE_NONE) {
2281 proxy->flags &= ~VIRTIO_PCI_FLAG_USE_IOEVENTFD;
2282 }
2283
2284 /*
2285 * virtio pci bar layout used by default.
2286 * subclasses can re-arrange things if needed.
2287 *
2288 * region 0 -- virtio legacy io bar
2289 * region 1 -- msi-x bar
2290 * region 2 -- virtio modern io bar (off by default)
2291 * region 4+5 -- virtio modern memory (64bit) bar
2292 *
2293 */
2294 proxy->legacy_io_bar_idx = 0;
2295 proxy->msix_bar_idx = 1;
2296 proxy->modern_io_bar_idx = 2;
2297 proxy->modern_mem_bar_idx = 4;
2298
2299 proxy->common.offset = 0x0;
2300 proxy->common.size = 0x1000;
2301 proxy->common.type = VIRTIO_PCI_CAP_COMMON_CFG;
2302
2303 proxy->isr.offset = 0x1000;
2304 proxy->isr.size = 0x1000;
2305 proxy->isr.type = VIRTIO_PCI_CAP_ISR_CFG;
2306
2307 proxy->device.offset = 0x2000;
2308 proxy->device.size = 0x1000;
2309 proxy->device.type = VIRTIO_PCI_CAP_DEVICE_CFG;
2310
2311 proxy->notify.offset = 0x3000;
2312 proxy->notify.size = virtio_pci_queue_mem_mult(proxy) * VIRTIO_QUEUE_MAX;
2313 proxy->notify.type = VIRTIO_PCI_CAP_NOTIFY_CFG;
2314
2315 proxy->notify_pio.offset = 0x0;
2316 proxy->notify_pio.size = 0x4;
2317 proxy->notify_pio.type = VIRTIO_PCI_CAP_NOTIFY_CFG;
2318
2319 /* subclasses can enforce modern, so do this unconditionally */
2320 if (!(proxy->flags & VIRTIO_PCI_FLAG_VDPA)) {
2321 memory_region_init(&proxy->modern_bar, OBJECT(proxy), "virtio-pci",
2322 /* PCI BAR regions must be powers of 2 */
2323 pow2ceil(proxy->notify.offset + proxy->notify.size));
2324 } else {
2325 proxy->lm.offset = proxy->notify.offset + proxy->notify.size;
2326 proxy->lm.size = 0x20 + VIRTIO_QUEUE_MAX * 4;
2327 memory_region_init(&proxy->modern_bar, OBJECT(proxy), "virtio-pci",
2328 /* PCI BAR regions must be powers of 2 */
2329 pow2ceil(proxy->lm.offset + proxy->lm.size));
2330 }
2331
2332 if (proxy->disable_legacy == ON_OFF_AUTO_AUTO) {
2333 proxy->disable_legacy = pcie_port ? ON_OFF_AUTO_ON : ON_OFF_AUTO_OFF;
2334 }
2335
2336 if (!virtio_pci_modern(proxy) && !virtio_pci_legacy(proxy)) {
2337 error_setg(errp, "device cannot work as neither modern nor legacy mode"
2338 " is enabled");
2339 error_append_hint(errp, "Set either disable-modern or disable-legacy"
2340 " to off\n");
2341 return;
2342 }
2343
2344 if (pcie_port && pci_is_express(pci_dev)) {
2345 int pos;
2346 uint16_t last_pcie_cap_offset = PCI_CONFIG_SPACE_SIZE;
2347
2348 pos = pcie_endpoint_cap_init(pci_dev, 0);
2349 assert(pos > 0);
2350
2351 pos = pci_add_capability(pci_dev, PCI_CAP_ID_PM, 0,
2352 PCI_PM_SIZEOF, errp);
2353 if (pos < 0) {
2354 return;
2355 }
2356
2357 pci_dev->exp.pm_cap = pos;
2358
2359 /*
2360 * Indicates that this function complies with revision 1.2 of the
2361 * PCI Power Management Interface Specification.
2362 */
2363 pci_set_word(pci_dev->config + pos + PCI_PM_PMC, 0x3);
2364
2365 if (proxy->flags & VIRTIO_PCI_FLAG_AER) {
2366 pcie_aer_init(pci_dev, PCI_ERR_VER, last_pcie_cap_offset,
2367 PCI_ERR_SIZEOF, NULL);
2368 last_pcie_cap_offset += PCI_ERR_SIZEOF;
2369 }
2370
2371 if (proxy->flags & VIRTIO_PCI_FLAG_INIT_DEVERR) {
2372 /* Init error enabling flags */
2373 pcie_cap_deverr_init(pci_dev);
2374 }
2375
2376 if (proxy->flags & VIRTIO_PCI_FLAG_INIT_LNKCTL) {
2377 /* Init Link Control Register */
2378 pcie_cap_lnkctl_init(pci_dev);
2379 }
2380
2381 if (proxy->flags & VIRTIO_PCI_FLAG_INIT_PM) {
2382 /* Init Power Management Control Register */
2383 pci_set_word(pci_dev->wmask + pos + PCI_PM_CTRL,
2384 PCI_PM_CTRL_STATE_MASK);
2385 }
2386
2387 if (proxy->flags & VIRTIO_PCI_FLAG_ATS) {
2388 pcie_ats_init(pci_dev, last_pcie_cap_offset,
2389 proxy->flags & VIRTIO_PCI_FLAG_ATS_PAGE_ALIGNED);
2390 last_pcie_cap_offset += PCI_EXT_CAP_ATS_SIZEOF;
2391 }
2392
2393 if (proxy->flags & VIRTIO_PCI_FLAG_INIT_FLR) {
2394 /* Set Function Level Reset capability bit */
2395 pcie_cap_flr_init(pci_dev);
2396 }
2397 } else {
2398 /*
2399 * make future invocations of pci_is_express() return false
2400 * and pci_config_size() return PCI_CONFIG_SPACE_SIZE.
2401 */
2402 pci_dev->cap_present &= ~QEMU_PCI_CAP_EXPRESS;
2403 }
2404
2405 virtio_pci_bus_new(&proxy->bus, sizeof(proxy->bus), proxy);
2406 if (k->realize) {
2407 k->realize(proxy, errp);
2408 }
2409 }
2410
2411 static void virtio_pci_exit(PCIDevice *pci_dev)
2412 {
2413 VirtIOPCIProxy *proxy = VIRTIO_PCI(pci_dev);
2414 bool pcie_port = pci_bus_is_express(pci_get_bus(pci_dev)) &&
2415 !pci_bus_is_root(pci_get_bus(pci_dev));
2416
2417 msix_uninit_exclusive_bar(pci_dev);
2418 if (proxy->flags & VIRTIO_PCI_FLAG_AER && pcie_port &&
2419 pci_is_express(pci_dev)) {
2420 pcie_aer_exit(pci_dev);
2421 }
2422 }
2423
2424 static void virtio_pci_reset(DeviceState *qdev)
2425 {
2426 VirtIOPCIProxy *proxy = VIRTIO_PCI(qdev);
2427 VirtioBusState *bus = VIRTIO_BUS(&proxy->bus);
2428 int i;
2429
2430 virtio_bus_reset(bus);
2431 msix_unuse_all_vectors(&proxy->pci_dev);
2432
2433 for (i = 0; i < VIRTIO_QUEUE_MAX; i++) {
2434 proxy->vqs[i].enabled = 0;
2435 proxy->vqs[i].reset = 0;
2436 proxy->vqs[i].num = 0;
2437 proxy->vqs[i].desc[0] = proxy->vqs[i].desc[1] = 0;
2438 proxy->vqs[i].avail[0] = proxy->vqs[i].avail[1] = 0;
2439 proxy->vqs[i].used[0] = proxy->vqs[i].used[1] = 0;
2440 }
2441 }
2442
2443 static void virtio_pci_bus_reset_hold(Object *obj)
2444 {
2445 PCIDevice *dev = PCI_DEVICE(obj);
2446 DeviceState *qdev = DEVICE(obj);
2447
2448 virtio_pci_reset(qdev);
2449
2450 if (pci_is_express(dev)) {
2451 pcie_cap_deverr_reset(dev);
2452 pcie_cap_lnkctl_reset(dev);
2453
2454 pci_set_word(dev->config + dev->exp.pm_cap + PCI_PM_CTRL, 0);
2455 }
2456 }
2457
2458 static Property virtio_pci_properties[] = {
2459 DEFINE_PROP_BIT("virtio-pci-bus-master-bug-migration", VirtIOPCIProxy, flags,
2460 VIRTIO_PCI_FLAG_BUS_MASTER_BUG_MIGRATION_BIT, false),
2461 DEFINE_PROP_BIT("migrate-extra", VirtIOPCIProxy, flags,
2462 VIRTIO_PCI_FLAG_MIGRATE_EXTRA_BIT, true),
2463 DEFINE_PROP_BIT("modern-pio-notify", VirtIOPCIProxy, flags,
2464 VIRTIO_PCI_FLAG_MODERN_PIO_NOTIFY_BIT, false),
2465 DEFINE_PROP_BIT("x-disable-pcie", VirtIOPCIProxy, flags,
2466 VIRTIO_PCI_FLAG_DISABLE_PCIE_BIT, false),
2467 DEFINE_PROP_BIT("page-per-vq", VirtIOPCIProxy, flags,
2468 VIRTIO_PCI_FLAG_PAGE_PER_VQ_BIT, false),
2469 DEFINE_PROP_BOOL("x-ignore-backend-features", VirtIOPCIProxy,
2470 ignore_backend_features, false),
2471 DEFINE_PROP_BIT("ats", VirtIOPCIProxy, flags,
2472 VIRTIO_PCI_FLAG_ATS_BIT, false),
2473 DEFINE_PROP_BIT("x-ats-page-aligned", VirtIOPCIProxy, flags,
2474 VIRTIO_PCI_FLAG_ATS_PAGE_ALIGNED_BIT, true),
2475 DEFINE_PROP_BIT("x-pcie-deverr-init", VirtIOPCIProxy, flags,
2476 VIRTIO_PCI_FLAG_INIT_DEVERR_BIT, true),
2477 DEFINE_PROP_BIT("x-pcie-lnkctl-init", VirtIOPCIProxy, flags,
2478 VIRTIO_PCI_FLAG_INIT_LNKCTL_BIT, true),
2479 DEFINE_PROP_BIT("x-pcie-pm-init", VirtIOPCIProxy, flags,
2480 VIRTIO_PCI_FLAG_INIT_PM_BIT, true),
2481 DEFINE_PROP_BIT("x-pcie-flr-init", VirtIOPCIProxy, flags,
2482 VIRTIO_PCI_FLAG_INIT_FLR_BIT, true),
2483 DEFINE_PROP_BIT("aer", VirtIOPCIProxy, flags,
2484 VIRTIO_PCI_FLAG_AER_BIT, false),
2485 DEFINE_PROP_BIT("vdpa", VirtIOPCIProxy, flags,
2486 VIRTIO_PCI_FLAG_VDPA_BIT, false),
2487 DEFINE_PROP_END_OF_LIST(),
2488 };
2489
2490 static void virtio_pci_dc_realize(DeviceState *qdev, Error **errp)
2491 {
2492 VirtioPCIClass *vpciklass = VIRTIO_PCI_GET_CLASS(qdev);
2493 VirtIOPCIProxy *proxy = VIRTIO_PCI(qdev);
2494 PCIDevice *pci_dev = &proxy->pci_dev;
2495
2496 if (!(proxy->flags & VIRTIO_PCI_FLAG_DISABLE_PCIE) &&
2497 virtio_pci_modern(proxy)) {
2498 pci_dev->cap_present |= QEMU_PCI_CAP_EXPRESS;
2499 }
2500
2501 vpciklass->parent_dc_realize(qdev, errp);
2502 }
2503
2504 static void virtio_pci_class_init(ObjectClass *klass, void *data)
2505 {
2506 DeviceClass *dc = DEVICE_CLASS(klass);
2507 PCIDeviceClass *k = PCI_DEVICE_CLASS(klass);
2508 VirtioPCIClass *vpciklass = VIRTIO_PCI_CLASS(klass);
2509 ResettableClass *rc = RESETTABLE_CLASS(klass);
2510
2511 device_class_set_props(dc, virtio_pci_properties);
2512 k->realize = virtio_pci_realize;
2513 k->exit = virtio_pci_exit;
2514 k->vendor_id = PCI_VENDOR_ID_REDHAT_QUMRANET;
2515 k->revision = VIRTIO_PCI_ABI_VERSION;
2516 k->class_id = PCI_CLASS_OTHERS;
2517 device_class_set_parent_realize(dc, virtio_pci_dc_realize,
2518 &vpciklass->parent_dc_realize);
2519 rc->phases.hold = virtio_pci_bus_reset_hold;
2520 }
2521
2522 static const TypeInfo virtio_pci_info = {
2523 .name = TYPE_VIRTIO_PCI,
2524 .parent = TYPE_PCI_DEVICE,
2525 .instance_size = sizeof(VirtIOPCIProxy),
2526 .class_init = virtio_pci_class_init,
2527 .class_size = sizeof(VirtioPCIClass),
2528 .abstract = true,
2529 };
2530
2531 static Property virtio_pci_generic_properties[] = {
2532 DEFINE_PROP_ON_OFF_AUTO("disable-legacy", VirtIOPCIProxy, disable_legacy,
2533 ON_OFF_AUTO_AUTO),
2534 DEFINE_PROP_BOOL("disable-modern", VirtIOPCIProxy, disable_modern, false),
2535 DEFINE_PROP_END_OF_LIST(),
2536 };
2537
2538 static void virtio_pci_base_class_init(ObjectClass *klass, void *data)
2539 {
2540 const VirtioPCIDeviceTypeInfo *t = data;
2541 if (t->class_init) {
2542 t->class_init(klass, NULL);
2543 }
2544 }
2545
2546 static void virtio_pci_generic_class_init(ObjectClass *klass, void *data)
2547 {
2548 DeviceClass *dc = DEVICE_CLASS(klass);
2549
2550 device_class_set_props(dc, virtio_pci_generic_properties);
2551 }
2552
2553 static void virtio_pci_transitional_instance_init(Object *obj)
2554 {
2555 VirtIOPCIProxy *proxy = VIRTIO_PCI(obj);
2556
2557 proxy->disable_legacy = ON_OFF_AUTO_OFF;
2558 proxy->disable_modern = false;
2559 }
2560
2561 static void virtio_pci_non_transitional_instance_init(Object *obj)
2562 {
2563 VirtIOPCIProxy *proxy = VIRTIO_PCI(obj);
2564
2565 proxy->disable_legacy = ON_OFF_AUTO_ON;
2566 proxy->disable_modern = false;
2567 }
2568
2569 void virtio_pci_types_register(const VirtioPCIDeviceTypeInfo *t)
2570 {
2571 char *base_name = NULL;
2572 TypeInfo base_type_info = {
2573 .name = t->base_name,
2574 .parent = t->parent ? t->parent : TYPE_VIRTIO_PCI,
2575 .instance_size = t->instance_size,
2576 .instance_init = t->instance_init,
2577 .instance_finalize = t->instance_finalize,
2578 .class_size = t->class_size,
2579 .abstract = true,
2580 .interfaces = t->interfaces,
2581 };
2582 TypeInfo generic_type_info = {
2583 .name = t->generic_name,
2584 .parent = base_type_info.name,
2585 .class_init = virtio_pci_generic_class_init,
2586 .interfaces = (InterfaceInfo[]) {
2587 { INTERFACE_PCIE_DEVICE },
2588 { INTERFACE_CONVENTIONAL_PCI_DEVICE },
2589 { }
2590 },
2591 };
2592
2593 if (!base_type_info.name) {
2594 /* No base type -> register a single generic device type */
2595 /* use intermediate %s-base-type to add generic device props */
2596 base_name = g_strdup_printf("%s-base-type", t->generic_name);
2597 base_type_info.name = base_name;
2598 base_type_info.class_init = virtio_pci_generic_class_init;
2599
2600 generic_type_info.parent = base_name;
2601 generic_type_info.class_init = virtio_pci_base_class_init;
2602 generic_type_info.class_data = (void *)t;
2603
2604 assert(!t->non_transitional_name);
2605 assert(!t->transitional_name);
2606 } else {
2607 base_type_info.class_init = virtio_pci_base_class_init;
2608 base_type_info.class_data = (void *)t;
2609 }
2610
2611 type_register(&base_type_info);
2612 if (generic_type_info.name) {
2613 type_register(&generic_type_info);
2614 }
2615
2616 if (t->non_transitional_name) {
2617 const TypeInfo non_transitional_type_info = {
2618 .name = t->non_transitional_name,
2619 .parent = base_type_info.name,
2620 .instance_init = virtio_pci_non_transitional_instance_init,
2621 .interfaces = (InterfaceInfo[]) {
2622 { INTERFACE_PCIE_DEVICE },
2623 { INTERFACE_CONVENTIONAL_PCI_DEVICE },
2624 { }
2625 },
2626 };
2627 type_register(&non_transitional_type_info);
2628 }
2629
2630 if (t->transitional_name) {
2631 const TypeInfo transitional_type_info = {
2632 .name = t->transitional_name,
2633 .parent = base_type_info.name,
2634 .instance_init = virtio_pci_transitional_instance_init,
2635 .interfaces = (InterfaceInfo[]) {
2636 /*
2637 * Transitional virtio devices work only as Conventional PCI
2638 * devices because they require PIO ports.
2639 */
2640 { INTERFACE_CONVENTIONAL_PCI_DEVICE },
2641 { }
2642 },
2643 };
2644 type_register(&transitional_type_info);
2645 }
2646 g_free(base_name);
2647 }
2648
2649 unsigned virtio_pci_optimal_num_queues(unsigned fixed_queues)
2650 {
2651 /*
2652 * 1:1 vq to vCPU mapping is ideal because the same vCPU that submitted
2653 * virtqueue buffers can handle their completion. When a different vCPU
2654 * handles completion it may need to IPI the vCPU that submitted the
2655 * request and this adds overhead.
2656 *
2657 * Virtqueues consume guest RAM and MSI-X vectors. This is wasteful in
2658 * guests with very many vCPUs and a device that is only used by a few
2659 * vCPUs. Unfortunately optimizing that case requires manual pinning inside
2660 * the guest, so those users might as well manually set the number of
2661 * queues. There is no upper limit that can be applied automatically and
2662 * doing so arbitrarily would result in a sudden performance drop once the
2663 * threshold number of vCPUs is exceeded.
2664 */
2665 unsigned num_queues = current_machine->smp.cpus;
2666
2667 /*
2668 * The maximum number of MSI-X vectors is PCI_MSIX_FLAGS_QSIZE + 1, but the
2669 * config change interrupt and the fixed virtqueues must be taken into
2670 * account too.
2671 */
2672 num_queues = MIN(num_queues, PCI_MSIX_FLAGS_QSIZE - fixed_queues);
2673
2674 /*
2675 * There is a limit to how many virtqueues a device can have.
2676 */
2677 return MIN(num_queues, VIRTIO_QUEUE_MAX - fixed_queues);
2678 }
2679
2680 /* virtio-pci-bus */
2681
2682 static void virtio_pci_bus_new(VirtioBusState *bus, size_t bus_size,
2683 VirtIOPCIProxy *dev)
2684 {
2685 DeviceState *qdev = DEVICE(dev);
2686 char virtio_bus_name[] = "virtio-bus";
2687
2688 qbus_init(bus, bus_size, TYPE_VIRTIO_PCI_BUS, qdev, virtio_bus_name);
2689 }
2690
2691 static void virtio_pci_bus_class_init(ObjectClass *klass, void *data)
2692 {
2693 BusClass *bus_class = BUS_CLASS(klass);
2694 VirtioBusClass *k = VIRTIO_BUS_CLASS(klass);
2695 bus_class->max_dev = 1;
2696 k->notify = virtio_pci_notify;
2697 k->save_config = virtio_pci_save_config;
2698 k->load_config = virtio_pci_load_config;
2699 k->save_queue = virtio_pci_save_queue;
2700 k->load_queue = virtio_pci_load_queue;
2701 k->save_extra_state = virtio_pci_save_extra_state;
2702 k->load_extra_state = virtio_pci_load_extra_state;
2703 k->has_extra_state = virtio_pci_has_extra_state;
2704 k->query_guest_notifiers = virtio_pci_query_guest_notifiers;
2705 k->set_guest_notifiers = virtio_pci_set_guest_notifiers;
2706 k->set_host_notifier_mr = virtio_pci_set_host_notifier_mr;
2707 k->vmstate_change = virtio_pci_vmstate_change;
2708 k->pre_plugged = virtio_pci_pre_plugged;
2709 k->device_plugged = virtio_pci_device_plugged;
2710 k->device_unplugged = virtio_pci_device_unplugged;
2711 k->query_nvectors = virtio_pci_query_nvectors;
2712 k->ioeventfd_enabled = virtio_pci_ioeventfd_enabled;
2713 k->ioeventfd_assign = virtio_pci_ioeventfd_assign;
2714 k->get_dma_as = virtio_pci_get_dma_as;
2715 k->iommu_enabled = virtio_pci_iommu_enabled;
2716 k->queue_enabled = virtio_pci_queue_enabled;
2717 }
2718
2719 static const TypeInfo virtio_pci_bus_info = {
2720 .name = TYPE_VIRTIO_PCI_BUS,
2721 .parent = TYPE_VIRTIO_BUS,
2722 .instance_size = sizeof(VirtioPCIBusState),
2723 .class_size = sizeof(VirtioPCIBusClass),
2724 .class_init = virtio_pci_bus_class_init,
2725 };
2726
2727 static void virtio_pci_register_types(void)
2728 {
2729 /* Base types: */
2730 type_register_static(&virtio_pci_bus_info);
2731 type_register_static(&virtio_pci_info);
2732 }
2733
2734 type_init(virtio_pci_register_types)
2735
Mirror of https://git.qemu.org/git/qemu.git