include/configs/CRAYL1.h

   1 /*
   2  * (C) Copyright 2000-2004
   3  * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
   4  * David Updegraff, Cray, Inc.  dave@cray.com: our 405 is walnut-lite..
   5  *
   6  * See file CREDITS for list of people who contributed to this
   7  * project.
   8  *
   9  * This program is free software; you can redistribute it and/or
  10  * modify it under the terms of the GNU General Public License as
  11  * published by the Free Software Foundation; either version 2 of
  12  * the License, or (at your option) any later version.
  13  *
  14  * This program is distributed in the hope that it will be useful,
  15  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  16  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  17  * GNU General Public License for more details.
  18  *
  19  * You should have received a copy of the GNU General Public License
  20  * along with this program; if not, write to the Free Software
  21  * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  22  * MA 02111-1307 USA
  23  */
  24 /*
  25  * board/config.h - configuration options, board specific
  26  */
  27
  28 #ifndef __CONFIG_H
  29 #define __CONFIG_H
  30
  31 #define CONFIG_CRAYL1
  32 /*
  33  * High Level Configuration Options
  34  * (easy to change)
  35  */
  36
  37 #define CONFIG_405GP            1       /* This is a PPC405 CPU */
  38 #define CONFIG_4xx                  1   /* ...member of PPC405 family */
  39
  40 /*
  41  * Note: I make an "image" from U-Boot itself, which prefixes 0x40
  42  * bytes of header info, hence start address is thus shifted.
  43  */
  44 #define CONFIG_SYS_TEXT_BASE    0xFFFD0040
  45
  46 #define CONFIG_SYS_CLK_FREQ 25000000
  47 #define CONFIG_BAUDRATE         9600
  48 #define CONFIG_BOOTDELAY        5       /* autoboot after 5 seconds     */
  49
  50 #define CONFIG_PPC4xx_EMAC
  51 #define CONFIG_MII                  1   /* MII PHY management */
  52 #define CONFIG_PHY_ADDR         1       /* PHY address; handling of ENET */
  53 #define CONFIG_BOARD_EARLY_INIT_F 1     /* early setup for 405gp */
  54 #define CONFIG_MISC_INIT_R      1       /* so that a misc_init_r() is called */
  55 #define CONFIG_NET_MULTI
  56
  57 #define CONFIG_CONS_INDEX       1       /* Use UART0                    */
  58 #define CONFIG_SYS_NS16550
  59 #define CONFIG_SYS_NS16550_SERIAL
  60 #define CONFIG_SYS_NS16550_REG_SIZE     1
  61 #define CONFIG_SYS_NS16550_CLK          get_serial_clock()
  62
  63 /* set PRAM to keep U-Boot out, mem= to keep linux out, and initrd_hi to
  64  * keep possible initrd ramdisk decompression out.  This is in k (1024 bytes)
  65  #define CONFIG_PRAM                    16
  66  */
  67 #define CONFIG_LOADADDR         0x100000        /* where TFTP images go */
  68 #undef CONFIG_BOOTARGS
  69
  70 /* Bootcmd is overridden by the bootscript in board/cray/L1
  71  */
  72 #define CONFIG_SYS_AUTOLOAD             "no"
  73 #define CONFIG_BOOTCOMMAND      "dhcp"
  74
  75 /*
  76  * ..during experiments..
  77  #define CONFIG_SERVERIP         10.0.0.1
  78  #define CONFIG_ETHADDR          00:40:a6:80:14:5
  79  */
  80 #define CONFIG_HARD_I2C         1               /* hardware support for i2c */
  81 #define CONFIG_PPC4XX_I2C               /* use PPC4xx driver            */
  82 #define CONFIG_SDRAM_BANK0              1
  83 #define CONFIG_SYS_I2C_SPEED                400000      /* I2C speed and slave address  */
  84 #define CONFIG_SYS_I2C_SLAVE                0x7F
  85 #define CONFIG_SYS_I2C_EEPROM_ADDR     0x57
  86 #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1
  87 #define CONFIG_IDENT_STRING     "Cray L1"
  88 #define CONFIG_ENV_OVERWRITE     1
  89 #define CONFIG_SYS_HZ                        1000       /* decrementer freq: 1 ms ticks */
  90 #define CONFIG_SYS_HUSH_PARSER                  1
  91 #define CONFIG_SYS_PROMPT_HUSH_PS2              "> "
  92 #define CONFIG_SOURCE                   1
  93
  94
  95 /*
  96  * Command line configuration.
  97  */
  98
  99 #define CONFIG_CMD_ASKENV
 100 #define CONFIG_CMD_BDI
 101 #define CONFIG_CMD_CONSOLE
 102 #define CONFIG_CMD_DATE
 103 #define CONFIG_CMD_DHCP
 104 #define CONFIG_CMD_DIAG
 105 #define CONFIG_CMD_ECHO
 106 #define CONFIG_CMD_EEPROM
 107 #define CONFIG_CMD_FLASH
 108 #define CONFIG_CMD_I2C
 109 #define CONFIG_CMD_IMI
 110 #define CONFIG_CMD_IMMAP
 111 #define CONFIG_CMD_MEMORY
 112 #define CONFIG_CMD_NET
 113 #define CONFIG_CMD_REGINFO
 114 #define CONFIG_CMD_RUN
 115 #define CONFIG_CMD_SAVEENV
 116 #define CONFIG_CMD_SETGETDCR
 117 #define CONFIG_CMD_SOURCE
 118
 119
 120 /*
 121  * BOOTP options
 122  */
 123 #define CONFIG_BOOTP_SUBNETMASK
 124 #define CONFIG_BOOTP_GATEWAY
 125 #define CONFIG_BOOTP_HOSTNAME
 126 #define CONFIG_BOOTP_BOOTPATH
 127 #define CONFIG_BOOTP_VENDOREX
 128 #define CONFIG_BOOTP_DNS
 129 #define CONFIG_BOOTP_BOOTFILESIZE
 130
 131
 132 /*
 133  * how many time to fail & restart a net-TFTP before giving up & resetting
 134  * the board hoping that a reset of net interface might help..
 135  */
 136 #define CONFIG_NET_RESET 5
 137
 138 /*
 139  * bauds.  Just to make it compile; in our case, I read the base_baud
 140  * from the DCR anyway, so its kinda-tied to the above ref. clock which in turn
 141  * drives the system clock.
 142  */
 143 #define CONFIG_SYS_BASE_BAUD       403225
 144 #define CONFIG_SYS_BAUDRATE_TABLE  \
 145     {300, 600, 1200, 2400, 4800, 9600, 19200, 38400, 57600, 115200, 230400}
 146
 147 /*
 148  * Miscellaneous configurable options
 149  */
 150 #define CONFIG_SYS_PROMPT       "=> "                           /* Monitor Command Prompt       */
 151 #define CONFIG_SYS_CBSIZE       256                             /* Console I/O Buffer Size      */
 152 #define CONFIG_SYS_BARGSIZE     CONFIG_SYS_CBSIZE                       /* Boot Argument Buffer Size    */
 153 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16)      /* Print Buffer Size */
 154 #define CONFIG_SYS_MAXARGS      16                              /* max number of command args   */
 155
 156
 157 #define CONFIG_SYS_LOAD_ADDR            0x100000        /* where to load what we get from TFTP */
 158 #define CONFIG_SYS_TFTP_LOADADDR        CONFIG_SYS_LOAD_ADDR
 159 #define CONFIG_SYS_EXTBDINFO            1               /* To use extended board_into (bd_t) */
 160 #define CONFIG_SYS_DRAM_TEST            1
 161
 162 /*-----------------------------------------------------------------------
 163  * Start addresses for the final memory configuration
 164  * (Set up by the startup code)
 165  * Please note that CONFIG_SYS_SDRAM_BASE _must_ start at 0
 166  */
 167 #define CONFIG_SYS_SDRAM_BASE           0x00000000
 168 #define CONFIG_SYS_FLASH_BASE           0xFFC00000
 169 #define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE
 170
 171
 172 #define CONFIG_SYS_MONITOR_LEN          (192 * 1024)    /* Reserve 192 kB for Monitor   */
 173
 174 /*
 175  * For booting Linux, the board info and command line data
 176  * have to be in the first 8 MB of memory, since this is
 177  * the maximum mapped by the Linux kernel during initialization.
 178  */
 179 #define CONFIG_SYS_BOOTMAPSZ            (8 << 20)       /* Initial Memory map for Linux */
 180 /*-----------------------------------------------------------------------
 181  * FLASH organization
 182  */
 183 #define CONFIG_SYS_MAX_FLASH_BANKS       1              /* max number of memory banks           */
 184 #define CONFIG_SYS_MAX_FLASH_SECT        64             /* max number of sectors on one chip    */
 185 #define CONFIG_SYS_FLASH_ERASE_TOUT 120000      /* Timeout for Flash Erase (in ms)      */
 186 #define CONFIG_SYS_FLASH_WRITE_TOUT 500 /* Timeout for Flash Write (in ms)      */
 187
 188 /* BEG ENVIRONNEMENT FLASH: needs to be a whole FlashSector  */
 189 #define CONFIG_ENV_OFFSET               0x3c8000
 190 #define CONFIG_ENV_IS_IN_FLASH  1       /* use FLASH for environment vars */
 191 #define CONFIG_ENV_SIZE         0x1000   /* Total Size of Environment area      */
 192 #define CONFIG_ENV_SECT_SIZE    0x10000  /* see README - env sector total size  */
 193
 194 /* Memory tests: U-BOOT relocates itself to the top of Ram, so its at
 195  * 32meg-(128k+some_malloc_space+copy-of-ENV sector)..
 196  */
 197 #define CONFIG_SYS_SDRAM_SIZE           32              /* megs of ram */
 198 #define CONFIG_SYS_MEMTEST_START        0x2000  /* memtest works from the end of */
 199                                                                         /* the exception vector table */
 200                                                                         /* to the end of the DRAM  */
 201                                                                         /* less monitor and malloc area */
 202 #define CONFIG_SYS_STACK_USAGE          0x10000 /* Reserve 64k for the stack usage */
 203 #define CONFIG_SYS_MALLOC_LEN           (128 << 10)     /* 128k for malloc space */
 204 #define CONFIG_SYS_MEM_END_USAGE        ( CONFIG_SYS_MONITOR_LEN \
 205                                 + CONFIG_SYS_MALLOC_LEN \
 206                                 + CONFIG_ENV_SECT_SIZE \
 207                                 + CONFIG_SYS_STACK_USAGE )
 208
 209 #define CONFIG_SYS_MEMTEST_END          (CONFIG_SYS_SDRAM_SIZE * 1024 * 1024 - CONFIG_SYS_MEM_END_USAGE)
 210 /* END ENVIRONNEMENT FLASH */
 211
 212 /*
 213  * Init Memory Controller:
 214  *
 215  * BR0/1 and OR0/1 (FLASH)
 216  */
 217
 218 #define FLASH_BASE0_PRELIM      CONFIG_SYS_FLASH_BASE   /* FLASH bank #0        */
 219
 220
 221 /*-----------------------------------------------------------------------
 222  * Definitions for initial stack pointer and data area (in OnChipMem )
 223  */
 224 #if 1
 225 /* On Chip Memory location */
 226 #define CONFIG_SYS_TEMP_STACK_OCM       1
 227 #define CONFIG_SYS_OCM_DATA_ADDR        0xF0000000
 228 #define CONFIG_SYS_OCM_DATA_SIZE        0x1000
 229
 230 #define CONFIG_SYS_INIT_RAM_ADDR        CONFIG_SYS_OCM_DATA_ADDR /* inside of SDRAM             */
 231 #define CONFIG_SYS_INIT_RAM_SIZE        CONFIG_SYS_OCM_DATA_SIZE /* Size of used area in RAM    */
 232 #define CONFIG_SYS_GBL_DATA_OFFSET    (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
 233 #define CONFIG_SYS_INIT_SP_OFFSET      CONFIG_SYS_GBL_DATA_OFFSET
 234 #else
 235 #define CONFIG_SYS_OCM_DATA_ADDR        0xF0000000
 236 #define CONFIG_SYS_OCM_DATA_SIZE        0x1000
 237 #define CONFIG_SYS_INIT_RAM_ADDR        CONFIG_SYS_OCM_DATA_ADDR        /* inside of On Chip SRAM    */
 238 #define CONFIG_SYS_INIT_RAM_SIZE        CONFIG_SYS_OCM_DATA_SIZE        /* Size of On Chip SRAM      */
 239 #define CONFIG_SYS_GBL_DATA_OFFSET      (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
 240 #define CONFIG_SYS_INIT_SP_OFFSET       CONFIG_SYS_GBL_DATA_OFFSET
 241 #endif
 242
 243 /*-----------------------------------------------------------------------
 244  * Definitions for Serial Presence Detect EEPROM address
 245  */
 246 #define EEPROM_WRITE_ADDRESS 0xA0
 247 #define EEPROM_READ_ADDRESS  0xA1
 248
 249 #endif  /* __CONFIG_H */