include/configs/M53017EVB.h

   1 /*
   2  * Configuation settings for the Freescale MCF53017EVB.
   3  *
   4  * Copyright (C) 2004-2008 Freescale Semiconductor, Inc.
   5  * TsiChung Liew (Tsi-Chung.Liew@freescale.com)
   6  *
   7  * See file CREDITS for list of people who contributed to this
   8  * project.
   9  *
  10  * This program is free software; you can redistribute it and/or
  11  * modify it under the terms of the GNU General Public License as
  12  * published by the Free Software Foundation; either version 2 of
  13  * the License, or (at your option) any later version.
  14  *
  15  * This program is distributed in the hope that it will be useful,
  16  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  17  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  18  * GNU General Public License for more details.
  19  *
  20  * You should have received a copy of the GNU General Public License
  21  * along with this program; if not, write to the Free Software
  22  * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  23  * MA 02111-1307 USA
  24  */
  25
  26 /*
  27  * board/config.h - configuration options, board specific
  28  */
  29
  30 #ifndef _M53017EVB_H
  31 #define _M53017EVB_H
  32
  33 /*
  34  * High Level Configuration Options
  35  * (easy to change)
  36  */
  37 #define CONFIG_MCF5301x         /* define processor family */
  38 #define CONFIG_M53015           /* define processor type */
  39
  40 #define CONFIG_MCFUART
  41 #define CONFIG_SYS_UART_PORT            (0)
  42 #define CONFIG_BAUDRATE                 115200
  43 #define CONFIG_SYS_BAUDRATE_TABLE       { 9600 , 19200 , 38400 , 57600, 115200 }
  44
  45 #undef CONFIG_WATCHDOG
  46 #define CONFIG_WATCHDOG_TIMEOUT         5000
  47
  48 /* Command line configuration */
  49 #include <config_cmd_default.h>
  50
  51 #define CONFIG_CMD_CACHE
  52 #define CONFIG_CMD_DATE
  53 #define CONFIG_CMD_ELF
  54 #define CONFIG_CMD_FLASH
  55 #undef CONFIG_CMD_I2C
  56 #define CONFIG_CMD_MEMORY
  57 #define CONFIG_CMD_MISC
  58 #define CONFIG_CMD_MII
  59 #define CONFIG_CMD_NET
  60 #define CONFIG_CMD_PING
  61 #define CONFIG_CMD_REGINFO
  62
  63 #define CONFIG_SYS_UNIFY_CACHE
  64
  65 #define CONFIG_MCFFEC
  66 #ifdef CONFIG_MCFFEC
  67 #       define CONFIG_NET_MULTI         1
  68 #       define CONFIG_MII               1
  69 #       define CONFIG_MII_INIT          1
  70 #       define CONFIG_SYS_DISCOVER_PHY
  71 #       define CONFIG_SYS_RX_ETH_BUFFER 8
  72 #       define CONFIG_SYS_FAULT_ECHO_LINK_DOWN
  73 #       define CONFIG_HAS_ETH1
  74
  75 #       define CONFIG_SYS_FEC0_PINMUX   0
  76 #       define CONFIG_SYS_FEC0_MIIBASE  CONFIG_SYS_FEC0_IOBASE
  77 #       define CONFIG_SYS_FEC1_PINMUX   0
  78 #       define CONFIG_SYS_FEC1_MIIBASE  CONFIG_SYS_FEC1_IOBASE
  79 #       define MCFFEC_TOUT_LOOP         50000
  80 /* If CONFIG_SYS_DISCOVER_PHY is not defined - hardcoded */
  81 #       ifndef CONFIG_SYS_DISCOVER_PHY
  82 #               define FECDUPLEX        FULL
  83 #               define FECSPEED         _100BASET
  84 #       else
  85 #               ifndef CONFIG_SYS_FAULT_ECHO_LINK_DOWN
  86 #                       define CONFIG_SYS_FAULT_ECHO_LINK_DOWN
  87 #               endif
  88 #       endif                   /* CONFIG_SYS_DISCOVER_PHY */
  89 #endif
  90
  91 #define CONFIG_MCFRTC
  92 #undef RTC_DEBUG
  93 #define CONFIG_SYS_RTC_CNT              (0x8000)
  94 #define CONFIG_SYS_RTC_SETUP            (RTC_OCEN_OSCBYP | RTC_OCEN_CLKEN)
  95
  96 /* Timer */
  97 #define CONFIG_MCFTMR
  98 #undef CONFIG_MCFPIT
  99
 100 /* I2C */
 101 #define CONFIG_FSL_I2C
 102 #define CONFIG_HARD_I2C                 /* I2C with hw support */
 103 #undef CONFIG_SOFT_I2C                  /* I2C bit-banged */
 104 #define CONFIG_SYS_I2C_SPEED            80000
 105 #define CONFIG_SYS_I2C_SLAVE            0x7F
 106 #define CONFIG_SYS_I2C_OFFSET           0x58000
 107 #define CONFIG_SYS_IMMR                 CONFIG_SYS_MBAR
 108
 109 #define CONFIG_BOOTDELAY                1       /* autoboot after 5 seconds */
 110 #define CONFIG_UDP_CHECKSUM
 111
 112 #ifdef CONFIG_MCFFEC
 113 #       define CONFIG_ETHADDR   00:e0:0c:bc:e5:60
 114 #       define CONFIG_ETH1ADDR  00:e0:0c:bc:e5:61
 115 #       define CONFIG_IPADDR    192.162.1.2
 116 #       define CONFIG_NETMASK   255.255.255.0
 117 #       define CONFIG_SERVERIP  192.162.1.1
 118 #       define CONFIG_GATEWAYIP 192.162.1.1
 119 #       define CONFIG_OVERWRITE_ETHADDR_ONCE
 120 #endif                          /* FEC_ENET */
 121
 122 #define CONFIG_HOSTNAME         M53017
 123 #define CONFIG_EXTRA_ENV_SETTINGS               \
 124         "netdev=eth0\0"                         \
 125         "loadaddr=40010000\0"                   \
 126         "u-boot=u-boot.bin\0"                   \
 127         "load=tftp ${loadaddr) ${u-boot}\0"     \
 128         "upd=run load; run prog\0"              \
 129         "prog=prot off 0 3ffff;"                \
 130         "era 0 3ffff;"                          \
 131         "cp.b ${loadaddr} 0 ${filesize};"       \
 132         "save\0"                                \
 133         ""
 134
 135 #define CONFIG_PRAM             512     /* 512 KB */
 136 #define CONFIG_SYS_PROMPT       "-> "
 137 #define CONFIG_SYS_LONGHELP     /* undef to save memory */
 138
 139 #ifdef CONFIG_CMD_KGDB
 140 #       define CONFIG_SYS_CBSIZE        1024    /* Console I/O Buffer Size */
 141 #else
 142 #       define CONFIG_SYS_CBSIZE        256     /* Console I/O Buffer Size */
 143 #endif
 144
 145 #define CONFIG_SYS_PBSIZE       (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16)        /* Print Buffer Size */
 146 #define CONFIG_SYS_MAXARGS      16              /* max number of cmd args */
 147 #define CONFIG_SYS_BARGSIZE     CONFIG_SYS_CBSIZE       /* Boot Arg Buf Sz */
 148 #define CONFIG_SYS_LOAD_ADDR    0x40010000
 149
 150 #define CONFIG_SYS_HZ           1000
 151 #define CONFIG_SYS_CLK          80000000
 152 #define CONFIG_SYS_CPU_CLK      CONFIG_SYS_CLK * 3
 153
 154 #define CONFIG_SYS_MBAR         0xFC000000
 155
 156 /*
 157  * Low Level Configuration Settings
 158  * (address mappings, register initial values, etc.)
 159  * You should know what you are doing if you make changes here.
 160  */
 161 /*
 162  * Definitions for initial stack pointer and data area (in DPRAM)
 163  */
 164 #define CONFIG_SYS_INIT_RAM_ADDR        0x80000000
 165 #define CONFIG_SYS_INIT_RAM_END         0x20000 /* End of used area in internal SRAM */
 166 #define CONFIG_SYS_INIT_RAM_CTRL        0x21
 167 #define CONFIG_SYS_GBL_DATA_SIZE        128     /* size in bytes reserved for initial data */
 168 #define CONFIG_SYS_GBL_DATA_OFFSET      ((CONFIG_SYS_INIT_RAM_END - CONFIG_SYS_GBL_DATA_SIZE) - 0x10)
 169 #define CONFIG_SYS_INIT_SP_OFFSET       CONFIG_SYS_GBL_DATA_OFFSET
 170
 171 /*
 172  * Start addresses for the final memory configuration
 173  * (Set up by the startup code)
 174  * Please note that CONFIG_SYS_SDRAM_BASE _must_ start at 0
 175  */
 176 #define CONFIG_SYS_SDRAM_BASE           0x40000000
 177 #define CONFIG_SYS_SDRAM_SIZE           64      /* SDRAM size in MB */
 178 #define CONFIG_SYS_SDRAM_CFG1           0x43711630
 179 #define CONFIG_SYS_SDRAM_CFG2           0x56670000
 180 #define CONFIG_SYS_SDRAM_CTRL           0xE1002000
 181 #define CONFIG_SYS_SDRAM_EMOD           0x80010000
 182 #define CONFIG_SYS_SDRAM_MODE           0x00CD0000
 183
 184 #define CONFIG_SYS_MEMTEST_START        CONFIG_SYS_SDRAM_BASE + 0x400
 185 #define CONFIG_SYS_MEMTEST_END          ((CONFIG_SYS_SDRAM_SIZE - 3) << 20)
 186
 187 #define CONFIG_SYS_MONITOR_BASE         (CONFIG_SYS_FLASH_BASE + 0x400)
 188 #define CONFIG_SYS_MONITOR_LEN          (256 << 10)     /* Reserve 256 kB for Monitor */
 189
 190 #define CONFIG_SYS_BOOTPARAMS_LEN       64*1024
 191 #define CONFIG_SYS_MALLOC_LEN           (128 << 10)     /* Reserve 128 kB for malloc() */
 192
 193 /*
 194  * For booting Linux, the board info and command line data
 195  * have to be in the first 8 MB of memory, since this is
 196  * the maximum mapped by the Linux kernel during initialization ??
 197  */
 198 #define CONFIG_SYS_BOOTMAPSZ            (CONFIG_SYS_SDRAM_BASE + (CONFIG_SYS_SDRAM_SIZE << 20))
 199 #define CONFIG_SYS_BOOTM_LEN            (CONFIG_SYS_SDRAM_SIZE << 20)
 200
 201 /*-----------------------------------------------------------------------
 202  * FLASH organization
 203  */
 204 #define CONFIG_SYS_FLASH_CFI
 205 #ifdef CONFIG_SYS_FLASH_CFI
 206 #       define CONFIG_FLASH_CFI_DRIVER          1
 207 #       define CONFIG_SYS_FLASH_SIZE            0x800000        /* Max size that the board might have */
 208 #       define CONFIG_SYS_FLASH_CFI_WIDTH       FLASH_CFI_16BIT
 209 #       define CONFIG_SYS_MAX_FLASH_BANKS       1       /* max number of memory banks */
 210 #       define CONFIG_SYS_MAX_FLASH_SECT        137     /* max number of sectors on one chip */
 211 #       define CONFIG_SYS_FLASH_PROTECTION      /* "Real" (hardware) sectors protection */
 212 #endif
 213
 214 #define CONFIG_SYS_FLASH_BASE           CONFIG_SYS_CS0_BASE
 215
 216 /* Configuration for environment
 217  * Environment is embedded in u-boot in the second sector of the flash
 218  */
 219 #define CONFIG_ENV_OFFSET               0x8000
 220 #define CONFIG_ENV_SIZE                 0x1000
 221 #define CONFIG_ENV_SECT_SIZE            0x8000
 222 #define CONFIG_ENV_IS_IN_FLASH          1
 223
 224 /*-----------------------------------------------------------------------
 225  * Cache Configuration
 226  */
 227 #define CONFIG_SYS_CACHELINE_SIZE       16
 228
 229 /*-----------------------------------------------------------------------
 230  * Chipselect bank definitions
 231  */
 232 /*
 233  * CS0 - NOR Flash
 234  * CS1 - Ext SRAM
 235  * CS2 - Available
 236  * CS3 - Available
 237  * CS4 - Available
 238  * CS5 - Available
 239  */
 240 #define CONFIG_SYS_CS0_BASE             0
 241 #define CONFIG_SYS_CS0_MASK             0x00FF0001
 242 #define CONFIG_SYS_CS0_CTRL             0x00001FA0
 243
 244 #define CONFIG_SYS_CS1_BASE             0xC0000000
 245 #define CONFIG_SYS_CS1_MASK             0x00070001
 246 #define CONFIG_SYS_CS1_CTRL             0x00001FA0
 247
 248 #endif                          /* _M53017EVB_H */