include/configs/VCMA9.h

   1 /*
   2  * (C) Copyright 2002, 2003
   3  * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
   4  * Marius Groeger <mgroeger@sysgo.de>
   5  * Gary Jennejohn <garyj@denx.de>
   6  * David Mueller <d.mueller@elsoft.ch>
   7  *
   8  * Configuation settings for the MPL VCMA9 board.
   9  *
  10  * SPDX-License-Identifier:     GPL-2.0+
  11  */
  12
  13 #ifndef __CONFIG_H
  14 #define __CONFIG_H
  15
  16
  17 #define MACH_TYPE_MPL_VCMA9     227
  18
  19 /*
  20  * High Level Configuration Options
  21  * (easy to change)
  22  */
  23 #define CONFIG_S3C24X0          /* This is a SAMSUNG S3C24x0-type SoC */
  24 #define CONFIG_S3C2410          /* specifically a SAMSUNG S3C2410 SoC */
  25 #define CONFIG_VCMA9            /* on a MPL VCMA9 Board  */
  26 #define CONFIG_MACH_TYPE        MACH_TYPE_MPL_VCMA9 /* Machine type */
  27
  28 #define CONFIG_SYS_TEXT_BASE    0x0
  29
  30 #define CONFIG_SYS_GENERIC_BOARD
  31
  32 #define CONFIG_SYS_ARM_CACHE_WRITETHROUGH
  33
  34 /* input clock of PLL (VCMA9 has 12MHz input clock) */
  35 #define CONFIG_SYS_CLK_FREQ     12000000
  36
  37 #define CONFIG_CMDLINE_TAG      /* enable passing of ATAGs */
  38 #define CONFIG_SETUP_MEMORY_TAGS
  39 #define CONFIG_INITRD_TAG
  40
  41 /*
  42  * BOOTP options
  43  */
  44 #define CONFIG_BOOTP_BOOTFILESIZE
  45 #define CONFIG_BOOTP_BOOTPATH
  46 #define CONFIG_BOOTP_GATEWAY
  47 #define CONFIG_BOOTP_HOSTNAME
  48
  49 /*
  50  * Command line configuration.
  51  */
  52 #define CONFIG_CMD_CACHE
  53 #define CONFIG_CMD_EEPROM
  54 #define CONFIG_CMD_I2C
  55 #define CONFIG_CMD_USB
  56 #define CONFIG_CMD_REGINFO
  57 #define CONFIG_CMD_DATE
  58 #define CONFIG_CMD_ELF
  59 #define CONFIG_CMD_DHCP
  60 #define CONFIG_CMD_PING
  61 #define CONFIG_CMD_BSP
  62 #define CONFIG_CMD_NAND
  63
  64 #define CONFIG_BOARD_LATE_INIT
  65
  66 #define CONFIG_SYS_HUSH_PARSER
  67 #define CONFIG_CMDLINE_EDITING
  68
  69 /*
  70  * I2C stuff:
  71  * the MPL VCMA9 is equipped with an ATMEL 24C256 EEPROM at
  72  * address 0x50 with 16bit addressing
  73  */
  74 #define CONFIG_SYS_I2C
  75
  76 /* we use the built-in I2C controller */
  77 #define CONFIG_SYS_I2C_S3C24X0
  78 #define CONFIG_SYS_I2C_S3C24X0_SPEED    100000  /* I2C speed */
  79 #define CONFIG_SYS_I2C_S3C24X0_SLAVE    0x7F    /* I2C slave addr */
  80
  81 #define CONFIG_SYS_I2C_EEPROM_ADDR      0x50
  82 #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN  2
  83 /* use EEPROM for environment vars */
  84 #define CONFIG_ENV_IS_IN_EEPROM         1
  85 /* environment starts at offset 0 */
  86 #define CONFIG_ENV_OFFSET               0x000
  87 /* 2KB should be more than enough */
  88 #define CONFIG_ENV_SIZE                 0x800
  89
  90 #undef CONFIG_SYS_I2C_EEPROM_ADDR_OVERFLOW
  91 /* 64 bytes page write mode on 24C256 */
  92 #define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 6
  93 #define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 10
  94
  95 /*
  96  * Hardware drivers
  97  */
  98 #define CONFIG_CS8900                   /* we have a CS8900 on-board */
  99 #define CONFIG_CS8900_BASE              0x20000300
 100 #define CONFIG_CS8900_BUS16
 101
 102 /*
 103  * select serial console configuration
 104  */
 105 #define CONFIG_S3C24X0_SERIAL
 106 #define CONFIG_SERIAL1          1       /* we use SERIAL 1 on VCMA9 */
 107
 108 /* USB support (currently only works with D-cache off) */
 109 #define CONFIG_USB_OHCI
 110 #define CONFIG_USB_OHCI_S3C24XX
 111 #define CONFIG_USB_KEYBOARD
 112 #define CONFIG_USB_STORAGE
 113 #define CONFIG_DOS_PARTITION
 114
 115 /* Enable needed helper functions */
 116 #define CONFIG_SYS_STDIO_DEREGISTER     /* needs stdio_deregister */
 117
 118 /* RTC */
 119 #define CONFIG_RTC_S3C24X0
 120
 121
 122 /* allow to overwrite serial and ethaddr */
 123 #define CONFIG_ENV_OVERWRITE
 124
 125 #define CONFIG_BAUDRATE                 9600
 126
 127 #define CONFIG_BOOTDELAY                5
 128 #define CONFIG_BOOT_RETRY_TIME          -1
 129 #define CONFIG_RESET_TO_RETRY
 130 #define CONFIG_ZERO_BOOTDELAY_CHECK
 131
 132 #define CONFIG_NETMASK                  255.255.255.0
 133 #define CONFIG_IPADDR                   10.0.0.110
 134 #define CONFIG_SERVERIP                 10.0.0.1
 135
 136 #if defined(CONFIG_CMD_KGDB)
 137 /* speed to run kgdb serial port */
 138 #define CONFIG_KGDB_BAUDRATE            115200
 139 #endif
 140
 141 /* Miscellaneous configurable options */
 142 #define CONFIG_SYS_LONGHELP             /* undef to save memory */
 143 #define CONFIG_SYS_CBSIZE               256
 144 /* Print Buffer Size */
 145 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16)
 146 #define CONFIG_SYS_MAXARGS              16
 147 /* Boot Argument Buffer Size */
 148 #define CONFIG_SYS_BARGSIZE             CONFIG_SYS_CBSIZE
 149
 150 #define CONFIG_DISPLAY_CPUINFO                          /* Display cpu info */
 151 #define CONFIG_DISPLAY_BOARDINFO                        /* Display board info */
 152
 153 #define CONFIG_SYS_MEMTEST_START        0x30000000      /* memtest works on */
 154 #define CONFIG_SYS_MEMTEST_END          0x31FFFFFF      /* 32 MB in DRAM */
 155
 156 #define CONFIG_SYS_ALT_MEMTEST
 157 #define CONFIG_SYS_LOAD_ADDR            0x30800000
 158
 159 /* we configure PWM Timer 4 to 1ms 1000Hz  */
 160
 161 /* support additional compression methods */
 162 #define CONFIG_BZIP2
 163 #define CONFIG_LZO
 164 #define CONFIG_LZMA
 165
 166 /* Ident */
 167 /*#define VERSION_TAG "released"*/
 168 #define VERSION_TAG "unstable"
 169 #define CONFIG_IDENT_STRING "\n(c) 2003 - 2011 by MPL AG Switzerland, " \
 170                             "MEV-10080-001 " VERSION_TAG
 171
 172 /* Physical Memory Map */
 173 #define CONFIG_NR_DRAM_BANKS    1               /* we have 1 bank of DRAM */
 174 #define PHYS_SDRAM_1            0x30000000      /* SDRAM Bank #1 */
 175 #define PHYS_FLASH_1            0x00000000      /* Flash Bank #1 */
 176
 177 #define CONFIG_SYS_FLASH_BASE   PHYS_FLASH_1
 178
 179 /* FLASH and environment organization */
 180
 181 #define CONFIG_SYS_FLASH_CFI
 182 #define CONFIG_FLASH_CFI_DRIVER
 183 #define CONFIG_FLASH_CFI_LEGACY
 184 #define CONFIG_SYS_FLASH_LEGACY_512Kx16
 185 #define CONFIG_FLASH_SHOW_PROGRESS      45
 186 #define CONFIG_SYS_MAX_FLASH_BANKS      1       /* max number of memory banks */
 187 #define CONFIG_SYS_FLASH_BANKS_LIST     { CONFIG_SYS_FLASH_BASE }
 188 #define CONFIG_SYS_MAX_FLASH_SECT       (19)
 189
 190 /*
 191  * Size of malloc() pool
 192  * BZIP2 / LZO / LZMA need a lot of RAM
 193  */
 194 #define CONFIG_SYS_MALLOC_LEN           (4 * 1024 * 1024)
 195 #define CONFIG_SYS_MONITOR_LEN          (512 * 1024)
 196 #define CONFIG_SYS_MONITOR_BASE         CONFIG_SYS_FLASH_BASE
 197
 198 /* NAND configuration */
 199 #ifdef CONFIG_CMD_NAND
 200 #define CONFIG_NAND_S3C2410
 201 #define CONFIG_SYS_S3C2410_NAND_HWECC
 202 #define CONFIG_SYS_MAX_NAND_DEVICE      1
 203 #define CONFIG_SYS_NAND_BASE            0x4E000000
 204 #define CONFIG_S3C24XX_CUSTOM_NAND_TIMING
 205 #define CONFIG_S3C24XX_TACLS            1
 206 #define CONFIG_S3C24XX_TWRPH0           5
 207 #define CONFIG_S3C24XX_TWRPH1           3
 208 #endif
 209
 210 #define MULTI_PURPOSE_SOCKET_ADDR       0x08000000
 211
 212 /* File system */
 213 #define CONFIG_CMD_FAT
 214 #define CONFIG_CMD_UBI
 215 #define CONFIG_CMD_UBIFS
 216 #define CONFIG_CMD_JFFS2
 217 #define CONFIG_YAFFS2
 218 #define CONFIG_RBTREE
 219 #define CONFIG_MTD_DEVICE               /* needed for mtdparts commands */
 220 #define CONFIG_MTD_PARTITIONS
 221 #define CONFIG_CMD_MTDPARTS
 222 #define CONFIG_LZO
 223
 224 #define CONFIG_SYS_SDRAM_BASE           PHYS_SDRAM_1
 225 #define CONFIG_SYS_INIT_SP_ADDR         (CONFIG_SYS_SDRAM_BASE + 0x1000 - \
 226                                         GENERATED_GBL_DATA_SIZE)
 227
 228 #define CONFIG_BOARD_EARLY_INIT_F
 229
 230 #endif /* __CONFIG_H */