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1 /*
2 * Configuration settings for the Sentec Cobra Board.
3 *
4 * (C) Copyright 2003 Josef Baumgartner <josef.baumgartner@telex.de>
5 *
6 * SPDX-License-Identifier: GPL-2.0+
7 */
8
9 /*
10 * configuration for ASTRO "Urmel" board.
11 * Originating from Cobra5272 configuration, messed up by
12 * Wolfgang Wegner <w.wegner@astro-kom.de>
13 * Please do not bother the original author with bug reports
14 * concerning this file.
15 */
16
17 #ifndef _CONFIG_ASTRO_MCF5373L_H
18 #define _CONFIG_ASTRO_MCF5373L_H
19
20 #include <linux/stringify.h>
21
22 /*
23 * set the card type to actually compile for; either of
24 * the possibilities listed below has to be used!
25 */
26 #define CONFIG_ASTRO_V532 1
27
28 #if CONFIG_ASTRO_V532
29 #define ASTRO_ID 0xF8
30 #elif CONFIG_ASTRO_V512
31 #define ASTRO_ID 0xFA
32 #elif CONFIG_ASTRO_TWIN7S2
33 #define ASTRO_ID 0xF9
34 #elif CONFIG_ASTRO_V912
35 #define ASTRO_ID 0xFC
36 #elif CONFIG_ASTRO_COFDMDUOS2
37 #define ASTRO_ID 0xFB
38 #else
39 #error No card type defined!
40 #endif
41
42 #define CONFIG_ASTRO5373L /* define board type */
43
44 /* Command line configuration */
45 /*
46 * CONFIG_RAM defines if u-boot is loaded via BDM (or started from
47 * a different bootloader that has already performed RAM setup) or
48 * started directly from flash, which is the regular case for production
49 * boards.
50 */
51 #ifdef CONFIG_RAM
52 #define CONFIG_MONITOR_IS_IN_RAM
53 #define CONFIG_SYS_TEXT_BASE 0x40020000
54 #define ENABLE_JFFS 0
55 #else
56 #define CONFIG_SYS_TEXT_BASE 0x00000000
57 #define ENABLE_JFFS 1
58 #endif
59
60 #define CONFIG_CMDLINE_EDITING
61
62 #define CONFIG_MCFRTC
63 #undef RTC_DEBUG
64
65 /* Timer */
66 #define CONFIG_MCFTMR
67 #undef CONFIG_MCFPIT
68
69 /* I2C */
70 #define CONFIG_SYS_I2C
71 #define CONFIG_SYS_I2C_FSL
72 #define CONFIG_SYS_FSL_I2C_SPEED 80000
73 #define CONFIG_SYS_FSL_I2C_SLAVE 0x7F
74 #define CONFIG_SYS_FSL_I2C_OFFSET 0x58000
75 #define CONFIG_SYS_IMMR CONFIG_SYS_MBAR
76
77 /*
78 * Defines processor clock - important for correct timings concerning serial
79 * interface etc.
80 */
81
82 #define CONFIG_SYS_CLK 80000000
83 #define CONFIG_SYS_CPU_CLK (CONFIG_SYS_CLK * 3)
84 #define CONFIG_SYS_SDRAM_SIZE 32 /* SDRAM size in MB */
85
86 #define CONFIG_SYS_CORE_SRAM_SIZE 0x8000
87 #define CONFIG_SYS_CORE_SRAM 0x80000000
88
89 #define CONFIG_SYS_UNIFY_CACHE
90
91 /*
92 * Define baudrate for UART1 (console output, tftp, ...)
93 * default value of CONFIG_BAUDRATE for Sentec board: 19200 baud
94 * CONFIG_SYS_BAUDRATE_TABLE defines values that can be selected
95 * in u-boot command interface
96 */
97
98 #define CONFIG_MCFUART
99 #define CONFIG_SYS_UART_PORT (2)
100 #define CONFIG_SYS_UART2_ALT3_GPIO
101
102 /*
103 * Watchdog configuration; Watchdog is disabled for running from RAM
104 * and set to highest possible value else. Beware there is no check
105 * in the watchdog code to validate the timeout value set here!
106 */
107
108 #ifndef CONFIG_MONITOR_IS_IN_RAM
109 #define CONFIG_WATCHDOG
110 #define CONFIG_WATCHDOG_TIMEOUT 3355 /* timeout in milliseconds */
111 #endif
112
113 /*
114 * Configuration for environment
115 * Environment is located in the last sector of the flash
116 */
117
118 #ifndef CONFIG_MONITOR_IS_IN_RAM
119 #define CONFIG_ENV_OFFSET 0x1FF8000
120 #define CONFIG_ENV_SECT_SIZE 0x8000
121 #else
122 /*
123 * environment in RAM - This is used to use a single PC-based application
124 * to load an image, load U-Boot, load an environment and then start U-Boot
125 * to execute the commands from the environment. Feedback is done via setting
126 * and reading memory locations.
127 */
128 #define CONFIG_ENV_ADDR 0x40060000
129 #define CONFIG_ENV_SECT_SIZE 0x8000
130 #endif
131
132 /* here we put our FPGA configuration... */
133 #define CONFIG_MISC_INIT_R 1
134
135 /* Define user parameters that have to be customized most likely */
136
137 /* AUTOBOOT settings - booting images automatically by u-boot after power on */
138
139 /*
140 * The following settings will be contained in the environment block ; if you
141 * want to use a neutral environment all those settings can be manually set in
142 * u-boot: 'set' command
143 */
144
145 #define CONFIG_EXTRA_ENV_SETTINGS \
146 "loaderversion=11\0" \
147 "card_id="__stringify(ASTRO_ID)"\0" \
148 "alterafile=0\0" \
149 "xilinxfile=0\0" \
150 "xilinxload=imxtract 0x540000 $xilinxfile 0x41000000&&"\
151 "fpga load 0 0x41000000 $filesize\0" \
152 "alteraload=imxtract 0x6c0000 $alterafile 0x41000000&&"\
153 "fpga load 1 0x41000000 $filesize\0" \
154 "env_default=1\0" \
155 "env_check=if test $env_default -eq 1;"\
156 " then setenv env_default 0;saveenv;fi\0"
157
158 /*
159 * "update" is a non-standard command that has to be supplied
160 * by external update.c; This is not included in mainline because
161 * it needs non-blocking CFI routines.
162 */
163 #ifdef CONFIG_MONITOR_IS_IN_RAM
164 #define CONFIG_BOOTCOMMAND "" /* no autoboot in this case */
165 #else
166 #if CONFIG_ASTRO_V532
167 #define CONFIG_BOOTCOMMAND "protect off 0x80000 0x1ffffff;run env_check;"\
168 "run xilinxload&&run alteraload&&bootm 0x80000;"\
169 "update;reset"
170 #else
171 #define CONFIG_BOOTCOMMAND "protect off 0x80000 0x1ffffff;run env_check;"\
172 "run xilinxload&&bootm 0x80000;update;reset"
173 #endif
174 #endif
175
176 /* default bootargs that are considered during boot */
177 #define CONFIG_BOOTARGS " console=ttyS2,115200 rootfstype=romfs"\
178 " loaderversion=$loaderversion"
179
180 /* default RAM address for user programs */
181 #define CONFIG_SYS_LOAD_ADDR 0x20000
182
183 #define CONFIG_SYS_LONGHELP
184
185 #if (CONFIG_COMMANDS & CONFIG_CMD_KGDB)
186 #define CONFIG_SYS_CBSIZE 1024
187 #else
188 #define CONFIG_SYS_CBSIZE 256
189 #endif
190 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16)
191 #define CONFIG_SYS_MAXARGS 16
192 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
193
194 #define CONFIG_FPGA_COUNT 1
195 #define CONFIG_FPGA
196 #define CONFIG_FPGA_XILINX
197 #define CONFIG_FPGA_SPARTAN3
198 #define CONFIG_FPGA_ALTERA
199 #define CONFIG_FPGA_CYCLON2
200 #define CONFIG_SYS_FPGA_PROG_FEEDBACK
201 #define CONFIG_SYS_FPGA_WAIT 1000
202
203 /* End of user parameters to be customized */
204
205 /* Defines memory range for test */
206
207 #define CONFIG_SYS_MEMTEST_START 0x40020000
208 #define CONFIG_SYS_MEMTEST_END 0x41ffffff
209
210 /*
211 * Low Level Configuration Settings
212 * (address mappings, register initial values, etc.)
213 * You should know what you are doing if you make changes here.
214 */
215
216 /* Base register address */
217
218 #define CONFIG_SYS_MBAR 0xFC000000 /* Register Base Addrs */
219
220 /* System Conf. Reg. & System Protection Reg. */
221
222 #define CONFIG_SYS_SCR 0x0003;
223 #define CONFIG_SYS_SPR 0xffff;
224
225 /*
226 * Definitions for initial stack pointer and data area (in internal SRAM)
227 */
228 #define CONFIG_SYS_INIT_RAM_ADDR 0x80000000
229 #define CONFIG_SYS_INIT_RAM_SIZE 0x8000
230 #define CONFIG_SYS_INIT_RAM_CTRL 0x221
231 #define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - \
232 GENERATED_GBL_DATA_SIZE)
233 #define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET
234
235 /*
236 * Start addresses for the final memory configuration
237 * (Set up by the startup code)
238 * for MCF5373, the allowable range is 0x40000000 to 0x7FF00000
239 */
240 #define CONFIG_SYS_SDRAM_BASE 0x40000000
241
242 /*
243 * Chipselect bank definitions
244 *
245 * CS0 - Flash 32MB (first 16MB)
246 * CS1 - Flash 32MB (second half)
247 * CS2 - FPGA
248 * CS3 - FPGA
249 * CS4 - unused
250 * CS5 - unused
251 */
252 #define CONFIG_SYS_CS0_BASE 0
253 #define CONFIG_SYS_CS0_MASK 0x00ff0001
254 #define CONFIG_SYS_CS0_CTRL 0x00001fc0
255
256 #define CONFIG_SYS_CS1_BASE 0x01000000
257 #define CONFIG_SYS_CS1_MASK 0x00ff0001
258 #define CONFIG_SYS_CS1_CTRL 0x00001fc0
259
260 #define CONFIG_SYS_CS2_BASE 0x20000000
261 #define CONFIG_SYS_CS2_MASK 0x00ff0001
262 #define CONFIG_SYS_CS2_CTRL 0x0000fec0
263
264 #define CONFIG_SYS_CS3_BASE 0x21000000
265 #define CONFIG_SYS_CS3_MASK 0x00ff0001
266 #define CONFIG_SYS_CS3_CTRL 0x0000fec0
267
268 #define CONFIG_SYS_FLASH_BASE 0x00000000
269
270 #ifdef CONFIG_MONITOR_IS_IN_RAM
271 #define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE
272 #else
273 /* This is mainly used during relocation in start.S */
274 #define CONFIG_SYS_MONITOR_BASE (CONFIG_SYS_FLASH_BASE + 0x400)
275 #endif
276 /* Reserve 256 kB for Monitor */
277 #define CONFIG_SYS_MONITOR_LEN (256 << 10)
278
279 #define CONFIG_SYS_BOOTPARAMS_LEN (64 * 1024)
280 /* Reserve 128 kB for malloc() */
281 #define CONFIG_SYS_MALLOC_LEN (128 << 10)
282
283 /*
284 * For booting Linux, the board info and command line data
285 * have to be in the first 8 MB of memory, since this is
286 * the maximum mapped by the Linux kernel during initialization ??
287 */
288 #define CONFIG_SYS_BOOTMAPSZ (CONFIG_SYS_SDRAM_BASE + \
289 (CONFIG_SYS_SDRAM_SIZE << 20))
290
291 /* FLASH organization */
292 #define CONFIG_SYS_MAX_FLASH_BANKS 1
293 #define CONFIG_SYS_MAX_FLASH_SECT 259
294 #define CONFIG_SYS_FLASH_ERASE_TOUT 1000
295
296 #define CONFIG_SYS_FLASH_CFI 1
297 #define CONFIG_FLASH_CFI_DRIVER 1
298 #define CONFIG_SYS_FLASH_SIZE 0x2000000
299 #define CONFIG_SYS_FLASH_PROTECTION 1
300 #define CONFIG_SYS_FLASH_USE_BUFFER_WRITE 1
301 #define CONFIG_SYS_FLASH_CFI_NONBLOCK 1
302
303 #define LDS_BOARD_TEXT \
304 . = DEFINED(env_offset) ? env_offset : .; \
305 common/env_embedded.o (.text*)
306
307 #if ENABLE_JFFS
308 /* JFFS Partition offset set */
309 #define CONFIG_SYS_JFFS2_FIRST_BANK 0
310 #define CONFIG_SYS_JFFS2_NUM_BANKS 1
311 /* 512k reserved for u-boot */
312 #define CONFIG_SYS_JFFS2_FIRST_SECTOR 0x40
313 #endif
314
315 /* Cache Configuration */
316 #define CONFIG_SYS_CACHELINE_SIZE 16
317
318 #define ICACHE_STATUS (CONFIG_SYS_INIT_RAM_ADDR + \
319 CONFIG_SYS_INIT_RAM_SIZE - 8)
320 #define DCACHE_STATUS (CONFIG_SYS_INIT_RAM_ADDR + \
321 CONFIG_SYS_INIT_RAM_SIZE - 4)
322 #define CONFIG_SYS_ICACHE_INV (CF_CACR_CINVA)
323 #define CONFIG_SYS_CACHE_ACR0 (CONFIG_SYS_SDRAM_BASE | \
324 CF_ADDRMASK(CONFIG_SYS_SDRAM_SIZE) | \
325 CF_ACR_EN | CF_ACR_SM_ALL)
326 #define CONFIG_SYS_CACHE_ICACR (CF_CACR_EC | CF_CACR_CINVA | \
327 CF_CACR_DCM_P)
328
329 #endif /* _CONFIG_ASTRO_MCF5373L_H */