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1 /*
2 * (C) Copyright 2007-2008
3 * Stelian Pop <stelian.pop@leadtechdesign.com>
4 * Lead Tech Design <www.leadtechdesign.com>
5 *
6 * Configuation settings for the AT91SAM9261EK board.
7 *
8 * See file CREDITS for list of people who contributed to this
9 * project.
10 *
11 * This program is free software; you can redistribute it and/or
12 * modify it under the terms of the GNU General Public License as
13 * published by the Free Software Foundation; either version 2 of
14 * the License, or (at your option) any later version.
15 *
16 * This program is distributed in the hope that it will be useful,
17 * but WITHOUT ANY WARRANTY; without even the implied warranty of
18 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
19 * GNU General Public License for more details.
20 *
21 * You should have received a copy of the GNU General Public License
22 * along with this program; if not, write to the Free Software
23 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
24 * MA 02111-1307 USA
25 */
26
27 #ifndef __CONFIG_H
28 #define __CONFIG_H
29
30 /* ARM asynchronous clock */
31 #define AT91_CPU_NAME "AT91SAM9261"
32 #define AT91_MAIN_CLOCK 18432000 /* 18.432 MHz crystal */
33 #define AT91_MASTER_CLOCK 100000000 /* peripheral */
34 #define AT91_CPU_CLOCK 200000000 /* cpu */
35 #define CONFIG_SYS_HZ 1000000 /* 1us resolution */
36
37 #define AT91_SLOW_CLOCK 32768 /* slow clock */
38
39 #define CONFIG_ARM926EJS 1 /* This is an ARM926EJS Core */
40 #define CONFIG_AT91SAM9261 1 /* It's an Atmel AT91SAM9261 SoC*/
41 #define CONFIG_AT91SAM9261EK 1 /* on an AT91SAM9261EK Board */
42 #undef CONFIG_USE_IRQ /* we don't need IRQ/FIQ stuff */
43
44 #define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */
45 #define CONFIG_SETUP_MEMORY_TAGS 1
46 #define CONFIG_INITRD_TAG 1
47
48 #define CONFIG_SKIP_LOWLEVEL_INIT
49 #define CONFIG_SKIP_RELOCATE_UBOOT
50
51 /*
52 * Hardware drivers
53 */
54 #define CONFIG_ATMEL_USART 1
55 #undef CONFIG_USART0
56 #undef CONFIG_USART1
57 #undef CONFIG_USART2
58 #define CONFIG_USART3 1 /* USART 3 is DBGU */
59
60 /* LCD */
61 #define CONFIG_LCD 1
62 #define LCD_BPP LCD_COLOR8
63 #define CONFIG_LCD_LOGO 1
64 #undef LCD_TEST_PATTERN
65 #define CONFIG_LCD_INFO 1
66 #define CONFIG_LCD_INFO_BELOW_LOGO 1
67 #define CONFIG_SYS_WHITE_ON_BLACK 1
68 #define CONFIG_ATMEL_LCD 1
69 #define CONFIG_ATMEL_LCD_BGR555 1
70 #define CONFIG_SYS_CONSOLE_IS_IN_ENV 1
71
72 /* LED */
73 #define CONFIG_AT91_LED
74 #define CONFIG_RED_LED AT91_PIN_PA23 /* this is the power led */
75 #define CONFIG_GREEN_LED AT91_PIN_PA13 /* this is the user1 led */
76 #define CONFIG_YELLOW_LED AT91_PIN_PA14 /* this is the user2 led */
77
78 #define CONFIG_BOOTDELAY 3
79
80 /*
81 * BOOTP options
82 */
83 #define CONFIG_BOOTP_BOOTFILESIZE 1
84 #define CONFIG_BOOTP_BOOTPATH 1
85 #define CONFIG_BOOTP_GATEWAY 1
86 #define CONFIG_BOOTP_HOSTNAME 1
87
88 /*
89 * Command line configuration.
90 */
91 #include <config_cmd_default.h>
92 #undef CONFIG_CMD_BDI
93 #undef CONFIG_CMD_FPGA
94 #undef CONFIG_CMD_IMI
95 #undef CONFIG_CMD_IMLS
96 #undef CONFIG_CMD_LOADS
97 #undef CONFIG_CMD_SOURCE
98
99 #define CONFIG_CMD_PING 1
100 #define CONFIG_CMD_DHCP 1
101 #define CONFIG_CMD_NAND 1
102 #define CONFIG_CMD_USB 1
103
104 /* SDRAM */
105 #define CONFIG_NR_DRAM_BANKS 1
106 #define PHYS_SDRAM 0x20000000
107 #define PHYS_SDRAM_SIZE 0x04000000 /* 64 megs */
108
109 /* DataFlash */
110 #define CONFIG_HAS_DATAFLASH 1
111 #define CONFIG_SYS_SPI_WRITE_TOUT (5*CONFIG_SYS_HZ)
112 #define CONFIG_SYS_MAX_DATAFLASH_BANKS 2
113 #define CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0 0xC0000000 /* CS0 */
114 #define CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS3 0xD0000000 /* CS3 */
115 #define AT91_SPI_CLK 15000000
116 #define DATAFLASH_TCSS (0x1a << 16)
117 #define DATAFLASH_TCHS (0x1 << 24)
118
119 /* NAND flash */
120 #ifdef CONFIG_CMD_NAND
121 #define CONFIG_NAND_ATMEL
122 #define CONFIG_SYS_MAX_NAND_DEVICE 1
123 #define CONFIG_SYS_NAND_BASE 0x40000000
124 #define CONFIG_SYS_NAND_DBW_8 1
125 /* our ALE is AD22 */
126 #define CONFIG_SYS_NAND_MASK_ALE (1 << 22)
127 /* our CLE is AD21 */
128 #define CONFIG_SYS_NAND_MASK_CLE (1 << 21)
129 #define CONFIG_SYS_NAND_ENABLE_PIN AT91_PIN_PC14
130 #define CONFIG_SYS_NAND_READY_PIN AT91_PIN_PC15
131 #endif
132
133 /* NOR flash - no real flash on this board */
134 #define CONFIG_SYS_NO_FLASH 1
135
136 /* Ethernet */
137 #define CONFIG_DRIVER_DM9000 1
138 #define CONFIG_DM9000_BASE 0x30000000
139 #define DM9000_IO CONFIG_DM9000_BASE
140 #define DM9000_DATA (CONFIG_DM9000_BASE + 4)
141 #define CONFIG_DM9000_USE_16BIT 1
142 #define CONFIG_NET_RETRY_COUNT 20
143 #define CONFIG_RESET_PHY_R 1
144
145 /* USB */
146 #define CONFIG_USB_OHCI_NEW 1
147 #define CONFIG_DOS_PARTITION 1
148 #define CONFIG_SYS_USB_OHCI_CPU_INIT 1
149 #define CONFIG_SYS_USB_OHCI_REGS_BASE 0x00500000 /* AT91SAM9261_UHP_BASE */
150 #define CONFIG_SYS_USB_OHCI_SLOT_NAME "at91sam9261"
151 #define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 2
152 #define CONFIG_USB_STORAGE 1
153 #define CONFIG_CMD_FAT 1
154
155 #define CONFIG_SYS_LOAD_ADDR 0x22000000 /* load address */
156
157 #define CONFIG_SYS_MEMTEST_START PHYS_SDRAM
158 #define CONFIG_SYS_MEMTEST_END 0x23e00000
159
160 #ifdef CONFIG_SYS_USE_DATAFLASH_CS0
161
162 /* bootstrap + u-boot + env + linux in dataflash on CS0 */
163 #define CONFIG_ENV_IS_IN_DATAFLASH 1
164 #define CONFIG_SYS_MONITOR_BASE (CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0 + 0x8400)
165 #define CONFIG_ENV_OFFSET 0x4200
166 #define CONFIG_ENV_ADDR (CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0 + CONFIG_ENV_OFFSET)
167 #define CONFIG_ENV_SIZE 0x4200
168 #define CONFIG_BOOTCOMMAND "cp.b 0xC0042000 0x22000000 0x210000; bootm"
169 #define CONFIG_BOOTARGS "console=ttyS0,115200 " \
170 "root=/dev/mtdblock0 " \
171 "mtdparts=at91_nand:-(root) " \
172 "rw rootfstype=jffs2"
173
174 #elif CONFIG_SYS_USE_DATAFLASH_CS3
175
176 /* bootstrap + u-boot + env + linux in dataflash on CS3 */
177 #define CONFIG_ENV_IS_IN_DATAFLASH 1
178 #define CONFIG_SYS_MONITOR_BASE (CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS3 + 0x8400)
179 #define CONFIG_ENV_OFFSET 0x4200
180 #define CONFIG_ENV_ADDR (CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS3 + CONFIG_ENV_OFFSET)
181 #define CONFIG_ENV_SIZE 0x4200
182 #define CONFIG_BOOTCOMMAND "cp.b 0xD0042000 0x22000000 0x210000; bootm"
183 #define CONFIG_BOOTARGS "console=ttyS0,115200 " \
184 "root=/dev/mtdblock0 " \
185 "mtdparts=at91_nand:-(root) " \
186 "rw rootfstype=jffs2"
187
188 #else /* CONFIG_SYS_USE_NANDFLASH */
189
190 /* bootstrap + u-boot + env + linux in nandflash */
191 #define CONFIG_ENV_IS_IN_NAND 1
192 #define CONFIG_ENV_OFFSET 0x60000
193 #define CONFIG_ENV_OFFSET_REDUND 0x80000
194 #define CONFIG_ENV_SIZE 0x20000 /* 1 sector = 128 kB */
195 #define CONFIG_BOOTCOMMAND "nand read 0x22000000 0xA0000 0x200000; bootm"
196 #define CONFIG_BOOTARGS "console=ttyS0,115200 " \
197 "root=/dev/mtdblock5 " \
198 "mtdparts=at91_nand:128k(bootstrap)ro," \
199 "256k(uboot)ro,128k(env1)ro," \
200 "128k(env2)ro,2M(linux),-(root) " \
201 "rw rootfstype=jffs2"
202
203 #endif
204
205 #define CONFIG_BAUDRATE 115200
206 #define CONFIG_SYS_BAUDRATE_TABLE {115200 , 19200, 38400, 57600, 9600 }
207
208 #define CONFIG_SYS_PROMPT "U-Boot> "
209 #define CONFIG_SYS_CBSIZE 256
210 #define CONFIG_SYS_MAXARGS 16
211 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
212 #define CONFIG_SYS_LONGHELP 1
213 #define CONFIG_CMDLINE_EDITING 1
214
215 #define ROUND(A, B) (((A) + (B)) & ~((B) - 1))
216 /*
217 * Size of malloc() pool
218 */
219 #define CONFIG_SYS_MALLOC_LEN ROUND(3 * CONFIG_ENV_SIZE + 128*1024, 0x1000)
220 #define CONFIG_SYS_GBL_DATA_SIZE 128 /* 128 bytes for initial data */
221
222 #define CONFIG_STACKSIZE (32*1024) /* regular stack */
223
224 #ifdef CONFIG_USE_IRQ
225 #error CONFIG_USE_IRQ not supported
226 #endif
227
228 #endif