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1 /*
2 * (C) Copyright 2005-2007
3 * Stefan Roese, DENX Software Engineering, sr@denx.de.
4 *
5 * See file CREDITS for list of people who contributed to this
6 * project.
7 *
8 * This program is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU General Public License as
10 * published by the Free Software Foundation; either version 2 of
11 * the License, or (at your option) any later version.
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
21 * MA 02111-1307 USA
22 */
23
24 /************************************************************************
25 * bamboo.h - configuration for BAMBOO board
26 ***********************************************************************/
27 #ifndef __CONFIG_H
28 #define __CONFIG_H
29
30 /*-----------------------------------------------------------------------
31 * High Level Configuration Options
32 *----------------------------------------------------------------------*/
33 #define CONFIG_BAMBOO 1 /* Board is BAMBOO */
34 #define CONFIG_440EP 1 /* Specific PPC440EP support */
35 #define CONFIG_4xx 1 /* ... PPC4xx family */
36 #define CONFIG_SYS_CLK_FREQ 33333333 /* external freq to pll */
37
38 #define CONFIG_BOARD_EARLY_INIT_F 1 /* Call board_early_init_f */
39
40 /*
41 * Please note that, if NAND support is enabled, the 2nd ethernet port
42 * can't be used because of pin multiplexing. So, if you want to use the
43 * 2nd ethernet port you have to "undef" the following define.
44 */
45 #define CONFIG_BAMBOO_NAND 1 /* enable nand flash support */
46
47 /*-----------------------------------------------------------------------
48 * Base addresses -- Note these are effective addresses where the
49 * actual resources get mapped (not physical addresses)
50 *----------------------------------------------------------------------*/
51 #define CFG_MONITOR_LEN (384 * 1024) /* Reserve 384 kB for Monitor */
52 #define CFG_MALLOC_LEN (256 * 1024) /* Reserve 256 kB for malloc() */
53 #define CFG_MONITOR_BASE (-CFG_MONITOR_LEN)
54 #define CFG_SDRAM_BASE 0x00000000 /* _must_ be 0 */
55 #define CFG_FLASH_BASE 0xfff00000 /* start of FLASH */
56 #define CFG_PCI_MEMBASE 0xa0000000 /* mapped pci memory*/
57 #define CFG_PCI_MEMBASE1 CFG_PCI_MEMBASE + 0x10000000
58 #define CFG_PCI_MEMBASE2 CFG_PCI_MEMBASE1 + 0x10000000
59 #define CFG_PCI_MEMBASE3 CFG_PCI_MEMBASE2 + 0x10000000
60
61 /*Don't change either of these*/
62 #define CFG_PERIPHERAL_BASE 0xef600000 /* internal peripherals*/
63 #define CFG_PCI_BASE 0xe0000000 /* internal PCI regs*/
64 /*Don't change either of these*/
65
66 #define CFG_USB_DEVICE 0x50000000
67 #define CFG_NVRAM_BASE_ADDR 0x80000000
68 #define CFG_BOOT_BASE_ADDR 0xf0000000
69 #define CFG_NAND_ADDR 0x90000000
70 #define CFG_NAND2_ADDR 0x94000000
71
72 /*-----------------------------------------------------------------------
73 * Initial RAM & stack pointer (placed in SDRAM)
74 *----------------------------------------------------------------------*/
75 #define CFG_INIT_RAM_DCACHE 1 /* d-cache as init ram */
76 #define CFG_INIT_RAM_ADDR 0x70000000 /* DCache */
77 #define CFG_INIT_RAM_END (4 << 10)
78 #define CFG_GBL_DATA_SIZE 256 /* num bytes initial data */
79 #define CFG_GBL_DATA_OFFSET (CFG_INIT_RAM_END - CFG_GBL_DATA_SIZE)
80 #define CFG_INIT_SP_OFFSET CFG_GBL_DATA_OFFSET
81
82 /*-----------------------------------------------------------------------
83 * Serial Port
84 *----------------------------------------------------------------------*/
85 #define CFG_EXT_SERIAL_CLOCK 11059200 /* use external 11.059MHz clk */
86 #define CONFIG_BAUDRATE 115200
87 #define CONFIG_SERIAL_MULTI 1
88 /* define this if you want console on UART1 */
89 #undef CONFIG_UART1_CONSOLE
90
91 #define CFG_BAUDRATE_TABLE \
92 {300, 600, 1200, 2400, 4800, 9600, 19200, 38400, 57600, 115200}
93
94 /*-----------------------------------------------------------------------
95 * NVRAM/RTC
96 *
97 * NOTE: The RTC registers are located at 0x7FFF0 - 0x7FFFF
98 * The DS1558 code assumes this condition
99 *
100 *----------------------------------------------------------------------*/
101 #define CFG_NVRAM_SIZE (0x2000 - 0x10) /* NVRAM size(8k)- RTC regs */
102 #define CONFIG_RTC_DS1556 1 /* DS1556 RTC */
103
104 /*-----------------------------------------------------------------------
105 * Environment
106 *----------------------------------------------------------------------*/
107 /*
108 * Define here the location of the environment variables (FLASH or EEPROM).
109 * Note: DENX encourages to use redundant environment in FLASH.
110 */
111 #if 1
112 #define CFG_ENV_IS_IN_FLASH 1 /* use FLASH for environment vars */
113 #else
114 #define CFG_ENV_IS_IN_EEPROM 1 /* use EEPROM for environment vars */
115 #endif
116
117 /*-----------------------------------------------------------------------
118 * FLASH related
119 *----------------------------------------------------------------------*/
120 #define CFG_MAX_FLASH_BANKS 3 /* number of banks */
121 #define CFG_MAX_FLASH_SECT 256 /* sectors per device */
122
123 #undef CFG_FLASH_CHECKSUM
124 #define CFG_FLASH_ERASE_TOUT 120000 /* Timeout for Flash Erase (in ms) */
125 #define CFG_FLASH_WRITE_TOUT 500 /* Timeout for Flash Write (in ms) */
126
127 #define CFG_FLASH_ADDR0 0x555
128 #define CFG_FLASH_ADDR1 0x2aa
129 #define CFG_FLASH_WORD_SIZE unsigned char
130
131 #define CFG_FLASH_2ND_16BIT_DEV 1 /* bamboo has 8 and 16bit device */
132 #define CFG_FLASH_2ND_ADDR 0x87800000 /* bamboo has 8 and 16bit device */
133
134 #ifdef CFG_ENV_IS_IN_FLASH
135 #define CFG_ENV_SECT_SIZE 0x10000 /* size of one complete sector */
136 #define CFG_ENV_ADDR (CFG_MONITOR_BASE-CFG_ENV_SECT_SIZE)
137 #define CFG_ENV_SIZE 0x2000 /* Total Size of Environment Sector */
138
139 /* Address and size of Redundant Environment Sector */
140 #define CFG_ENV_ADDR_REDUND (CFG_ENV_ADDR-CFG_ENV_SECT_SIZE)
141 #define CFG_ENV_SIZE_REDUND (CFG_ENV_SIZE)
142 #endif /* CFG_ENV_IS_IN_FLASH */
143
144 /*-----------------------------------------------------------------------
145 * NAND FLASH
146 *----------------------------------------------------------------------*/
147 #define CFG_MAX_NAND_DEVICE 1
148 #define NAND_MAX_CHIPS 1
149 #define CFG_NAND_CS 1
150 #define CFG_NAND_BASE (CFG_NAND_ADDR + CFG_NAND_CS)
151 #define CFG_NAND_SELECT_DEVICE 1 /* nand driver supports mutipl. chips */
152
153 /*-----------------------------------------------------------------------
154 * DDR SDRAM
155 *----------------------------------------------------------------------------- */
156 #define CONFIG_SPD_EEPROM /* Use SPD EEPROM for setup */
157 #undef CONFIG_DDR_ECC /* don't use ECC */
158 #define CFG_SIMULATE_SPD_EEPROM 0xff /* simulate spd eeprom on this address */
159 #define SPD_EEPROM_ADDRESS {CFG_SIMULATE_SPD_EEPROM, 0x50, 0x51}
160
161 /*-----------------------------------------------------------------------
162 * I2C
163 *----------------------------------------------------------------------*/
164 #define CONFIG_HARD_I2C 1 /* I2C with hardware support */
165 #undef CONFIG_SOFT_I2C /* I2C bit-banged */
166 #define CFG_I2C_SPEED 400000 /* I2C speed and slave address */
167 #define CFG_I2C_SLAVE 0x7F
168
169 #define CFG_I2C_MULTI_EEPROMS
170 #define CFG_I2C_EEPROM_ADDR (0xa8>>1)
171 #define CFG_I2C_EEPROM_ADDR_LEN 1
172 #define CFG_EEPROM_PAGE_WRITE_ENABLE
173 #define CFG_EEPROM_PAGE_WRITE_BITS 3
174 #define CFG_EEPROM_PAGE_WRITE_DELAY_MS 10
175
176 #ifdef CFG_ENV_IS_IN_EEPROM
177 #define CFG_ENV_SIZE 0x200 /* Size of Environment vars */
178 #define CFG_ENV_OFFSET 0x0
179 #endif /* CFG_ENV_IS_IN_EEPROM */
180
181 #define CONFIG_PREBOOT "echo;" \
182 "echo Type \"run flash_nfs\" to mount root filesystem over NFS;" \
183 "echo"
184
185 #undef CONFIG_BOOTARGS
186
187 #define CONFIG_EXTRA_ENV_SETTINGS \
188 "netdev=eth0\0" \
189 "hostname=bamboo\0" \
190 "nfsargs=setenv bootargs root=/dev/nfs rw " \
191 "nfsroot=${serverip}:${rootpath}\0" \
192 "ramargs=setenv bootargs root=/dev/ram rw\0" \
193 "addip=setenv bootargs ${bootargs} " \
194 "ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}" \
195 ":${hostname}:${netdev}:off panic=1\0" \
196 "addtty=setenv bootargs ${bootargs} console=ttyS0,${baudrate}\0"\
197 "flash_nfs=run nfsargs addip addtty;" \
198 "bootm ${kernel_addr}\0" \
199 "flash_self=run ramargs addip addtty;" \
200 "bootm ${kernel_addr} ${ramdisk_addr}\0" \
201 "net_nfs=tftp 200000 ${bootfile};run nfsargs addip addtty;" \
202 "bootm\0" \
203 "rootpath=/opt/eldk/ppc_4xx\0" \
204 "bootfile=/tftpboot/bamboo/uImage\0" \
205 "kernel_addr=fff00000\0" \
206 "ramdisk_addr=fff10000\0" \
207 "initrd_high=30000000\0" \
208 "load=tftp 100000 /tftpboot/bamboo/u-boot.bin\0" \
209 "update=protect off fffa0000 ffffffff;era fffa0000 ffffffff;" \
210 "cp.b 100000 fffa0000 60000;" \
211 "setenv filesize;saveenv\0" \
212 "upd=run load;run update\0" \
213 ""
214 #define CONFIG_BOOTCOMMAND "run flash_self"
215
216 #if 0
217 #define CONFIG_BOOTDELAY -1 /* autoboot disabled */
218 #else
219 #define CONFIG_BOOTDELAY 5 /* autoboot after 5 seconds */
220 #endif
221
222 #define CONFIG_BAUDRATE 115200
223
224 #define CONFIG_LOADS_ECHO 1 /* echo on for serial download */
225 #define CFG_LOADS_BAUD_CHANGE 1 /* allow baudrate change */
226
227 #define CONFIG_MII 1 /* MII PHY management */
228 #define CONFIG_PHY_ADDR 0 /* PHY address, See schematics */
229 #define CONFIG_PHY1_ADDR 1
230
231 #ifndef CONFIG_BAMBOO_NAND
232 #define CONFIG_HAS_ETH1 1 /* add support for "eth1addr" */
233 #endif /* CONFIG_BAMBOO_NAND */
234
235 #define CFG_RX_ETH_BUFFER 32 /* Number of ethernet rx buffers & descriptors */
236
237 #define CONFIG_NETCONSOLE /* include NetConsole support */
238 #define CONFIG_NET_MULTI 1 /* required for netconsole */
239
240 /* Partitions */
241 #define CONFIG_MAC_PARTITION
242 #define CONFIG_DOS_PARTITION
243 #define CONFIG_ISO_PARTITION
244
245 #ifdef CONFIG_440EP
246 /* USB */
247 #define CONFIG_USB_OHCI
248 #define CONFIG_USB_STORAGE
249
250 /*Comment this out to enable USB 1.1 device*/
251 #define USB_2_0_DEVICE
252 #endif /*CONFIG_440EP*/
253
254 #ifdef CONFIG_BAMBOO_NAND
255 #define _CFG_CMD_NAND CFG_CMD_NAND
256 #else
257 #define _CFG_CMD_NAND 0
258 #endif /* CONFIG_BAMBOO_NAND */
259
260 #define CONFIG_COMMANDS (CONFIG_CMD_DFL | \
261 CFG_CMD_ASKENV | \
262 CFG_CMD_DATE | \
263 CFG_CMD_DHCP | \
264 CFG_CMD_DIAG | \
265 CFG_CMD_ELF | \
266 CFG_CMD_EEPROM | \
267 CFG_CMD_I2C | \
268 CFG_CMD_IRQ | \
269 CFG_CMD_MII | \
270 CFG_CMD_NET | \
271 CFG_CMD_NFS | \
272 CFG_CMD_PCI | \
273 CFG_CMD_PING | \
274 CFG_CMD_REGINFO | \
275 CFG_CMD_SDRAM | \
276 CFG_CMD_USB | \
277 CFG_CMD_FAT | \
278 CFG_CMD_EXT2 | \
279 _CFG_CMD_NAND | \
280 CFG_CMD_SNTP )
281
282 #define CONFIG_SUPPORT_VFAT
283
284 /* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */
285 #include <cmd_confdefs.h>
286
287 /*
288 * Miscellaneous configurable options
289 */
290 #define CFG_LONGHELP /* undef to save memory */
291 #define CFG_PROMPT "=> " /* Monitor Command Prompt */
292 #if (CONFIG_COMMANDS & CFG_CMD_KGDB)
293 #define CFG_CBSIZE 1024 /* Console I/O Buffer Size */
294 #else
295 #define CFG_CBSIZE 256 /* Console I/O Buffer Size */
296 #endif
297 #define CFG_PBSIZE (CFG_CBSIZE+sizeof(CFG_PROMPT)+16) /* Print Buffer Size */
298 #define CFG_MAXARGS 16 /* max number of command args */
299 #define CFG_BARGSIZE CFG_CBSIZE /* Boot Argument Buffer Size */
300
301 #define CFG_MEMTEST_START 0x0400000 /* memtest works on */
302 #define CFG_MEMTEST_END 0x0C00000 /* 4 ... 12 MB in DRAM */
303
304 #define CFG_LOAD_ADDR 0x100000 /* default load address */
305 #define CFG_EXTBDINFO 1 /* To use extended board_into (bd_t) */
306 #define CONFIG_LYNXKDI 1 /* support kdi files */
307
308 #define CFG_HZ 1000 /* decrementer freq: 1 ms ticks */
309
310 #define CONFIG_CMDLINE_EDITING 1 /* add command line history */
311 #define CONFIG_LOOPW 1 /* enable loopw command */
312 #define CONFIG_MX_CYCLIC 1 /* enable mdc/mwc commands */
313 #define CONFIG_ZERO_BOOTDELAY_CHECK /* check for keypress on bootdelay==0 */
314 #define CONFIG_VERSION_VARIABLE 1 /* include version env variable */
315
316 /*-----------------------------------------------------------------------
317 * PCI stuff
318 *-----------------------------------------------------------------------
319 */
320 /* General PCI */
321 #define CONFIG_PCI /* include pci support */
322 #undef CONFIG_PCI_PNP /* do (not) pci plug-and-play */
323 #define CONFIG_PCI_SCAN_SHOW /* show pci devices on startup */
324 #define CFG_PCI_TARGBASE 0x80000000 /* PCIaddr mapped to CFG_PCI_MEMBASE*/
325
326 /* Board-specific PCI */
327 #define CFG_PCI_PRE_INIT /* enable board pci_pre_init() */
328 #define CFG_PCI_TARGET_INIT
329 #define CFG_PCI_MASTER_INIT
330
331 #define CFG_PCI_SUBSYS_VENDORID 0x10e8 /* AMCC */
332 #define CFG_PCI_SUBSYS_ID 0xcafe /* Whatever */
333
334 /*
335 * For booting Linux, the board info and command line data
336 * have to be in the first 8 MB of memory, since this is
337 * the maximum mapped by the Linux kernel during initialization.
338 */
339 #define CFG_BOOTMAPSZ (8 << 20) /* Initial Memory map for Linux */
340
341 /*-----------------------------------------------------------------------
342 * Cache Configuration
343 */
344 #define CFG_DCACHE_SIZE (32<<10) /* For AMCC 440 CPUs */
345 #define CFG_CACHELINE_SIZE 32 /* ... */
346 #if (CONFIG_COMMANDS & CFG_CMD_KGDB)
347 #define CFG_CACHELINE_SHIFT 5 /* log base 2 of the above value */
348 #endif
349
350 /*
351 * Internal Definitions
352 *
353 * Boot Flags
354 */
355 #define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */
356 #define BOOTFLAG_WARM 0x02 /* Software reboot */
357
358 #if (CONFIG_COMMANDS & CFG_CMD_KGDB)
359 #define CONFIG_KGDB_BAUDRATE 230400 /* speed to run kgdb serial port */
360 #define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */
361 #endif
362 #endif /* __CONFIG_H */