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Blackfin: convert BFIN_CPU to CONFIG_BFIN_CPU
[people/ms/u-boot.git] / include / configs / bf561-ezkit.h
1 /*
2 * U-boot - Configuration file for BF561 EZKIT board
3 */
4
5 #ifndef __CONFIG_EZKIT561_H__
6 #define __CONFIG_EZKIT561_H__
7
8 #include <asm/blackfin-config-pre.h>
9
10 #define CONFIG_VDSP 1
11 #define CONFIG_BF561 1
12
13 #define CFG_LONGHELP 1
14 #define CONFIG_CMDLINE_EDITING 1
15 #define CONFIG_BAUDRATE 57600
16 /* Set default serial console for bf537 */
17 #define CONFIG_UART_CONSOLE 0
18 #define CONFIG_EZKIT561 1
19 #define CONFIG_BOOTDELAY 5
20
21 #define CONFIG_PANIC_HANG 1
22
23 #define CONFIG_BFIN_CPU bf561-0.3
24
25 /*
26 * Boot Mode Set
27 * Blackfin can support several boot modes
28 */
29 #define BF561_BYPASS_BOOT 0x21
30 #define BF561_PARA_BOOT 0x22
31 #define BF561_SPI_BOOT 0x24
32 /* Define the boot mode */
33 #define BFIN_BOOT_MODE BF561_BYPASS_BOOT
34
35 /* This sets the default state of the cache on U-Boot's boot */
36 #define CONFIG_ICACHE_ON
37 #define CONFIG_DCACHE_ON
38
39 /* Define where the uboot will be loaded by on-chip boot rom */
40 #define APP_ENTRY 0x00001000
41
42 /*
43 * Stringize definitions - needed for environmental settings
44 */
45 #define STRINGIZE2(x) #x
46 #define STRINGIZE(x) STRINGIZE2(x)
47
48 /*
49 * Board settings
50 */
51 #define CONFIG_DRIVER_SMC91111 1
52 #define CONFIG_SMC91111_BASE 0x2C010300
53 #define CONFIG_ASYNC_EBIU_BASE CONFIG_SMC91111_BASE & ~(4*1024*1024)
54 #define CONFIG_SMC_USE_32_BIT 1
55 #define CONFIG_MISC_INIT_R 1
56
57 /*
58 * Clock settings
59 */
60
61 /* CONFIG_CLKIN_HZ is any value in Hz */
62 #define CONFIG_CLKIN_HZ 30000000
63 /* CONFIG_CLKIN_HALF controls what is passed to PLL 0=CLKIN */
64 /* 1=CLKIN/2 */
65 #define CONFIG_CLKIN_HALF 0
66 /* CONFIG_PLL_BYPASS controls if the PLL is used 0=don't bypass */
67 /* 1=bypass PLL */
68 #define CONFIG_PLL_BYPASS 0
69 /* CONFIG_VCO_MULT controls what the multiplier of the PLL is */
70 /* Values can range from 1-64 */
71 #define CONFIG_VCO_MULT 20
72 /* CONFIG_CCLK_DIV controls what the core clock divider is */
73 /* Values can be 1, 2, 4, or 8 ONLY */
74 #define CONFIG_CCLK_DIV 1
75 /* CONFIG_SCLK_DIV controls what the peripheral clock divider is */
76 /* Values can range from 1-15 */
77 #define CONFIG_SCLK_DIV 5
78 /* CONFIG_SPI_BAUD controls the SPI peripheral clock divider */
79 /* Values can range from 2-65535 */
80 /* SCK Frequency = SCLK / (2 * CONFIG_SPI_BAUD) */
81 #define CONFIG_SPI_BAUD 2
82 #define CONFIG_SPI_BAUD_INITBLOCK 4
83
84 /*
85 * Network settings
86 */
87 #if (CONFIG_DRIVER_SMC91111)
88 #define CONFIG_IPADDR 192.168.0.15
89 #define CONFIG_NETMASK 255.255.255.0
90 #define CONFIG_GATEWAYIP 192.168.0.1
91 #define CONFIG_SERVERIP 192.168.0.2
92 #define CONFIG_HOSTNAME ezkit561
93 #define CONFIG_ROOTPATH /arm-cross-build/BF561/uClinux-dist/romfs
94 #endif /* CONFIG_DRIVER_SMC91111 */
95
96 /*
97 * Flash settings
98 */
99
100 #define CFG_FLASH_CFI /* The flash is CFI compatible */
101 #define CFG_FLASH_CFI_DRIVER /* Use common CFI driver */
102 #define CFG_FLASH_CFI_AMD_RESET
103 #define CFG_ENV_IS_IN_FLASH 1
104 #define CFG_FLASH_BASE 0x20000000
105 #define CFG_MAX_FLASH_BANKS 1 /* max number of memory banks */
106 #define CFG_MAX_FLASH_SECT 135 /* max number of sectors on one chip */
107 #define CFG_ENV_ADDR 0x20020000
108 #define CFG_ENV_SECT_SIZE 0x10000 /* Total Size of Environment Sector */
109 /* JFFS Partition offset set */
110 #define CFG_JFFS2_FIRST_BANK 0
111 #define CFG_JFFS2_NUM_BANKS 1
112 /* 512k reserved for u-boot */
113 #define CFG_JFFS2_FIRST_SECTOR 8
114
115 /*
116 * SDRAM settings & memory map
117 */
118
119 #define CONFIG_MEM_SIZE 64 /* 128, 64, 32, 16 */
120 #define CONFIG_MEM_ADD_WDTH 9 /* 8, 9, 10, 11 */
121 #define CONFIG_MEM_MT48LC16M16A2TG_75 1
122
123 #define CFG_SDRAM_BASE 0x00000000
124 #define CFG_MAX_RAM_SIZE (CONFIG_MEM_SIZE * 1024 * 1024)
125
126 #define CFG_MEMTEST_START 0x0 /* memtest works on */
127 #define CFG_MEMTEST_END ( (CONFIG_MEM_SIZE - 1) * 1024*1024) /* 1 ... 63 MB in DRAM */
128
129 #define CONFIG_LOADADDR 0x01000000 /* default load address */
130 #define CFG_LOAD_ADDR CONFIG_LOADADDR
131 #define CFG_MONITOR_LEN (256 << 10) /* Reserve 256 kB for Monitor */
132 #define CFG_MONITOR_BASE (CFG_MAX_RAM_SIZE - CFG_MONITOR_LEN)
133
134 #define CFG_MALLOC_LEN (128 << 10) /* Reserve 128 kB for malloc() */
135 #define CFG_MALLOC_BASE (CFG_MONITOR_BASE - CFG_MALLOC_LEN)
136
137 #define CFG_GBL_DATA_SIZE 0x4000
138 #define CFG_GBL_DATA_ADDR (CFG_MALLOC_BASE - CFG_GBL_DATA_SIZE)
139 #define CONFIG_STACKBASE (CFG_GBL_DATA_ADDR - 4)
140 #define CONFIG_STACKSIZE (128*1024) /* regular stack */
141
142 #if ( CONFIG_CLKIN_HALF == 0 )
143 #define CONFIG_VCO_HZ ( CONFIG_CLKIN_HZ * CONFIG_VCO_MULT )
144 #else
145 #define CONFIG_VCO_HZ (( CONFIG_CLKIN_HZ * CONFIG_VCO_MULT ) / 2 )
146 #endif
147
148 #if (CONFIG_PLL_BYPASS == 0)
149 #define CONFIG_CCLK_HZ ( CONFIG_VCO_HZ / CONFIG_CCLK_DIV )
150 #define CONFIG_SCLK_HZ ( CONFIG_VCO_HZ / CONFIG_SCLK_DIV )
151 #else
152 #define CONFIG_CCLK_HZ CONFIG_CLKIN_HZ
153 #define CONFIG_SCLK_HZ CONFIG_CLKIN_HZ
154 #endif
155
156 /*
157 * Command settings
158 */
159
160 #define CFG_AUTOLOAD "no" /* rarpb, bootp, dhcp commands will */
161 /* only perform a configuration */
162 /* lookup from the BOOTP/DHCP server */
163 /* but not try to load any image */
164 /* using TFTP */
165 #define CONFIG_BOOT_RETRY_TIME -1 /* Enable this if bootretry required, */
166 /* currently its disabled */
167 #define CONFIG_BOOTCOMMAND "run ramboot"
168 #define CONFIG_BOOTARGS "root=/dev/mtdblock0 rw console=ttyBF0,57600"
169
170 #if (CONFIG_DRIVER_SMC91111)
171 #define CONFIG_EXTRA_ENV_SETTINGS \
172 "ramargs=setenv bootargs root=/dev/mtdblock0 rw console=ttyBF0,57600\0" \
173 "nfsargs=setenv bootargs root=/dev/nfs rw nfsroot=$(serverip):" \
174 "$(rootpath) console=ttyBF0,57600\0" \
175 "addip=setenv bootargs $(bootargs) ip=$(ipaddr):$(serverip):" \
176 "$(gatewayip):$(netmask):$(hostname):eth0:off\0" \
177 "ramboot=tftpboot $(loadaddr) linux; " \
178 "run ramargs; run addip; bootelf\0" \
179 "nfsboot=tftpboot $(loadaddr) linux; " \
180 "run nfsargs; run addip; bootelf\0" \
181 "update=tftpboot $(loadaddr) u-boot.bin; " \
182 "protect off 0x20000000 0x2003FFFF; " \
183 "erase 0x20000000 0x2003FFFF; " \
184 "cp.b $(loadaddr) 0x20000000 $(filesize)\0" \
185 ""
186 #else
187 #define CONFIG_EXTRA_ENV_SETTINGS \
188 "ramargs=setenv bootargs root=/dev/mtdblock0 rw console=ttyBF0,57600\0" \
189 "flashboot=bootm 0x20100000\0" \
190 ""
191 #endif
192
193
194 /*
195 * BOOTP options
196 */
197 #define CONFIG_BOOTP_BOOTFILESIZE
198 #define CONFIG_BOOTP_BOOTPATH
199 #define CONFIG_BOOTP_GATEWAY
200 #define CONFIG_BOOTP_HOSTNAME
201
202
203 /*
204 * Command line configuration.
205 */
206 #include <config_cmd_default.h>
207
208 #define CONFIG_CMD_ELF
209 #define CONFIG_CMD_CACHE
210 #define CONFIG_CMD_JFFS2
211
212 #if defined(CONFIG_DRIVER_SMC91111)
213 #define CONFIG_CMD_PING
214 #define CONFIG_CMD_DHCP
215 #endif
216
217
218 /*
219 * Console settings
220 */
221 #define CFG_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 }
222
223 #define CFG_PROMPT "bfin> " /* Monitor Command Prompt */
224
225 #if defined(CONFIG_CMD_KGDB)
226 #define CFG_CBSIZE 1024 /* Console I/O Buffer Size */
227 #else
228 #define CFG_CBSIZE 256 /* Console I/O Buffer Size */
229 #endif
230 #define CFG_PBSIZE (CFG_CBSIZE+sizeof(CFG_PROMPT)+16) /* Print Buffer Size */
231 #define CFG_MAXARGS 16 /* max number of command args */
232 #define CFG_BARGSIZE CFG_CBSIZE /* Boot Argument Buffer Size */
233
234 #define CONFIG_LOADS_ECHO 1
235
236 /*
237 * Miscellaneous configurable options
238 */
239 #define CFG_HZ 1000 /* decrementer freq: 10 ms ticks */
240 #define CFG_BOOTM_LEN 0x4000000 /* Large Image Length, set to 64 Meg */
241
242 /*
243 * FLASH organization and environment definitions
244 */
245 #define CFG_BOOTMAPSZ (8 << 20) /* Initial Memory map for Linux */
246
247 #define AMGCTLVAL 0x3F
248 #define AMBCTL0VAL 0x7BB07BB0
249 #define AMBCTL1VAL 0xFFC27BB0
250
251 #ifdef CONFIG_VDSP
252 #define ET_EXEC_VDSP 0x8
253 #define SHT_STRTAB_VDSP 0x1
254 #define ELFSHDRSIZE_VDSP 0x2C
255 #define VDSP_ENTRY_ADDR 0xFFA00000
256 #endif
257
258 #endif /* __CONFIG_EZKIT561_H__ */