include/configs/cm-bf527.h

   1 /*
   2  * U-boot - Configuration file for CM-BF527 board
   3  */
   4
   5 #ifndef __CONFIG_CM_BF527_H__
   6 #define __CONFIG_CM_BF527_H__
   7
   8 #include <asm/config-pre.h>
   9
  10
  11 /*
  12  * Processor Settings
  13  */
  14 #define CONFIG_BFIN_BOOT_MODE       BFIN_BOOT_PARA
  15
  16
  17 /*
  18  * Clock Settings
  19  *      CCLK = (CLKIN * VCO_MULT) / CCLK_DIV
  20  *      SCLK = (CLKIN * VCO_MULT) / SCLK_DIV
  21  */
  22 /* CONFIG_CLKIN_HZ is any value in Hz                                   */
  23 #define CONFIG_CLKIN_HZ                 25000000
  24 /* CLKIN_HALF controls the DF bit in PLL_CTL      0 = CLKIN             */
  25 /*                                                1 = CLKIN / 2         */
  26 #define CONFIG_CLKIN_HALF               0
  27 /* PLL_BYPASS controls the BYPASS bit in PLL_CTL  0 = do not bypass     */
  28 /*                                                1 = bypass PLL        */
  29 #define CONFIG_PLL_BYPASS               0
  30 /* VCO_MULT controls the MSEL (multiplier) bits in PLL_CTL              */
  31 /* Values can range from 0-63 (where 0 means 64)                        */
  32 #define CONFIG_VCO_MULT                 21
  33 /* CCLK_DIV controls the core clock divider                             */
  34 /* Values can be 1, 2, 4, or 8 ONLY                                     */
  35 #define CONFIG_CCLK_DIV                 1
  36 /* SCLK_DIV controls the system clock divider                           */
  37 /* Values can range from 1-15                                           */
  38 #define CONFIG_SCLK_DIV                 4
  39
  40 /* Decrease core voltage */
  41 #define CONFIG_VR_CTL_VAL (VLEV_120 | CLKBUFOE | FREQ_1000)
  42
  43
  44 /*
  45  * Memory Settings
  46  */
  47 #define CONFIG_MEM_ADD_WDTH     9
  48 #define CONFIG_MEM_SIZE         32
  49
  50 #define CONFIG_EBIU_SDRRC_VAL   0x3f8
  51 #define CONFIG_EBIU_SDGCTL_VAL  0x9111cd
  52
  53 #define CONFIG_EBIU_AMGCTL_VAL  (AMBEN_ALL)
  54 #define CONFIG_EBIU_AMBCTL0_VAL (B1WAT_7 | B1RAT_11 | B1HT_2 | B1ST_3 | B0WAT_7 | B0RAT_11 | B0HT_2 | B0ST_3)
  55 #define CONFIG_EBIU_AMBCTL1_VAL (B3WAT_7 | B3RAT_11 | B3HT_2 | B3ST_3 | B2WAT_7 | B2RAT_11 | B2HT_2 | B2ST_3)
  56
  57 #define CONFIG_SYS_MONITOR_LEN  (256 * 1024)
  58 #define CONFIG_SYS_MALLOC_LEN   (128 * 1024)
  59
  60
  61 /*
  62  * NAND Settings
  63  * (can't be used sametime as ethernet)
  64  */
  65 /* #define CONFIG_BFIN_NFC */
  66 #ifdef CONFIG_BFIN_NFC
  67 #define CONFIG_BFIN_NFC_CTL_VAL 0x0033
  68 #define CONFIG_SYS_NAND_BASE            0 /* not actually used */
  69 #define CONFIG_SYS_MAX_NAND_DEVICE      1
  70 #define NAND_MAX_CHIPS          1
  71 #define CONFIG_CMD_NAND
  72 #endif
  73
  74
  75 /*
  76  * Network Settings
  77  */
  78 #if !defined(__ADSPBF522__) && !defined(__ADSPBF523__) && \
  79     !defined(__ADSPBF524__) && !defined(__ADSPBF525__) && !defined(CONFIG_BFIN_NFC)
  80 #define ADI_CMDS_NETWORK        1
  81 #define CONFIG_BFIN_MAC
  82 #define CONFIG_RMII
  83 #define CONFIG_NETCONSOLE       1
  84 #define CONFIG_NET_MULTI        1
  85 #endif
  86 #define CONFIG_HOSTNAME         cm-bf527
  87 /* Uncomment next line to use fixed MAC address */
  88 /* #define CONFIG_ETHADDR       02:80:ad:20:31:e8 */
  89
  90
  91 /*
  92  * Flash Settings
  93  */
  94 #define CONFIG_FLASH_CFI_DRIVER
  95 #define CONFIG_CFI_FLASH_USE_WEAK_ACCESSORS
  96 #define CONFIG_SYS_FLASH_BASE           0x20000000
  97 #define CONFIG_SYS_FLASH_CFI
  98 #define CONFIG_SYS_FLASH_PROTECTION
  99 #define CONFIG_SYS_MAX_FLASH_BANKS      1
 100 #define CONFIG_SYS_MAX_FLASH_SECT       67
 101
 102
 103 /*
 104  * Env Storage Settings
 105  */
 106 #define CONFIG_ENV_IS_IN_FLASH  1
 107 #define CONFIG_ENV_ADDR         0x20008000
 108 #define CONFIG_ENV_OFFSET       0x8000
 109 #define CONFIG_ENV_SIZE         0x8000
 110 #define CONFIG_ENV_SECT_SIZE    0x8000
 111 #define CONFIG_ENV_IS_EMBEDDED_IN_LDR
 112
 113
 114 /*
 115  * I2C Settings
 116  */
 117 #define CONFIG_BFIN_TWI_I2C     1
 118 #define CONFIG_HARD_I2C         1
 119
 120
 121 /*
 122  * Misc Settings
 123  */
 124 #define CONFIG_BAUDRATE         115200
 125 #define CONFIG_MISC_INIT_R
 126 #define CONFIG_RTC_BFIN
 127 #define CONFIG_UART_CONSOLE     0
 128 #define CONFIG_BOOTCOMMAND      "run flashboot"
 129 #define FLASHBOOT_ENV_SETTINGS \
 130         "flashboot=flread 20040000 1000000 300000;" \
 131         "bootm 0x1000000\0"
 132
 133
 134 /*
 135  * Pull in common ADI header for remaining command/environment setup
 136  */
 137 #include <configs/bfin_adi_common.h>
 138
 139 #endif