]>
git.ipfire.org Git - people/ms/u-boot.git/blob - include/configs/cm5200.h
2 * (C) Copyright 2003-2007
3 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
5 * See file CREDITS for list of people who contributed to this
8 * This program is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU General Public License as
10 * published by the Free Software Foundation; either version 2 of
11 * the License, or (at your option) any later version.
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
28 * High Level Configuration Options
30 #define CONFIG_MPC5xxx 1 /* This is an MPC5xxx CPU */
31 #define CONFIG_MPC5200 1 /* (more precisely an MPC5200 CPU) */
32 #define CONFIG_CM5200 1 /* ... on CM5200 platform */
34 #define CONFIG_HIGH_BATS 1 /* High BATs supported */
39 #include <config_cmd_default.h>
41 #define CONFIG_CMD_ASKENV
42 #define CONFIG_CMD_BSP
43 #define CONFIG_CMD_DATE
44 #define CONFIG_CMD_DHCP
45 #define CONFIG_CMD_DIAG
46 #define CONFIG_CMD_FAT
47 #define CONFIG_CMD_I2C
48 #define CONFIG_CMD_JFFS2
49 #define CONFIG_CMD_MII
50 #define CONFIG_CMD_NFS
51 #define CONFIG_CMD_PING
52 #define CONFIG_CMD_REGINFO
53 #define CONFIG_CMD_SNTP
54 #define CONFIG_CMD_USB
57 * Serial console configuration
59 #define CONFIG_PSC_CONSOLE 1 /* console is on PSC1 */
60 #define CONFIG_BAUDRATE 57600 /* ... at 57600 bps */
61 #define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200, 230400 }
62 #define CONFIG_SILENT_CONSOLE 1 /* needed to silence i2c_init() */
65 * Ethernet configuration
67 #define CONFIG_MPC5xxx_FEC 1
68 #define CONFIG_PHY_ADDR 0x00
69 #define CONFIG_ENV_OVERWRITE 1 /* allow overwriting of ethaddr */
70 /* use misc_init_r() to read ethaddr from I2C EEPROM (see CONFIG_SYS_I2C_EEPROM) */
71 #define CONFIG_MISC_INIT_R 1
72 #define CONFIG_MAC_OFFSET 0x35 /* MAC address offset in I2C EEPROM */
77 #define CONFIG_POST (CONFIG_SYS_POST_MEMORY | CONFIG_SYS_POST_CPU | CONFIG_SYS_POST_I2C)
78 #define MPC5XXX_SRAM_POST_SIZE (MPC5XXX_SRAM_SIZE - 4)
79 /* List of I2C addresses to be verified by POST */
80 #define I2C_ADDR_LIST { CONFIG_SYS_I2C_SLAVE, CONFIG_SYS_I2C_IO, CONFIG_SYS_I2C_EEPROM }
82 /* display image timestamps */
83 #define CONFIG_TIMESTAMP 1
88 #define CONFIG_BOOTDELAY 5 /* autoboot after 5 seconds */
89 #define CONFIG_PREBOOT "echo;" \
90 "echo Type \"run net_nfs_fdt\" to mount root filesystem over NFS;" \
92 #undef CONFIG_BOOTARGS
95 * Default environment settings
97 #define CONFIG_EXTRA_ENV_SETTINGS \
99 "netmask=255.255.0.0\0" \
100 "ipaddr=192.168.160.33\0" \
101 "serverip=192.168.1.1\0" \
102 "gatewayip=192.168.1.1\0" \
103 "console=ttyPSC0\0" \
104 "u-boot_addr=100000\0" \
105 "kernel_addr=200000\0" \
106 "kernel_addr_flash=fc0c0000\0" \
107 "fdt_addr=400000\0" \
108 "fdt_addr_flash=fc0a0000\0" \
109 "ramdisk_addr=500000\0" \
110 "rootpath=/opt/eldk-4.1/ppc_6xx\0" \
111 "u-boot=/tftpboot/cm5200/u-boot.bin\0" \
112 "bootfile_fdt=/tftpboot/cm5200/uImage\0" \
113 "fdt_file=/tftpboot/cm5200/cm5200.dtb\0" \
114 "load=tftp ${u-boot_addr} ${u-boot}\0" \
115 "update=prot off fc000000 +${filesize}; " \
116 "era fc000000 +${filesize}; " \
117 "cp.b ${u-boot_addr} fc000000 ${filesize}; " \
118 "prot on fc000000 +${filesize}\0" \
119 "nfsargs=setenv bootargs root=/dev/nfs rw " \
120 "nfsroot=${serverip}:${rootpath}\0" \
121 "flashargs=setenv bootargs root=/dev/mtdblock5 rw\0" \
122 "addmtd=setenv bootargs ${bootargs} ${mtdparts}\0" \
123 "addinit=setenv bootargs ${bootargs} init=/linuxrc\0" \
124 "addcons=setenv bootargs ${bootargs} " \
125 "console=${console},${baudrate}\0" \
126 "addip=setenv bootargs ${bootargs} " \
127 "ip=${ipaddr}:${serverip}:${gatewayip}:" \
128 "${netmask}:${hostname}:${netdev}:off panic=1\0" \
129 "flash_flash=run flashargs addinit addip addcons;" \
130 "bootm ${kernel_addr_flash} - ${fdt_addr_flash}\0" \
131 "net_nfs_fdt=tftp ${kernel_addr} ${bootfile_fdt}; " \
132 "tftp ${fdt_addr} ${fdt_file}; run nfsargs addip " \
133 "addcons; bootm ${kernel_addr} - ${fdt_addr}\0" \
135 #define CONFIG_BOOTCOMMAND "run flash_flash"
138 * Low level configuration
142 * Clock configuration
144 #define CONFIG_SYS_MPC5XXX_CLKIN 33000000 /* SYS_XTAL_IN = 33MHz */
145 #define CONFIG_SYS_IPBCLK_EQUALS_XLBCLK 1 /* IPB = 133MHz */
150 #define CONFIG_SYS_MBAR 0xF0000000
151 #define CONFIG_SYS_SDRAM_BASE 0x00000000
152 #define CONFIG_SYS_DEFAULT_MBAR 0x80000000
154 #define CONFIG_SYS_LOWBOOT 1
156 /* Use ON-Chip SRAM until RAM will be available */
157 #define CONFIG_SYS_INIT_RAM_ADDR MPC5XXX_SRAM
159 /* preserve space for the post_word at end of on-chip SRAM */
160 #define CONFIG_SYS_INIT_RAM_END MPC5XXX_SRAM_POST_SIZE
162 #define CONFIG_SYS_INIT_RAM_END MPC5XXX_SRAM_SIZE
165 #define CONFIG_SYS_GBL_DATA_SIZE 128 /* size in bytes for initial data */
166 #define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_END - CONFIG_SYS_GBL_DATA_SIZE)
167 #define CONFIG_BOARD_TYPES 1 /* we use board_type */
169 #define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET
171 #define CONFIG_SYS_MONITOR_BASE TEXT_BASE
172 #define CONFIG_SYS_MONITOR_LEN (384 << 10) /* 384 kB for Monitor */
173 #define CONFIG_SYS_MALLOC_LEN (256 << 10) /* 256 kB for malloc() */
174 #define CONFIG_SYS_BOOTMAPSZ (8 << 20) /* initial mem map for Linux */
177 * Flash configuration
179 #define CONFIG_SYS_FLASH_CFI 1
180 #define CONFIG_FLASH_CFI_DRIVER 1
181 #define CONFIG_SYS_FLASH_BASE 0xfc000000
182 /* we need these despite using CFI */
183 #define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max num of flash banks */
184 #define CONFIG_SYS_MAX_FLASH_SECT 256 /* max num of sectors on one chip */
185 #define CONFIG_SYS_FLASH_SIZE 0x02000000 /* 32 MiB */
188 #if (CONFIG_SYS_MONITOR_BASE < CONFIG_SYS_FLASH_BASE)
189 #define CONFIG_SYS_RAMBOOT 1
190 #undef CONFIG_SYS_LOWBOOT
195 * Chip selects configuration
197 /* Boot Chipselect */
198 #define CONFIG_SYS_BOOTCS_START CONFIG_SYS_FLASH_BASE
199 #define CONFIG_SYS_BOOTCS_SIZE CONFIG_SYS_FLASH_SIZE
200 #define CONFIG_SYS_BOOTCS_CFG 0x00087D31 /* for pci_clk = 33 MHz */
201 /* use board_early_init_r to enable flash write in CS_BOOT */
202 #define CONFIG_BOARD_EARLY_INIT_R
204 /* Flash memory addressing */
205 #define CONFIG_SYS_CS0_START CONFIG_SYS_FLASH_BASE
206 #define CONFIG_SYS_CS0_SIZE CONFIG_SYS_FLASH_SIZE
208 /* No burst, dead cycle = 1 for CS0 (Flash) */
209 #define CONFIG_SYS_CS_BURST 0x00000000
210 #define CONFIG_SYS_CS_DEADCYCLE 0x00000001
213 * SDRAM configuration
214 * settings for k4s561632E-xx75, assuming XLB = 132 MHz
216 #define SDRAM_MODE 0x00CD0000 /* CASL 3, burst length 8 */
217 #define SDRAM_CONTROL 0x514F0000
218 #define SDRAM_CONFIG1 0xE2333900
219 #define SDRAM_CONFIG2 0x8EE70000
224 #define CONFIG_JFFS2_CMDLINE 1
225 #define MTDIDS_DEFAULT "nor0=cm5200-0"
226 #define MTDPARTS_DEFAULT "mtdparts=cm5200-0:" \
227 "384k(uboot),128k(env)," \
228 "128k(redund_env),128k(dtb)," \
229 "2m(kernel),27904k(rootfs)," \
235 #define CONFIG_HARD_I2C 1 /* I2C with hardware support */
236 #define CONFIG_SYS_I2C_MODULE 2 /* Select I2C module #2 */
237 #define CONFIG_SYS_I2C_SPEED 40000 /* 40 kHz */
238 #define CONFIG_SYS_I2C_SLAVE 0x0
239 #define CONFIG_SYS_I2C_IO 0x38 /* PCA9554AD I2C I/O port address */
240 #define CONFIG_SYS_I2C_EEPROM 0x53 /* I2C EEPROM device address */
245 #define CONFIG_RTC_MPC5200 1 /* use internal MPC5200 RTC */
250 #define CONFIG_USB_OHCI 1
251 #define CONFIG_USB_STORAGE 1
252 #define CONFIG_USB_CLOCK 0x0001BBBB
253 #define CONFIG_USB_CONFIG 0x00001000
254 /* Partitions (for USB) */
255 #define CONFIG_MAC_PARTITION 1
256 #define CONFIG_DOS_PARTITION 1
257 #define CONFIG_ISO_PARTITION 1
260 * Invoke our last_stage_init function - needed by fwupdate
262 #define CONFIG_LAST_STAGE_INIT 1
265 * Environment settings
267 #define CONFIG_ENV_IS_IN_FLASH 1
268 #define CONFIG_ENV_SIZE 0x10000
269 #define CONFIG_ENV_SECT_SIZE 0x20000
270 #define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + CONFIG_SYS_MONITOR_LEN)
271 /* Configuration of redundant environment */
272 #define CONFIG_ENV_ADDR_REDUND (CONFIG_ENV_ADDR + CONFIG_ENV_SECT_SIZE)
273 #define CONFIG_ENV_SIZE_REDUND (CONFIG_ENV_SIZE)
276 * Pin multiplexing configuration
280 * CS1/GPIO_WKUP_6: GPIO (default)
281 * ALTs: CAN1 on I2C1, CAN2 on TIMER0/1
283 * Ether: Ethernet 100Mbit with MD
284 * PCI_DIS: PCI controller disabled
286 * PSC3: SPI with UART3
290 #define CONFIG_SYS_GPS_PORT_CONFIG 0x10559C44
293 * Miscellaneous configurable options
295 #define CONFIG_SYS_LONGHELP 1 /* undef to save memory */
296 #define CONFIG_SYS_PROMPT "=> " /* Monitor Command Prompt */
297 #define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */
298 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) /* Print Buffer Size */
299 #define CONFIG_SYS_MAXARGS 16 /* max number of command args */
300 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */
302 #define CONFIG_SYS_ALT_MEMTEST 1
303 #define CONFIG_SYS_MEMTEST_START 0x00100000 /* memtest works on */
304 #define CONFIG_SYS_MEMTEST_END 0x03f00000 /* 1 .. 63 MiB in SDRAM */
306 #define CONFIG_LOOPW 1
308 #define CONFIG_SYS_LOAD_ADDR 0x100000 /* default load address */
309 #define CONFIG_SYS_HZ 1000 /* decrementer freq: 1 ms ticks */
312 * Various low-level settings
314 #define CONFIG_SYS_HID0_INIT HID0_ICE | HID0_ICFI
315 #define CONFIG_SYS_HID0_FINAL HID0_ICE
317 #define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */
318 #define BOOTFLAG_WARM 0x02 /* Software reboot */
320 #define CONFIG_SYS_XLB_PIPELINING 1 /* enable transaction pipeling */
323 * Cache Configuration
325 #define CONFIG_SYS_CACHELINE_SIZE 32 /* For MPC5xxx CPUs */
326 #ifdef CONFIG_CMD_KGDB
327 #define CONFIG_SYS_CACHELINE_SHIFT 5 /* log base 2 of the above value */
331 * Flat Device Tree support
333 #define CONFIG_OF_LIBFDT 1
334 #define CONFIG_OF_BOARD_SETUP 1
335 #define OF_CPU "PowerPC,5200@0"
336 #define OF_SOC "soc5200@f0000000"
337 #define OF_TBCLK (bd->bi_busfreq / 4)
338 #define OF_STDOUT_PATH "/soc5200@f0000000/serial@2000"
340 #endif /* __CONFIG_H */