include/configs/cm5200.h

   1 /*
   2  * (C) Copyright 2003-2007
   3  * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
   4  *
   5  * See file CREDITS for list of people who contributed to this
   6  * project.
   7  *
   8  * This program is free software; you can redistribute it and/or
   9  * modify it under the terms of the GNU General Public License as
  10  * published by the Free Software Foundation; either version 2 of
  11  * the License, or (at your option) any later version.
  12  *
  13  * This program is distributed in the hope that it will be useful,
  14  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  15  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  16  * GNU General Public License for more details.
  17  *
  18  * You should have received a copy of the GNU General Public License
  19  * along with this program; if not, write to the Free Software
  20  * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  21  * MA 02111-1307 USA
  22  */
  23
  24 #ifndef __CONFIG_H
  25 #define __CONFIG_H
  26
  27 /*
  28  * High Level Configuration Options
  29  */
  30 #define CONFIG_MPC5xxx          1       /* This is an MPC5xxx CPU */
  31 #define CONFIG_MPC5200          1       /* (more precisely an MPC5200 CPU) */
  32 #define CONFIG_CM5200           1       /* ... on CM5200 platform */
  33
  34
  35 /*
  36  * Supported commands
  37  */
  38 #include <config_cmd_default.h>
  39
  40 #define CONFIG_CMD_ASKENV
  41 #define CONFIG_CMD_BSP
  42 #define CONFIG_CMD_DATE
  43 #define CONFIG_CMD_DHCP
  44 #define CONFIG_CMD_DIAG
  45 #define CONFIG_CMD_FAT
  46 #define CONFIG_CMD_I2C
  47 #define CONFIG_CMD_JFFS2
  48 #define CONFIG_CMD_MII
  49 #define CONFIG_CMD_NFS
  50 #define CONFIG_CMD_PING
  51 #define CONFIG_CMD_REGINFO
  52 #define CONFIG_CMD_SNTP
  53 #define CONFIG_CMD_USB
  54
  55 /*
  56  * Serial console configuration
  57  */
  58 #define CONFIG_PSC_CONSOLE      1       /* console is on PSC1 */
  59 #define CONFIG_BAUDRATE         57600   /* ... at 57600 bps */
  60 #define CFG_BAUDRATE_TABLE      { 9600, 19200, 38400, 57600, 115200, 230400 }
  61 #define CONFIG_SILENT_CONSOLE   1       /* needed to silence i2c_init() */
  62
  63
  64 /*
  65  * Ethernet configuration
  66  */
  67 #define CONFIG_MPC5xxx_FEC      1
  68 #define CONFIG_PHY_ADDR         0x00
  69 #define CONFIG_ENV_OVERWRITE    1       /* allow overwriting of ethaddr */
  70 /* use misc_init_r() to read ethaddr from I2C EEPROM (see CFG_I2C_EEPROM) */
  71 #define CONFIG_MISC_INIT_R      1
  72 #define CONFIG_MAC_OFFSET       0x35    /* MAC address offset in I2C EEPROM */
  73
  74
  75 /*
  76  * POST support
  77  */
  78 #define CONFIG_POST             (CFG_POST_MEMORY | CFG_POST_CPU | CFG_POST_I2C)
  79 #define MPC5XXX_SRAM_POST_SIZE  (MPC5XXX_SRAM_SIZE - 4)
  80 /* List of I2C addresses to be verified by POST */
  81 #define I2C_ADDR_LIST           { CFG_I2C_SLAVE, CFG_I2C_IO, CFG_I2C_EEPROM }
  82
  83
  84 /* display image timestamps */
  85 #define CONFIG_TIMESTAMP        1
  86
  87
  88 /*
  89  * Autobooting
  90  */
  91 #define CONFIG_BOOTDELAY        5       /* autoboot after 5 seconds */
  92 #define CONFIG_PREBOOT  "echo;" \
  93         "echo Type \"run net_nfs_fdt\" to mount root filesystem over NFS;" \
  94         "echo"
  95 #undef CONFIG_BOOTARGS
  96
  97 /*
  98  * Default environment settings
  99  */
 100 #define CONFIG_EXTRA_ENV_SETTINGS                                       \
 101         "netdev=eth0\0"                                                 \
 102         "netmask=255.255.0.0\0"                                         \
 103         "ipaddr=192.168.160.33\0"                                       \
 104         "serverip=192.168.1.1\0"                                        \
 105         "gatewayip=192.168.1.1\0"                                       \
 106         "console=ttyPSC0\0"                                             \
 107         "u-boot_addr=100000\0"                                          \
 108         "kernel_addr=200000\0"                                          \
 109         "kernel_addr_flash=fc0c0000\0"                                  \
 110         "fdt_addr=400000\0"                                             \
 111         "fdt_addr_flash=fc0a0000\0"                                     \
 112         "ramdisk_addr=500000\0"                                         \
 113         "rootpath=/opt/eldk-4.1/ppc_6xx\0"                              \
 114         "u-boot=/tftpboot/cm5200/u-boot.bin\0"                          \
 115         "bootfile_fdt=/tftpboot/cm5200/uImage\0"                        \
 116         "fdt_file=/tftpboot/cm5200/cm5200.dtb\0"                        \
 117         "load=tftp ${u-boot_addr} ${u-boot}\0"                          \
 118         "update=prot off fc000000 +${filesize}; "                       \
 119                 "era fc000000 +${filesize}; "                           \
 120                 "cp.b ${u-boot_addr} fc000000 ${filesize}; "            \
 121                 "prot on fc000000 +${filesize}\0"                       \
 122         "nfsargs=setenv bootargs root=/dev/nfs rw "                     \
 123                 "nfsroot=${serverip}:${rootpath}\0"                     \
 124         "flashargs=setenv bootargs root=/dev/mtdblock5 rw\0"            \
 125         "addmtd=setenv bootargs ${bootargs} ${mtdparts}\0"              \
 126         "addinit=setenv bootargs ${bootargs} init=/linuxrc\0"           \
 127         "addcons=setenv bootargs ${bootargs} "                          \
 128                 "console=${console},${baudrate}\0"                      \
 129         "addip=setenv bootargs ${bootargs} "                            \
 130                 "ip=${ipaddr}:${serverip}:${gatewayip}:"                \
 131                 "${netmask}:${hostname}:${netdev}:off panic=1\0"        \
 132         "flash_flash=run flashargs addinit addip addcons;"              \
 133                 "bootm ${kernel_addr_flash} - ${fdt_addr_flash}\0"      \
 134         "net_nfs_fdt=tftp ${kernel_addr} ${bootfile_fdt}; "             \
 135                 "tftp ${fdt_addr} ${fdt_file}; run nfsargs addip "      \
 136                 "addcons; bootm ${kernel_addr} - ${fdt_addr}\0"         \
 137         ""
 138 #define CONFIG_BOOTCOMMAND      "run flash_flash"
 139
 140
 141 /*
 142  * Low level configuration
 143  */
 144
 145
 146 /*
 147  * Clock configuration
 148  */
 149 #define CFG_MPC5XXX_CLKIN       33000000        /* SYS_XTAL_IN = 33MHz */
 150 #define CFG_IPBCLK_EQUALS_XLBCLK        1       /* IPB = 133MHz */
 151
 152
 153 /*
 154  * Memory map
 155  */
 156 #define CFG_MBAR                0xF0000000
 157 #define CFG_SDRAM_BASE          0x00000000
 158 #define CFG_DEFAULT_MBAR        0x80000000
 159
 160 #define CFG_LOWBOOT             1
 161
 162 /* Use ON-Chip SRAM until RAM will be available */
 163 #define CFG_INIT_RAM_ADDR       MPC5XXX_SRAM
 164 #ifdef CONFIG_POST
 165 /* preserve space for the post_word at end of on-chip SRAM */
 166 #define CFG_INIT_RAM_END        MPC5XXX_SRAM_POST_SIZE
 167 #else
 168 #define CFG_INIT_RAM_END        MPC5XXX_SRAM_SIZE
 169 #endif
 170
 171 #define CFG_GBL_DATA_SIZE       128     /* size in bytes for initial data */
 172 #define CFG_GBL_DATA_OFFSET     (CFG_INIT_RAM_END - CFG_GBL_DATA_SIZE)
 173 #define CONFIG_BOARD_TYPES      1       /* we use board_type */
 174
 175 #define CFG_INIT_SP_OFFSET      CFG_GBL_DATA_OFFSET
 176
 177 #define CFG_MONITOR_BASE        TEXT_BASE
 178 #define CFG_MONITOR_LEN         (384 << 10)     /* 384 kB for Monitor */
 179 #define CFG_MALLOC_LEN          (256 << 10)     /* 256 kB for malloc() */
 180 #define CFG_BOOTMAPSZ           (8 << 20)       /* initial mem map for Linux */
 181
 182 /*
 183  * Flash configuration
 184  */
 185 #define CFG_FLASH_CFI           1
 186 #define CFG_FLASH_CFI_DRIVER    1
 187 #define CFG_FLASH_BASE          0xfc000000
 188 /* we need these despite using CFI */
 189 #define CFG_MAX_FLASH_BANKS     1       /* max num of flash banks */
 190 #define CFG_MAX_FLASH_SECT      256     /* max num of sectors on one chip */
 191 #define CFG_FLASH_SIZE          0x02000000 /* 32 MiB */
 192
 193
 194 #if (CFG_MONITOR_BASE < CFG_FLASH_BASE)
 195 #define CFG_RAMBOOT             1
 196 #undef CFG_LOWBOOT
 197 #endif
 198
 199
 200 /*
 201  * Chip selects configuration
 202  */
 203 /* Boot Chipselect */
 204 #define CFG_BOOTCS_START        CFG_FLASH_BASE
 205 #define CFG_BOOTCS_SIZE         CFG_FLASH_SIZE
 206 #define CFG_BOOTCS_CFG          0x00087D31      /* for pci_clk = 33 MHz */
 207 /* use board_early_init_r to enable flash write in CS_BOOT */
 208 #define CONFIG_BOARD_EARLY_INIT_R
 209
 210 /* Flash memory addressing */
 211 #define CFG_CS0_START           CFG_FLASH_BASE
 212 #define CFG_CS0_SIZE            CFG_FLASH_SIZE
 213
 214 /* No burst, dead cycle = 1 for CS0 (Flash) */
 215 #define CFG_CS_BURST            0x00000000
 216 #define CFG_CS_DEADCYCLE        0x00000001
 217
 218
 219 /*
 220  * SDRAM configuration
 221  * settings for k4s561632E-xx75, assuming XLB = 132 MHz
 222  */
 223 #define SDRAM_MODE      0x00CD0000      /* CASL 3, burst length 8 */
 224 #define SDRAM_CONTROL   0x514F0000
 225 #define SDRAM_CONFIG1   0xE2333900
 226 #define SDRAM_CONFIG2   0x8EE70000
 227
 228
 229
 230 /*
 231  * MTD configuration
 232  */
 233 #define CONFIG_JFFS2_CMDLINE    1
 234 #define MTDIDS_DEFAULT          "nor0=cm5200-0"
 235 #define MTDPARTS_DEFAULT        "mtdparts=cm5200-0:"                    \
 236                                         "384k(uboot),128k(env),"        \
 237                                         "128k(redund_env),128k(dtb),"   \
 238                                         "2m(kernel),27904k(rootfs),"    \
 239                                         "-(config)"
 240
 241
 242 /*
 243  * I2C configuration
 244  */
 245 #define CONFIG_HARD_I2C         1       /* I2C with hardware support */
 246 #define CFG_I2C_MODULE          2       /* Select I2C module #2 */
 247 #define CFG_I2C_SPEED           40000   /* 40 kHz */
 248 #define CFG_I2C_SLAVE           0x0
 249 #define CFG_I2C_IO              0x38    /* PCA9554AD I2C I/O port address */
 250 #define CFG_I2C_EEPROM          0x53    /* I2C EEPROM device address */
 251
 252
 253 /*
 254  * RTC configuration
 255  */
 256 #define CONFIG_RTC_MPC5200      1       /* use internal MPC5200 RTC */
 257
 258
 259 /*
 260  * USB configuration
 261  */
 262 #define CONFIG_USB_OHCI         1
 263 #define CONFIG_USB_STORAGE      1
 264 #define CONFIG_USB_CLOCK        0x0001BBBB
 265 #define CONFIG_USB_CONFIG       0x00001000
 266 /* Partitions (for USB) */
 267 #define CONFIG_MAC_PARTITION    1
 268 #define CONFIG_DOS_PARTITION    1
 269 #define CONFIG_ISO_PARTITION    1
 270
 271 /*
 272  * Invoke our last_stage_init function - needed by fwupdate
 273  */
 274 #define CONFIG_LAST_STAGE_INIT  1
 275
 276 /*
 277  * Environment settings
 278  */
 279 #define CFG_ENV_IS_IN_FLASH     1
 280 #define CFG_ENV_SIZE            0x10000
 281 #define CFG_ENV_SECT_SIZE       0x20000
 282 #define CFG_ENV_ADDR            (CFG_FLASH_BASE + CFG_MONITOR_LEN)
 283 /* Configuration of redundant environment */
 284 #define CFG_ENV_ADDR_REDUND     (CFG_ENV_ADDR + CFG_ENV_SECT_SIZE)
 285 #define CFG_ENV_SIZE_REDUND     (CFG_ENV_SIZE)
 286
 287
 288 /*
 289  * Pin multiplexing configuration
 290  */
 291
 292 /*
 293  * CS1/GPIO_WKUP_6: GPIO (default)
 294  * ALTs: CAN1 on I2C1, CAN2 on TIMER0/1
 295  * IRDA/PSC6: UART
 296  * Ether: Ethernet 100Mbit with MD
 297  * PCI_DIS: PCI controller disabled
 298  * USB: USB
 299  * PSC3: SPI with UART3
 300  * PSC2: UART
 301  * PSC1: UART
 302  */
 303 #define CFG_GPS_PORT_CONFIG     0x10559C44
 304
 305
 306 /*
 307  * Miscellaneous configurable options
 308  */
 309 #define CFG_LONGHELP            1       /* undef to save memory */
 310 #define CFG_PROMPT              "=> "   /* Monitor Command Prompt */
 311 #define CFG_CBSIZE              1024    /* Console I/O Buffer Size */
 312 #define CFG_PBSIZE (CFG_CBSIZE+sizeof(CFG_PROMPT)+16) /* Print Buffer Size */
 313 #define CFG_MAXARGS             16      /* max number of command args */
 314 #define CFG_BARGSIZE            CFG_CBSIZE      /* Boot Argument Buffer Size */
 315
 316 #define CFG_ALT_MEMTEST         1
 317 #define CFG_MEMTEST_START       0x00100000      /* memtest works on */
 318 #define CFG_MEMTEST_END         0x03f00000      /* 1 .. 63 MiB in SDRAM */
 319
 320 #define CONFIG_LOOPW            1
 321
 322 #define CFG_LOAD_ADDR           0x100000        /* default load address */
 323 #define CFG_HZ                  1000    /* decrementer freq: 1 ms ticks */
 324
 325
 326 /*
 327  * Various low-level settings
 328  */
 329 #define CFG_HID0_INIT           HID0_ICE | HID0_ICFI
 330 #define CFG_HID0_FINAL          HID0_ICE
 331
 332 #define BOOTFLAG_COLD           0x01    /* Normal Power-On: Boot from FLASH */
 333 #define BOOTFLAG_WARM           0x02    /* Software reboot */
 334
 335 #define CFG_XLB_PIPELINING      1       /* enable transaction pipeling */
 336
 337
 338 /*
 339  * Cache Configuration
 340  */
 341 #define CFG_CACHELINE_SIZE      32      /* For MPC5xxx CPUs */
 342 #ifdef CONFIG_CMD_KGDB
 343 #define CFG_CACHELINE_SHIFT     5       /* log base 2 of the above value */
 344 #endif
 345
 346
 347 /*
 348  * Flat Device Tree support
 349  */
 350 #define CONFIG_OF_LIBFDT        1
 351 #define CONFIG_OF_BOARD_SETUP   1
 352 #define OF_CPU                  "PowerPC,5200@0"
 353 #define OF_SOC                  "soc5200@f0000000"
 354 #define OF_TBCLK                (bd->bi_busfreq / 4)
 355 #define OF_STDOUT_PATH          "/soc5200@f0000000/serial@2000"
 356
 357 #endif /* __CONFIG_H */