include/configs/cm5200.h

   1 /*
   2  * (C) Copyright 2003-2007
   3  * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
   4  *
   5  * SPDX-License-Identifier:     GPL-2.0+
   6  */
   7
   8 #ifndef __CONFIG_H
   9 #define __CONFIG_H
  10
  11 #define CONFIG_DISPLAY_BOARDINFO
  12
  13 /*
  14  * High Level Configuration Options
  15  */
  16 #define CONFIG_MPC5200          1       /* This is an MPC5200 CPU */
  17 #define CONFIG_CM5200           1       /* ... on CM5200 platform */
  18
  19 #define CONFIG_SYS_TEXT_BASE    0xfc000000
  20
  21 #define CONFIG_HIGH_BATS        1       /* High BATs supported */
  22
  23 /*
  24  * Supported commands
  25  */
  26 #define CONFIG_CMD_ASKENV
  27 #define CONFIG_CMD_BSP
  28 #define CONFIG_CMD_DATE
  29 #define CONFIG_CMD_DIAG
  30 #define CONFIG_CMD_FAT
  31 #define CONFIG_CMD_JFFS2
  32 #define CONFIG_CMD_MII
  33 #define CONFIG_CMD_REGINFO
  34
  35 /*
  36  * Serial console configuration
  37  */
  38 #define CONFIG_PSC_CONSOLE      1       /* console is on PSC1 */
  39 #define CONFIG_BAUDRATE         57600   /* ... at 57600 bps */
  40 #define CONFIG_SYS_BAUDRATE_TABLE       { 9600, 19200, 38400, 57600, 115200, 230400 }
  41 #define CONFIG_SILENT_CONSOLE   1       /* needed to silence i2c_init() */
  42
  43 /*
  44  * Ethernet configuration
  45  */
  46 #define CONFIG_MPC5xxx_FEC      1
  47 #define CONFIG_MPC5xxx_FEC_MII100
  48 #define CONFIG_PHY_ADDR         0x00
  49 #define CONFIG_ENV_OVERWRITE    1       /* allow overwriting of ethaddr */
  50 /* use misc_init_r() to read ethaddr from I2C EEPROM (see CONFIG_SYS_I2C_EEPROM) */
  51 #define CONFIG_MISC_INIT_R      1
  52 #define CONFIG_MAC_OFFSET       0x35    /* MAC address offset in I2C EEPROM */
  53
  54 /*
  55  * POST support
  56  */
  57 #define CONFIG_POST             (CONFIG_SYS_POST_MEMORY | CONFIG_SYS_POST_CPU | CONFIG_SYS_POST_I2C)
  58 #define MPC5XXX_SRAM_POST_SIZE  (MPC5XXX_SRAM_SIZE - 4)
  59 /* List of I2C addresses to be verified by POST */
  60 #define CONFIG_SYS_POST_I2C_ADDRS       {CONFIG_SYS_I2C_SLAVE,  \
  61                                          CONFIG_SYS_I2C_IO,     \
  62                                          CONFIG_SYS_I2C_EEPROM}
  63
  64 /* display image timestamps */
  65 #define CONFIG_TIMESTAMP        1
  66
  67 /*
  68  * Autobooting
  69  */
  70 #define CONFIG_BOOTDELAY        5       /* autoboot after 5 seconds */
  71 #define CONFIG_PREBOOT  "echo;" \
  72         "echo Type \"run net_nfs_fdt\" to mount root filesystem over NFS;" \
  73         "echo"
  74 #undef CONFIG_BOOTARGS
  75
  76 /*
  77  * Default environment settings
  78  */
  79 #define CONFIG_EXTRA_ENV_SETTINGS                                       \
  80         "netdev=eth0\0"                                                 \
  81         "netmask=255.255.0.0\0"                                         \
  82         "ipaddr=192.168.160.33\0"                                       \
  83         "serverip=192.168.1.1\0"                                        \
  84         "gatewayip=192.168.1.1\0"                                       \
  85         "console=ttyPSC0\0"                                             \
  86         "u-boot_addr=100000\0"                                          \
  87         "kernel_addr=200000\0"                                          \
  88         "kernel_addr_flash=fc0c0000\0"                                  \
  89         "fdt_addr=400000\0"                                             \
  90         "fdt_addr_flash=fc0a0000\0"                                     \
  91         "ramdisk_addr=500000\0"                                         \
  92         "rootpath=/opt/eldk-4.1/ppc_6xx\0"                              \
  93         "u-boot=/tftpboot/cm5200/u-boot.bin\0"                          \
  94         "bootfile_fdt=/tftpboot/cm5200/uImage\0"                        \
  95         "fdt_file=/tftpboot/cm5200/cm5200.dtb\0"                        \
  96         "load=tftp ${u-boot_addr} ${u-boot}\0"                          \
  97         "update=prot off fc000000 +${filesize}; "                       \
  98                 "era fc000000 +${filesize}; "                           \
  99                 "cp.b ${u-boot_addr} fc000000 ${filesize}; "            \
 100                 "prot on fc000000 +${filesize}\0"                       \
 101         "nfsargs=setenv bootargs root=/dev/nfs rw "                     \
 102                 "nfsroot=${serverip}:${rootpath}\0"                     \
 103         "flashargs=setenv bootargs root=/dev/mtdblock5 rw\0"            \
 104         "addmtd=setenv bootargs ${bootargs} ${mtdparts}\0"              \
 105         "addinit=setenv bootargs ${bootargs} init=/linuxrc\0"           \
 106         "addcons=setenv bootargs ${bootargs} "                          \
 107                 "console=${console},${baudrate}\0"                      \
 108         "addip=setenv bootargs ${bootargs} "                            \
 109                 "ip=${ipaddr}:${serverip}:${gatewayip}:"                \
 110                 "${netmask}:${hostname}:${netdev}:off panic=1\0"        \
 111         "flash_flash=run flashargs addinit addip addcons;"              \
 112                 "bootm ${kernel_addr_flash} - ${fdt_addr_flash}\0"      \
 113         "net_nfs_fdt=tftp ${kernel_addr} ${bootfile_fdt}; "             \
 114                 "tftp ${fdt_addr} ${fdt_file}; run nfsargs addip "      \
 115                 "addcons; bootm ${kernel_addr} - ${fdt_addr}\0"         \
 116         ""
 117 #define CONFIG_BOOTCOMMAND      "run flash_flash"
 118
 119 /*
 120  * Low level configuration
 121  */
 122
 123 /*
 124  * Clock configuration
 125  */
 126 #define CONFIG_SYS_MPC5XXX_CLKIN        33000000        /* SYS_XTAL_IN = 33MHz */
 127 #define CONFIG_SYS_IPBCLK_EQUALS_XLBCLK 1       /* IPB = 133MHz */
 128
 129 /*
 130  * Memory map
 131  */
 132 #define CONFIG_SYS_MBAR         0xF0000000
 133 #define CONFIG_SYS_SDRAM_BASE           0x00000000
 134 #define CONFIG_SYS_DEFAULT_MBAR 0x80000000
 135
 136 #define CONFIG_SYS_LOWBOOT              1
 137
 138 /* Use ON-Chip SRAM until RAM will be available */
 139 #define CONFIG_SYS_INIT_RAM_ADDR        MPC5XXX_SRAM
 140 #ifdef CONFIG_POST
 141 /* preserve space for the post_word at end of on-chip SRAM */
 142 #define CONFIG_SYS_INIT_RAM_SIZE        MPC5XXX_SRAM_POST_SIZE
 143 #else
 144 #define CONFIG_SYS_INIT_RAM_SIZE        MPC5XXX_SRAM_SIZE
 145 #endif
 146
 147 #define CONFIG_SYS_GBL_DATA_OFFSET      (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
 148 #define CONFIG_BOARD_TYPES      1       /* we use board_type */
 149
 150 #define CONFIG_SYS_INIT_SP_OFFSET       CONFIG_SYS_GBL_DATA_OFFSET
 151
 152 #define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE
 153 #define CONFIG_SYS_MONITOR_LEN          (384 << 10)     /* 384 kB for Monitor */
 154 #define CONFIG_SYS_MALLOC_LEN           (256 << 10)     /* 256 kB for malloc() */
 155 #define CONFIG_SYS_BOOTMAPSZ            (8 << 20)       /* initial mem map for Linux */
 156
 157 /*
 158  * Flash configuration
 159  */
 160 #define CONFIG_SYS_FLASH_CFI            1
 161 #define CONFIG_FLASH_CFI_DRIVER 1
 162 #define CONFIG_SYS_FLASH_BASE           0xfc000000
 163 /* we need these despite using CFI */
 164 #define CONFIG_SYS_MAX_FLASH_BANKS      1       /* max num of flash banks */
 165 #define CONFIG_SYS_MAX_FLASH_SECT       256     /* max num of sectors on one chip */
 166 #define CONFIG_SYS_FLASH_SIZE           0x02000000 /* 32 MiB */
 167
 168 #if (CONFIG_SYS_MONITOR_BASE < CONFIG_SYS_FLASH_BASE)
 169 #define CONFIG_SYS_RAMBOOT              1
 170 #undef CONFIG_SYS_LOWBOOT
 171 #endif
 172
 173 /*
 174  * Chip selects configuration
 175  */
 176 /* Boot Chipselect */
 177 #define CONFIG_SYS_BOOTCS_START CONFIG_SYS_FLASH_BASE
 178 #define CONFIG_SYS_BOOTCS_SIZE          CONFIG_SYS_FLASH_SIZE
 179 #define CONFIG_SYS_BOOTCS_CFG           0x00087D31      /* for pci_clk = 33 MHz */
 180 /* use board_early_init_r to enable flash write in CS_BOOT */
 181 #define CONFIG_BOARD_EARLY_INIT_R
 182
 183 /* Flash memory addressing */
 184 #define CONFIG_SYS_CS0_START            CONFIG_SYS_FLASH_BASE
 185 #define CONFIG_SYS_CS0_SIZE             CONFIG_SYS_FLASH_SIZE
 186
 187 /* No burst, dead cycle = 1 for CS0 (Flash) */
 188 #define CONFIG_SYS_CS_BURST             0x00000000
 189 #define CONFIG_SYS_CS_DEADCYCLE 0x00000001
 190
 191 /*
 192  * SDRAM configuration
 193  * settings for k4s561632E-xx75, assuming XLB = 132 MHz
 194  */
 195 #define SDRAM_MODE      0x00CD0000      /* CASL 3, burst length 8 */
 196 #define SDRAM_CONTROL   0x514F0000
 197 #define SDRAM_CONFIG1   0xE2333900
 198 #define SDRAM_CONFIG2   0x8EE70000
 199
 200 /*
 201  * MTD configuration
 202  */
 203 #define CONFIG_CMD_MTDPARTS     1
 204 #define CONFIG_MTD_DEVICE               /* needed for mtdparts commands */
 205 #define CONFIG_FLASH_CFI_MTD
 206 #define MTDIDS_DEFAULT          "nor0=cm5200-0"
 207 #define MTDPARTS_DEFAULT        "mtdparts=cm5200-0:"                    \
 208                                         "384k(uboot),128k(env),"        \
 209                                         "128k(redund_env),128k(dtb),"   \
 210                                         "2m(kernel),27904k(rootfs),"    \
 211                                         "-(config)"
 212
 213 /*
 214  * I2C configuration
 215  */
 216 #define CONFIG_HARD_I2C         1       /* I2C with hardware support */
 217 #define CONFIG_SYS_I2C_MODULE           2       /* Select I2C module #2 */
 218 #define CONFIG_SYS_I2C_SPEED            40000   /* 40 kHz */
 219 #define CONFIG_SYS_I2C_SLAVE            0x0
 220 #define CONFIG_SYS_I2C_IO               0x38    /* PCA9554AD I2C I/O port address */
 221 #define CONFIG_SYS_I2C_EEPROM           0x53    /* I2C EEPROM device address */
 222
 223 /*
 224  * RTC configuration
 225  */
 226 #define CONFIG_RTC_MPC5200      1       /* use internal MPC5200 RTC */
 227
 228 /*
 229  * USB configuration
 230  */
 231 #define CONFIG_USB_OHCI         1
 232 #define CONFIG_USB_STORAGE      1
 233 #define CONFIG_USB_CLOCK        0x0001BBBB
 234 #define CONFIG_USB_CONFIG       0x00001000
 235 /* Partitions (for USB) */
 236 #define CONFIG_MAC_PARTITION    1
 237 #define CONFIG_DOS_PARTITION    1
 238 #define CONFIG_ISO_PARTITION    1
 239
 240 /*
 241  * Invoke our last_stage_init function - needed by fwupdate
 242  */
 243 #define CONFIG_LAST_STAGE_INIT  1
 244
 245 /*
 246  * Environment settings
 247  */
 248 #define CONFIG_ENV_IS_IN_FLASH  1
 249 #define CONFIG_ENV_SIZE         0x10000
 250 #define CONFIG_ENV_SECT_SIZE    0x20000
 251 #define CONFIG_ENV_ADDR         (CONFIG_SYS_FLASH_BASE + CONFIG_SYS_MONITOR_LEN)
 252 /* Configuration of redundant environment */
 253 #define CONFIG_ENV_ADDR_REDUND  (CONFIG_ENV_ADDR + CONFIG_ENV_SECT_SIZE)
 254 #define CONFIG_ENV_SIZE_REDUND  (CONFIG_ENV_SIZE)
 255
 256 /*
 257  * Pin multiplexing configuration
 258  */
 259
 260 /*
 261  * CS1/GPIO_WKUP_6: GPIO (default)
 262  * ALTs: CAN1 on I2C1, CAN2 on TIMER0/1
 263  * IRDA/PSC6: UART
 264  * Ether: Ethernet 100Mbit with MD
 265  * PCI_DIS: PCI controller disabled
 266  * USB: USB
 267  * PSC3: SPI with UART3
 268  * PSC2: UART
 269  * PSC1: UART
 270  */
 271 #define CONFIG_SYS_GPS_PORT_CONFIG      0x10559C44
 272
 273 /*
 274  * Miscellaneous configurable options
 275  */
 276 #define CONFIG_SYS_LONGHELP             1       /* undef to save memory */
 277 #define CONFIG_SYS_CBSIZE               1024    /* Console I/O Buffer Size */
 278 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) /* Print Buffer Size */
 279 #define CONFIG_SYS_MAXARGS              16      /* max number of command args */
 280 #define CONFIG_SYS_BARGSIZE             CONFIG_SYS_CBSIZE       /* Boot Argument Buffer Size */
 281
 282 #define CONFIG_SYS_ALT_MEMTEST          1
 283 #define CONFIG_SYS_MEMTEST_START        0x00100000      /* memtest works on */
 284 #define CONFIG_SYS_MEMTEST_END          0x03f00000      /* 1 .. 63 MiB in SDRAM */
 285
 286 #define CONFIG_SYS_LOAD_ADDR            0x100000        /* default load address */
 287
 288 /*
 289  * Various low-level settings
 290  */
 291 #define CONFIG_SYS_HID0_INIT            HID0_ICE | HID0_ICFI
 292 #define CONFIG_SYS_HID0_FINAL           HID0_ICE
 293
 294 #define CONFIG_SYS_XLB_PIPELINING       1       /* enable transaction pipeling */
 295
 296 /*
 297  * Cache Configuration
 298  */
 299 #define CONFIG_SYS_CACHELINE_SIZE       32      /* For MPC5xxx CPUs */
 300 #ifdef CONFIG_CMD_KGDB
 301 #define CONFIG_SYS_CACHELINE_SHIFT      5       /* log base 2 of the above value */
 302 #endif
 303
 304 /*
 305  * Flat Device Tree support
 306  */
 307 #define OF_CPU                  "PowerPC,5200@0"
 308 #define OF_SOC                  "soc5200@f0000000"
 309 #define OF_TBCLK                (bd->bi_busfreq / 4)
 310 #define OF_STDOUT_PATH          "/soc5200@f0000000/serial@2000"
 311
 312 #endif /* __CONFIG_H */