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1 /*
2 * (C) Copyright 2013 CompuLab, Ltd.
3 * Author: Igor Grinberg <grinberg@compulab.co.il>
4 *
5 * Configuration settings for the CompuLab CM-T3517 board
6 *
7 * SPDX-License-Identifier: GPL-2.0+
8 */
9
10 #ifndef __CONFIG_H
11 #define __CONFIG_H
12
13 #define CONFIG_SYS_CACHELINE_SIZE 64
14
15 /*
16 * High Level Configuration Options
17 */
18 #define CONFIG_OMAP /* in a TI OMAP core */
19 #define CONFIG_CM_T3517 /* working with CM-T3517 */
20 #define CONFIG_OMAP_COMMON
21 /* Common ARM Erratas */
22 #define CONFIG_ARM_ERRATA_454179
23 #define CONFIG_ARM_ERRATA_430973
24 #define CONFIG_ARM_ERRATA_621766
25
26 #define CONFIG_SYS_TEXT_BASE 0x80008000
27
28 /*
29 * This is needed for the DMA stuff.
30 * Although the default iss 64, we still define it
31 * to be on the safe side once the default is changed.
32 */
33 #define CONFIG_SYS_CACHELINE_SIZE 64
34
35 #define CONFIG_EMIF4 /* The chip has EMIF4 controller */
36
37 #include <asm/arch/cpu.h> /* get chip and board defs */
38 #include <asm/arch/omap.h>
39
40 #define CONFIG_MACH_TYPE MACH_TYPE_CM_T3517
41
42 /*
43 * Display CPU and Board information
44 */
45 #define CONFIG_DISPLAY_CPUINFO
46 #define CONFIG_DISPLAY_BOARDINFO
47
48 /* Clock Defines */
49 #define V_OSCK 26000000 /* Clock output from T2 */
50 #define V_SCLK (V_OSCK >> 1)
51
52 #define CONFIG_MISC_INIT_R
53
54 /*
55 * The early kernel mapping on ARM currently only maps from the base of DRAM
56 * to the end of the kernel image. The kernel is loaded at DRAM base + 0x8000.
57 * The early kernel pagetable uses DRAM base + 0x4000 to DRAM base + 0x8000,
58 * so that leaves DRAM base to DRAM base + 0x4000 available.
59 */
60 #define CONFIG_SYS_BOOTMAPSZ 0x4000
61
62 #define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */
63 #define CONFIG_SETUP_MEMORY_TAGS
64 #define CONFIG_INITRD_TAG
65 #define CONFIG_REVISION_TAG
66 #define CONFIG_SERIAL_TAG
67
68 /*
69 * Size of malloc() pool
70 */
71 #define CONFIG_ENV_SIZE (128 << 10) /* 128 KiB */
72 #define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + (128 << 10))
73
74 /*
75 * Hardware drivers
76 */
77
78 /*
79 * NS16550 Configuration
80 */
81 #define CONFIG_SYS_NS16550_SERIAL
82 #define CONFIG_SYS_NS16550_REG_SIZE (-4)
83 #define CONFIG_SYS_NS16550_CLK 48000000 /* 48MHz (APLL96/2) */
84
85 /*
86 * select serial console configuration
87 */
88 #define CONFIG_CONS_INDEX 3
89 #define CONFIG_SYS_NS16550_COM3 OMAP34XX_UART3
90 #define CONFIG_SERIAL3 3 /* UART3 */
91 #define CONFIG_SYS_CONSOLE_IS_IN_ENV
92
93 /* allow to overwrite serial and ethaddr */
94 #define CONFIG_ENV_OVERWRITE
95 #define CONFIG_BAUDRATE 115200
96 #define CONFIG_SYS_BAUDRATE_TABLE {4800, 9600, 19200, 38400, 57600,\
97 115200}
98
99 #define CONFIG_OMAP_GPIO
100
101 #define CONFIG_GENERIC_MMC
102 #define CONFIG_MMC
103 #define CONFIG_OMAP_HSMMC
104 #define CONFIG_DOS_PARTITION
105
106 /* USB */
107 #define CONFIG_USB_MUSB_AM35X
108
109 #ifndef CONFIG_USB_MUSB_AM35X
110 #define CONFIG_USB_OMAP3
111 #define CONFIG_USB_EHCI
112 #define CONFIG_USB_EHCI_OMAP
113 #define CONFIG_OMAP_EHCI_PHY1_RESET_GPIO 146
114 #define CONFIG_OMAP_EHCI_PHY2_RESET_GPIO 147
115 #else /* !CONFIG_USB_MUSB_AM35X */
116 #define CONFIG_USB_MUSB_PIO_ONLY
117 #endif /* CONFIG_USB_MUSB_AM35X */
118
119 #define CONFIG_USB_STORAGE
120
121 /* commands to include */
122 #define CONFIG_CMD_CACHE
123 #define CONFIG_CMD_EXT2 /* EXT2 Support */
124 #define CONFIG_CMD_FAT /* FAT support */
125 #define CONFIG_CMD_MTDPARTS /* Enable MTD parts commands */
126 #define CONFIG_MTD_DEVICE /* needed for mtdparts commands */
127 #define CONFIG_MTD_PARTITIONS
128 #define MTDIDS_DEFAULT "nand0=nand"
129 #define MTDPARTS_DEFAULT "mtdparts=nand:512k(x-loader),"\
130 "1920k(u-boot),256k(u-boot-env),"\
131 "4m(kernel),-(fs)"
132
133 #define CONFIG_CMD_MMC /* MMC support */
134 #define CONFIG_CMD_NAND /* NAND support */
135
136 #define CONFIG_SYS_NO_FLASH
137 #define CONFIG_SYS_I2C
138 #define CONFIG_SYS_OMAP24_I2C_SPEED 400000
139 #define CONFIG_SYS_OMAP24_I2C_SLAVE 1
140 #define CONFIG_SYS_I2C_OMAP34XX
141 #define CONFIG_SYS_I2C_EEPROM_ADDR 0x50
142 #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1
143 #define CONFIG_SYS_I2C_EEPROM_BUS 0
144 #define CONFIG_I2C_MULTI_BUS
145
146 /*
147 * Board NAND Info.
148 */
149 #define CONFIG_NAND_OMAP_GPMC
150 #define CONFIG_SYS_NAND_ADDR NAND_BASE /* physical address */
151 /* to access nand */
152 #define CONFIG_SYS_NAND_BASE NAND_BASE /* physical address */
153 /* to access nand at */
154 /* CS0 */
155 #define CONFIG_SYS_MAX_NAND_DEVICE 1 /* Max number of NAND */
156 /* devices */
157
158 /* Environment information */
159 #define CONFIG_BOOTDELAY 3
160 #define CONFIG_ZERO_BOOTDELAY_CHECK
161
162 #define CONFIG_EXTRA_ENV_SETTINGS \
163 "loadaddr=0x82000000\0" \
164 "baudrate=115200\0" \
165 "console=ttyO2,115200n8\0" \
166 "netretry=yes\0" \
167 "mpurate=auto\0" \
168 "vram=12M\0" \
169 "dvimode=1024x768MR-16@60\0" \
170 "defaultdisplay=dvi\0" \
171 "mmcdev=0\0" \
172 "mmcroot=/dev/mmcblk0p2 rw rootwait\0" \
173 "mmcrootfstype=ext4\0" \
174 "nandroot=/dev/mtdblock4 rw\0" \
175 "nandrootfstype=ubifs\0" \
176 "mmcargs=setenv bootargs console=${console} " \
177 "mpurate=${mpurate} " \
178 "vram=${vram} " \
179 "omapfb.mode=dvi:${dvimode} " \
180 "omapdss.def_disp=${defaultdisplay} " \
181 "root=${mmcroot} " \
182 "rootfstype=${mmcrootfstype}\0" \
183 "nandargs=setenv bootargs console=${console} " \
184 "mpurate=${mpurate} " \
185 "vram=${vram} " \
186 "omapfb.mode=dvi:${dvimode} " \
187 "omapdss.def_disp=${defaultdisplay} " \
188 "root=${nandroot} " \
189 "rootfstype=${nandrootfstype}\0" \
190 "loadbootscript=fatload mmc ${mmcdev} ${loadaddr} boot.scr\0" \
191 "bootscript=echo Running bootscript from mmc ...; " \
192 "source ${loadaddr}\0" \
193 "loaduimage=fatload mmc ${mmcdev} ${loadaddr} uImage\0" \
194 "mmcboot=echo Booting from mmc ...; " \
195 "run mmcargs; " \
196 "bootm ${loadaddr}\0" \
197 "nandboot=echo Booting from nand ...; " \
198 "run nandargs; " \
199 "nand read ${loadaddr} 2a0000 400000; " \
200 "bootm ${loadaddr}\0" \
201
202 #define CONFIG_CMD_BOOTZ
203 #define CONFIG_BOOTCOMMAND \
204 "mmc dev ${mmcdev}; if mmc rescan; then " \
205 "if run loadbootscript; then " \
206 "run bootscript; " \
207 "else " \
208 "if run loaduimage; then " \
209 "run mmcboot; " \
210 "else run nandboot; " \
211 "fi; " \
212 "fi; " \
213 "else run nandboot; fi"
214
215 /*
216 * Miscellaneous configurable options
217 */
218 #define CONFIG_AUTO_COMPLETE
219 #define CONFIG_CMDLINE_EDITING
220 #define CONFIG_TIMESTAMP
221 #define CONFIG_SYS_AUTOLOAD "no"
222 #define CONFIG_SYS_LONGHELP /* undef to save memory */
223 #define CONFIG_SYS_CBSIZE 512 /* Console I/O Buffer Size */
224 /* Print Buffer Size */
225 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \
226 sizeof(CONFIG_SYS_PROMPT) + 16)
227 #define CONFIG_SYS_MAXARGS 32 /* max number of command args */
228 /* Boot Argument Buffer Size */
229 #define CONFIG_SYS_BARGSIZE (CONFIG_SYS_CBSIZE)
230
231 #define CONFIG_SYS_LOAD_ADDR (OMAP34XX_SDRC_CS0 + 0x02000000)
232
233 /*
234 * AM3517 has 12 GP timers, they can be driven by the system clock
235 * (12/13/16.8/19.2/38.4MHz) or by 32KHz clock. We use 13MHz (V_SCLK).
236 * This rate is divided by a local divisor.
237 */
238 #define CONFIG_SYS_TIMERBASE (OMAP34XX_GPT2)
239 #define CONFIG_SYS_PTV 2 /* Divisor: 2^(PTV+1) => 8 */
240 #define CONFIG_SYS_HZ 1000
241
242 /*-----------------------------------------------------------------------
243 * Physical Memory Map
244 */
245 #define CONFIG_NR_DRAM_BANKS 1 /* CM-T3517 DRAM is only on CS0 */
246 #define PHYS_SDRAM_1 OMAP34XX_SDRC_CS0
247 #define CONFIG_SYS_CS0_SIZE (256 << 20)
248
249 /*-----------------------------------------------------------------------
250 * FLASH and environment organization
251 */
252
253 /* **** PISMO SUPPORT *** */
254 /* Monitor at start of flash */
255 #define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_FLASH_BASE
256 #define CONFIG_SYS_MONITOR_LEN (256 << 10) /* Reserve 2 sectors */
257
258 #define CONFIG_ENV_IS_IN_NAND
259 #define SMNAND_ENV_OFFSET 0x260000 /* environment starts here */
260 #define CONFIG_ENV_OFFSET SMNAND_ENV_OFFSET
261 #define CONFIG_ENV_ADDR SMNAND_ENV_OFFSET
262
263 #if defined(CONFIG_CMD_NET)
264 #define CONFIG_DRIVER_TI_EMAC
265 #define CONFIG_DRIVER_TI_EMAC_USE_RMII
266 #define CONFIG_MII
267 #define CONFIG_SMC911X
268 #define CONFIG_SMC911X_32_BIT
269 #define CONFIG_SMC911X_BASE (0x2C000000 + (16 << 20))
270 #define CONFIG_ARP_TIMEOUT 200UL
271 #define CONFIG_NET_RETRY_COUNT 5
272 #endif /* CONFIG_CMD_NET */
273
274 /* additions for new relocation code, must be added to all boards */
275 #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1
276 #define CONFIG_SYS_INIT_RAM_ADDR 0x4020f800
277 #define CONFIG_SYS_INIT_RAM_SIZE 0x800
278 #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INIT_RAM_ADDR + \
279 CONFIG_SYS_INIT_RAM_SIZE - \
280 GENERATED_GBL_DATA_SIZE)
281
282 /* Status LED */
283 #define CONFIG_STATUS_LED /* Status LED enabled */
284 #define CONFIG_BOARD_SPECIFIC_LED
285 #define CONFIG_GPIO_LED
286 #define GREEN_LED_GPIO 186 /* CM-T3517 Green LED is GPIO186 */
287 #define GREEN_LED_DEV 0
288 #define STATUS_LED_BIT GREEN_LED_GPIO
289 #define STATUS_LED_STATE STATUS_LED_ON
290 #define STATUS_LED_PERIOD (CONFIG_SYS_HZ / 2)
291 #define STATUS_LED_BOOT GREEN_LED_DEV
292
293 /* GPIO banks */
294 #ifdef CONFIG_STATUS_LED
295 #define CONFIG_OMAP3_GPIO_6 /* GPIO186 is in GPIO bank 6 */
296 #endif
297
298 /* Display Configuration */
299 #define CONFIG_OMAP3_GPIO_2
300 #define CONFIG_OMAP3_GPIO_5
301 #define CONFIG_VIDEO_OMAP3
302 #define LCD_BPP LCD_COLOR16
303
304 #define CONFIG_LCD
305 #define CONFIG_SPLASH_SCREEN
306 #define CONFIG_SPLASHIMAGE_GUARD
307 #define CONFIG_CMD_BMP
308 #define CONFIG_BMP_16BPP
309 #define CONFIG_SCF0403_LCD
310
311 #define CONFIG_OMAP3_SPI
312
313 #endif /* __CONFIG_H */