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1 /*
2 * (C) Copyright 2002
3 * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
4 * Rolf Offermanns <rof@sysgo.de>
5 *
6 * Configuation settings for the SSV DNP1110 board.
7 *
8 * See file CREDITS for list of people who contributed to this
9 * project.
10 *
11 * This program is free software; you can redistribute it and/or
12 * modify it under the terms of the GNU General Public License as
13 * published by the Free Software Foundation; either version 2 of
14 * the License, or (at your option) any later version.
15 *
16 * This program is distributed in the hope that it will be useful,
17 * but WITHOUT ANY WARRANTY; without even the implied warranty of
18 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
19 * GNU General Public License for more details.
20 *
21 * You should have received a copy of the GNU General Public License
22 * along with this program; if not, write to the Free Software
23 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
24 * MA 02111-1307 USA
25 */
26
27 #ifndef __CONFIG_H
28 #define __CONFIG_H
29
30 /*
31 * If we are developing, we might want to start armboot from ram
32 * so we MUST NOT initialize critical regs like mem-timing ...
33 */
34 #define CONFIG_SKIP_LOWLEVEL_INIT 1
35 #undef CONFIG_SKIP_RELOCATE_UBOOT
36
37 /*
38 * High Level Configuration Options
39 * (easy to change)
40 */
41 #define CONFIG_SA1110 1 /* This is an SA1110 CPU */
42 #define CONFIG_DNP1110 1 /* on an DNP/1110 Board */
43
44 #undef CONFIG_USE_IRQ /* we don't need IRQ/FIQ stuff */
45
46 /*
47 * Size of malloc() pool
48 */
49 #define CFG_MALLOC_LEN (CFG_ENV_SIZE + 128*1024)
50 #define CFG_GBL_DATA_SIZE 128 /* size in bytes reserved for initial data */
51
52 /*
53 * Hardware drivers
54 */
55 #define CONFIG_DRIVER_SMC91111
56 #define CONFIG_SMC91111_BASE 0x20000300
57
58
59 /*
60 * select serial console configuration
61 */
62 #define CONFIG_SERIAL1 1 /* we use SERIAL 1 */
63
64 /* allow to overwrite serial and ethaddr */
65 #define CONFIG_ENV_OVERWRITE
66
67 #define CONFIG_BAUDRATE 115200
68
69
70 /*
71 * BOOTP options
72 */
73 #define CONFIG_BOOTP_BOOTFILESIZE
74 #define CONFIG_BOOTP_BOOTPATH
75 #define CONFIG_BOOTP_GATEWAY
76 #define CONFIG_BOOTP_HOSTNAME
77
78
79 /*
80 * Command line configuration.
81 */
82 #include <config_cmd_default.h>
83
84
85 #define CONFIG_BOOTDELAY 3
86 #define CONFIG_BOOTARGS "root=ramfs devfs=mount console=ttySA0,115200"
87 #define CONFIG_ETHADDR 02:80:ad:20:31:b8
88 #define CONFIG_NETMASK 255.255.0.0
89 #define CONFIG_IPADDR 172.22.2.23
90 #define CONFIG_SERVERIP 172.22.2.22
91 #define CONFIG_BOOTFILE "dnp1110"
92 #define CONFIG_BOOTCOMMAND "tftp; bootm"
93
94 #if defined(CONFIG_CMD_KGDB)
95 #define CONFIG_KGDB_BAUDRATE 230400 /* speed to run kgdb serial port */
96 #define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */
97 #endif
98
99 /*
100 * Miscellaneous configurable options
101 */
102 #define CFG_LONGHELP /* undef to save memory */
103 #define CFG_PROMPT "DNP1110 # " /* Monitor Command Prompt */
104 #define CFG_CBSIZE 256 /* Console I/O Buffer Size */
105 #define CFG_PBSIZE (CFG_CBSIZE+sizeof(CFG_PROMPT)+16) /* Print Buffer Size */
106 #define CFG_MAXARGS 16 /* max number of command args */
107 #define CFG_BARGSIZE CFG_CBSIZE /* Boot Argument Buffer Size */
108
109 #define CFG_MEMTEST_START 0xc0400000 /* memtest works on */
110 #define CFG_MEMTEST_END 0xc0800000 /* 4 ... 8 MB in DRAM */
111
112 #undef CFG_CLKS_IN_HZ /* everything, incl board info, in Hz */
113
114 #define CFG_LOAD_ADDR 0xc0200000 /* default load address */
115
116 #define CFG_HZ 3686400 /* incrementer freq: 3.6864 MHz */
117 #define CFG_CPUSPEED 0x0b /* set core clock to 220 MHz */
118
119 /* valid baudrates */
120 #define CFG_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 }
121
122 /*-----------------------------------------------------------------------
123 * Stack sizes
124 *
125 * The stack sizes are set up in start.S using the settings below
126 */
127 #define CONFIG_STACKSIZE (128*1024) /* regular stack */
128 #ifdef CONFIG_USE_IRQ
129 #define CONFIG_STACKSIZE_IRQ (4*1024) /* IRQ stack */
130 #define CONFIG_STACKSIZE_FIQ (4*1024) /* FIQ stack */
131 #endif
132
133 /*-----------------------------------------------------------------------
134 * Physical Memory Map
135 */
136 #define CONFIG_NR_DRAM_BANKS 1 /* we have 1 banks of DRAM */
137 #define PHYS_SDRAM_1 0xc0000000 /* SDRAM Bank #1 */
138 #define PHYS_SDRAM_1_SIZE 0x02000000 /* 32 MB */
139
140
141 #define PHYS_FLASH_1 0x00000000 /* Flash Bank #1 */
142 #define PHYS_FLASH_SIZE 0x01000000 /* 16 MB */
143 #define PHYS_FLASH_BANK_SIZE 0x01000000 /* 32 MB Banks */
144 #define PHYS_FLASH_SECT_SIZE 0x00020000 /* 256 KB sectors (x2) */
145
146 #define CFG_FLASH_BASE PHYS_FLASH_1
147
148 /*-----------------------------------------------------------------------
149 * FLASH and environment organization
150 */
151 #define CFG_MAX_FLASH_BANKS 1 /* max number of memory banks */
152 #define CFG_MAX_FLASH_SECT 128 /* max number of sectors on one chip */
153
154 /* timeout values are in ticks */
155 #define CFG_FLASH_ERASE_TOUT (2*CFG_HZ) /* Timeout for Flash Erase */
156 #define CFG_FLASH_WRITE_TOUT (2*CFG_HZ) /* Timeout for Flash Write */
157
158 #define CFG_ENV_IS_IN_FLASH 1
159 #define CFG_ENV_ADDR (PHYS_FLASH_1 + 0xF80000) /* Addr of Environment Sector */
160 #define CFG_ENV_SIZE 0x20000 /* Total Size of Environment Sector */
161
162 #endif /* __CONFIG_H */