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1 /*
2 * Configuration settings for the Espresso7420 board.
3 * Copyright (C) 2016 Samsung Electronics
4 * Thomas Abraham <thomas.ab@samsung.com>
5 *
6 * SPDX-License-Identifier: GPL-2.0+
7 */
8
9 #ifndef __CONFIG_EXYNOS7420_COMMON_H
10 #define __CONFIG_EXYNOS7420_COMMON_H
11
12 /* High Level Configuration Options */
13 #define CONFIG_SAMSUNG /* in a SAMSUNG core */
14 #define CONFIG_EXYNOS7420 /* Exynos7 Family */
15 #define CONFIG_S5P
16
17 #include <asm/arch/cpu.h> /* get chip and board defs */
18 #include <linux/sizes.h>
19
20 #define CONFIG_ARCH_CPU_INIT
21 #define CONFIG_DISPLAY_BOARDINFO
22 #define CONFIG_BOARD_EARLY_INIT_F
23
24 /* Size of malloc() pool before and after relocation */
25 #define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + (80 << 20))
26
27 /* Miscellaneous configurable options */
28 #define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */
29 #define CONFIG_SYS_PBSIZE 1024 /* Print Buffer Size */
30 #define CONFIG_SYS_MAXARGS 16 /* max number of command args */
31
32 /* Boot Argument Buffer Size */
33 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
34
35 /* select serial console configuration */
36 #define CONFIG_BAUDRATE 115200
37
38 /* FLASH and environment organization */
39 #define CONFIG_SYS_NO_FLASH
40
41 /* Timer input clock frequency */
42 #define COUNTER_FREQUENCY 24000000
43
44 /* Device Tree */
45 #define CONFIG_DEVICE_TREE_LIST "exynos7420-espresso7420"
46
47 /* IRAM Layout */
48 #define CONFIG_IRAM_BASE 0x02100000
49 #define CONFIG_IRAM_SIZE 0x58000
50 #define CONFIG_IRAM_END (CONFIG_IRAM_BASE + CONFIG_IRAM_SIZE)
51
52 /* Number of CPUs available */
53 #define CONFIG_CORE_COUNT 0x8
54
55 /* select serial console configuration */
56 #define CONFIG_BAUDRATE 115200
57 #define CONFIG_SILENT_CONSOLE
58 #define CONFIG_SYS_CONSOLE_IS_IN_ENV
59 #define CONFIG_CONSOLE_MUX
60
61 #define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_SDRAM_BASE + 0x3E00000)
62
63 #define PHYS_SDRAM_1 CONFIG_SYS_SDRAM_BASE
64 #define PHYS_SDRAM_1_SIZE SDRAM_BANK_SIZE
65 #define PHYS_SDRAM_2 (CONFIG_SYS_SDRAM_BASE + SDRAM_BANK_SIZE)
66 #define PHYS_SDRAM_2_SIZE SDRAM_BANK_SIZE
67 #define PHYS_SDRAM_3 (CONFIG_SYS_SDRAM_BASE + (2 * SDRAM_BANK_SIZE))
68 #define PHYS_SDRAM_3_SIZE SDRAM_BANK_SIZE
69 #define PHYS_SDRAM_4 (CONFIG_SYS_SDRAM_BASE + (3 * SDRAM_BANK_SIZE))
70 #define PHYS_SDRAM_4_SIZE SDRAM_BANK_SIZE
71 #define PHYS_SDRAM_5 (CONFIG_SYS_SDRAM_BASE + (4 * SDRAM_BANK_SIZE))
72 #define PHYS_SDRAM_5_SIZE SDRAM_BANK_SIZE
73 #define PHYS_SDRAM_6 (CONFIG_SYS_SDRAM_BASE + (5 * SDRAM_BANK_SIZE))
74 #define PHYS_SDRAM_6_SIZE SDRAM_BANK_SIZE
75 #define PHYS_SDRAM_7 (CONFIG_SYS_SDRAM_BASE + (6 * SDRAM_BANK_SIZE))
76 #define PHYS_SDRAM_7_SIZE SDRAM_BANK_SIZE
77 #define PHYS_SDRAM_8 (CONFIG_SYS_SDRAM_BASE + (7 * SDRAM_BANK_SIZE))
78 #define PHYS_SDRAM_8_SIZE SDRAM_BANK_SIZE
79
80 /* Configuration of ENV Blocks */
81 #define CONFIG_ENV_SIZE (16 << 10) /* 16 KB */
82
83 #define BOOT_TARGET_DEVICES(func) \
84 func(MMC, mmc, 1) \
85 func(MMC, mmc, 0) \
86
87 #ifndef MEM_LAYOUT_ENV_SETTINGS
88 #define MEM_LAYOUT_ENV_SETTINGS \
89 "bootm_size=0x10000000\0" \
90 "kernel_addr_r=0x42000000\0" \
91 "fdt_addr_r=0x43000000\0" \
92 "ramdisk_addr_r=0x43300000\0" \
93 "scriptaddr=0x50000000\0" \
94 "pxefile_addr_r=0x51000000\0"
95 #endif
96
97 #ifndef EXYNOS_DEVICE_SETTINGS
98 #define EXYNOS_DEVICE_SETTINGS \
99 "stdin=serial\0" \
100 "stdout=serial\0" \
101 "stderr=serial\0"
102 #endif
103
104 #ifndef EXYNOS_FDTFILE_SETTING
105 #define EXYNOS_FDTFILE_SETTING
106 #endif
107
108 #define CONFIG_EXTRA_ENV_SETTINGS \
109 EXYNOS_DEVICE_SETTINGS \
110 EXYNOS_FDTFILE_SETTING \
111 MEM_LAYOUT_ENV_SETTINGS
112
113 #endif /* __CONFIG_EXYNOS7420_COMMON_H */