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1 /* Configuration header file for Gaisler Research AB's Template
2 * design (GPL Open Source SPARC/LEON3 96MHz) for Altera NIOS
3 * Development board Stratix II edition, with the FPGA device
4 * EP2S60.
5 *
6 * (C) Copyright 2003-2005
7 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
8 *
9 * (C) Copyright 2008
10 * Daniel Hellstrom, Gaisler Research, daniel@gaisler.com.
11 *
12 * SPDX-License-Identifier: GPL-2.0+
13 */
14
15 #ifndef __CONFIG_H__
16 #define __CONFIG_H__
17
18 #define CONFIG_SYS_GENERIC_BOARD
19
20 /*
21 * High Level Configuration Options
22 * (easy to change)
23 */
24
25 /* Altera NIOS Development board, Stratix II board */
26 #define CONFIG_GR_EP2S60 1
27
28 /* CPU / AMBA BUS configuration */
29 #define CONFIG_SYS_CLK_FREQ 96000000 /* 96MHz */
30
31 /* Define this is the GR-2S60-MEZZ mezzanine is available and you
32 * want to use the USB and GRETH functionality of the board
33 */
34 #undef GR_2S60_MEZZ
35
36 #ifdef GR_2S60_MEZZ
37 #define USE_GRETH 1
38 #define USE_GRUSB 1
39 #endif
40
41 /*
42 * Serial console configuration
43 */
44 #define CONFIG_BAUDRATE 38400 /* ... at 38400 bps */
45 #define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200, 230400 }
46
47 /* Partitions */
48 #define CONFIG_DOS_PARTITION
49 #define CONFIG_MAC_PARTITION
50 #define CONFIG_ISO_PARTITION
51
52 /*
53 * Supported commands
54 */
55 #define CONFIG_CMD_REGINFO
56 #define CONFIG_CMD_PING
57 #define CONFIG_CMD_DIAG
58 #define CONFIG_CMD_IRQ
59
60 /* USB support */
61 #if USE_GRUSB
62 #define CONFIG_USB_UHCI
63 #define CONFIG_CMD_FAT
64 #define CONFIG_CMD_EXT2
65 #define CONFIG_CMD_USB
66 #define CONFIG_USB_STORAGE
67 /* Enable needed helper functions */
68 #define CONFIG_SYS_STDIO_DEREGISTER /* needs stdio_deregister */
69 #endif
70
71 /*
72 * Autobooting
73 */
74 #define CONFIG_BOOTDELAY 5 /* autoboot after 5 seconds */
75
76 #define CONFIG_PREBOOT "echo;" \
77 "echo Type \"run flash_nfs\" to mount root filesystem over NFS;" \
78 "echo"
79
80 #undef CONFIG_BOOTARGS
81
82 #define CONFIG_EXTRA_ENV_SETTINGS \
83 "netdev=eth0\0" \
84 "nfsargs=setenv bootargs console=ttyS0,38400 root=/dev/nfs rw " \
85 "nfsroot=${serverip}:${rootpath}\0" \
86 "ramargs=setenv bootargs console=ttyS0,${baudrate} root=/dev/ram rw\0" \
87 "addip=setenv bootargs ${bootargs} " \
88 "ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}" \
89 ":${hostname}:${netdev}:off panic=1\0" \
90 "flash_nfs=run nfsargs addip;" \
91 "bootm ${kernel_addr}\0" \
92 "flash_self=run ramargs addip;" \
93 "bootm ${kernel_addr} ${ramdisk_addr}\0" \
94 "net_nfs=tftp 40000000 ${bootfile};run nfsargs addip;bootm\0" \
95 "scratch=40800000\0" \
96 "getkernel=tftpboot $(scratch) $(bootfile)\0" \
97 "bootargs=console=ttyS0,38400 root=/dev/nfs rw nfsroot=192.168.0.20:/export/rootfs ip=192.168.0.207:192.168.0.20:192.168.0.1:255.255.255.0:ml401:eth0\0" \
98 ""
99
100 #define CONFIG_NETMASK 255.255.255.0
101 #define CONFIG_GATEWAYIP 192.168.0.1
102 #define CONFIG_SERVERIP 192.168.0.20
103 #define CONFIG_IPADDR 192.168.0.207
104 #define CONFIG_ROOTPATH "/export/rootfs"
105 #define CONFIG_HOSTNAME ml401
106 #define CONFIG_BOOTFILE "/uImage"
107
108 #define CONFIG_BOOTCOMMAND "run flash_self"
109
110 /* Memory MAP
111 *
112 * Flash:
113 * |--------------------------------|
114 * | 0x00000000 Text & Data & BSS | *
115 * | for Monitor | *
116 * | ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~| *
117 * | UNUSED / Growth | * 256kb
118 * |--------------------------------|
119 * | 0x00050000 Base custom area | *
120 * | kernel / FS | *
121 * | | * Rest of Flash
122 * |~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~|
123 * | END-0x00008000 Environment | * 32kb
124 * |--------------------------------|
125 *
126 *
127 *
128 * Main Memory:
129 * |--------------------------------|
130 * | UNUSED / scratch area |
131 * | |
132 * | |
133 * | |
134 * | |
135 * |--------------------------------|
136 * | Monitor .Text / .DATA / .BSS | * 512kb
137 * | Relocated! | *
138 * |--------------------------------|
139 * | Monitor Malloc | * 128kb (contains relocated environment)
140 * |--------------------------------|
141 * | Monitor/kernel STACK | * 64kb
142 * |--------------------------------|
143 * | Page Table for MMU systems | * 2k
144 * |--------------------------------|
145 * | PROM Code accessed from Linux | * 6kb-128b
146 * |--------------------------------|
147 * | Global data (avail from kernel)| * 128b
148 * |--------------------------------|
149 *
150 */
151
152 /*
153 * Flash configuration (8,16 or 32 MB)
154 * TEXT base always at 0xFFF00000
155 * ENV_ADDR always at 0xFFF40000
156 * FLASH_BASE at 0xFC000000 for 64 MB
157 * 0xFE000000 for 32 MB
158 * 0xFF000000 for 16 MB
159 * 0xFF800000 for 8 MB
160 */
161 /*#define CONFIG_SYS_NO_FLASH 1*/
162 #define CONFIG_SYS_FLASH_BASE 0x00000000
163 #define CONFIG_SYS_FLASH_SIZE 0x00400000 /* FPGA Bit file is in top of FLASH, we only ues the bottom 4Mb */
164
165 #define PHYS_FLASH_SECT_SIZE 0x00010000 /* 64 KB sectors */
166 #define CONFIG_SYS_MAX_FLASH_SECT 256 /* max num of sects on one chip */
167 #define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max num of memory banks */
168
169 #define CONFIG_SYS_FLASH_ERASE_TOUT 240000 /* Flash Erase Timeout (in ms) */
170 #define CONFIG_SYS_FLASH_WRITE_TOUT 500 /* Flash Write Timeout (in ms) */
171 #define CONFIG_SYS_FLASH_LOCK_TOUT 5 /* Timeout for Flash Set Lock Bit (in ms) */
172 #define CONFIG_SYS_FLASH_UNLOCK_TOUT 10000 /* Timeout for Flash Clear Lock Bits (in ms) */
173 #define CONFIG_SYS_FLASH_PROTECTION /* "Real" (hardware) sectors protection */
174
175 /*** CFI CONFIG ***/
176 #define CONFIG_SYS_FLASH_CFI_WIDTH FLASH_CFI_8BIT
177 #define CONFIG_FLASH_CFI_DRIVER
178 #define CONFIG_SYS_FLASH_CFI
179 /* Bypass cache when reading regs from flash memory */
180 #define CONFIG_SYS_FLASH_CFI_BYPASS_READ
181 /* Buffered writes (32byte/go) instead of single accesses */
182 #define CONFIG_SYS_FLASH_USE_BUFFER_WRITE
183
184 /*
185 * Environment settings
186 */
187 /*#define CONFIG_ENV_IS_NOWHERE 1*/
188 #define CONFIG_ENV_IS_IN_FLASH 1
189 /* CONFIG_ENV_ADDR need to be at sector boundary */
190 #define CONFIG_ENV_SIZE 0x8000
191 #define CONFIG_ENV_SECT_SIZE 0x20000
192 #define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE+CONFIG_SYS_FLASH_SIZE-CONFIG_ENV_SECT_SIZE)
193 #define CONFIG_ENV_OVERWRITE 1
194
195 /*
196 * Memory map
197 */
198 #define CONFIG_SYS_SDRAM_BASE 0x40000000
199 #define CONFIG_SYS_SDRAM_SIZE 0x02000000
200 #define CONFIG_SYS_SDRAM_END (CONFIG_SYS_SDRAM_BASE+CONFIG_SYS_SDRAM_SIZE)
201
202 /* no SRAM available */
203 #undef CONFIG_SYS_SRAM_BASE
204 #undef CONFIG_SYS_SRAM_SIZE
205
206 #define CONFIG_SYS_RAM_BASE CONFIG_SYS_SDRAM_BASE
207 #define CONFIG_SYS_RAM_SIZE CONFIG_SYS_SDRAM_SIZE
208 #define CONFIG_SYS_RAM_END CONFIG_SYS_SDRAM_END
209
210 #define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_SDRAM_END - GENERATED_GBL_DATA_SIZE)
211
212 #define CONFIG_SYS_PROM_SIZE (8192-GENERATED_GBL_DATA_SIZE)
213 #define CONFIG_SYS_PROM_OFFSET (CONFIG_SYS_GBL_DATA_OFFSET-CONFIG_SYS_PROM_SIZE)
214
215 #define CONFIG_SYS_INIT_SP_OFFSET (CONFIG_SYS_PROM_OFFSET-32)
216 #define CONFIG_SYS_STACK_SIZE (0x10000-32)
217
218 #define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE
219 #if (CONFIG_SYS_MONITOR_BASE < CONFIG_SYS_FLASH_BASE)
220 # define CONFIG_SYS_RAMBOOT 1
221 #endif
222
223 #define CONFIG_SYS_MONITOR_LEN (512 << 10) /* Reserve 512 kB for Monitor */
224 #define CONFIG_SYS_MALLOC_LEN (128 << 10) /* Reserve 128 kB for malloc() */
225 #define CONFIG_SYS_BOOTMAPSZ (8 << 20) /* Initial Memory map for Linux */
226
227 #define CONFIG_SYS_MALLOC_END (CONFIG_SYS_INIT_SP_OFFSET-CONFIG_SYS_STACK_SIZE)
228 #define CONFIG_SYS_MALLOC_BASE (CONFIG_SYS_MALLOC_END-CONFIG_SYS_MALLOC_LEN)
229
230 /* relocated monitor area */
231 #define CONFIG_SYS_RELOC_MONITOR_MAX_END CONFIG_SYS_MALLOC_BASE
232 #define CONFIG_SYS_RELOC_MONITOR_BASE (CONFIG_SYS_RELOC_MONITOR_MAX_END-CONFIG_SYS_MONITOR_LEN)
233
234 /* make un relocated address from relocated address */
235 #define UN_RELOC(address) (address-(CONFIG_SYS_RELOC_MONITOR_BASE-CONFIG_SYS_TEXT_BASE))
236
237 /*
238 * Ethernet configuration uses on board SMC91C111, however if a mezzanine
239 * with a PHY is attached the GRETH can be used on this board.
240 * Define USE_GRETH in order to use the mezzanine provided PHY with the
241 * onchip GRETH network MAC, note that this is not supported by the
242 * template design.
243 */
244 #ifndef USE_GRETH
245
246 /* USE SMC91C111 MAC */
247 #define CONFIG_SMC91111 1
248 #define CONFIG_SMC91111_BASE 0x20000300 /* chip select 3 */
249 #define CONFIG_SMC_USE_32_BIT 1 /* 32 bit bus */
250 #undef CONFIG_SMC_91111_EXT_PHY /* we use internal phy */
251 /*#define CONFIG_SHOW_ACTIVITY*/
252 #define CONFIG_NET_RETRY_COUNT 10 /* # of retries */
253
254 #else
255
256 /* USE GRETH Ethernet Driver */
257 #define CONFIG_GRETH 1
258 #endif
259
260 #define CONFIG_PHY_ADDR 0x00
261
262 /*
263 * Miscellaneous configurable options
264 */
265 #define CONFIG_SYS_LONGHELP /* undef to save memory */
266 #if defined(CONFIG_CMD_KGDB)
267 #define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */
268 #else
269 #define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */
270 #endif
271 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) /* Print Buffer Size */
272 #define CONFIG_SYS_MAXARGS 16 /* max number of command args */
273 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */
274
275 #define CONFIG_SYS_MEMTEST_START 0x00100000 /* memtest works on */
276 #define CONFIG_SYS_MEMTEST_END 0x00f00000 /* 1 ... 15 MB in DRAM */
277
278 #define CONFIG_SYS_LOAD_ADDR 0x100000 /* default load address */
279
280 /*-----------------------------------------------------------------------
281 * USB stuff
282 *-----------------------------------------------------------------------
283 */
284 #define CONFIG_USB_CLOCK 0x0001BBBB
285 #define CONFIG_USB_CONFIG 0x00005000
286
287 /***** Gaisler GRLIB IP-Cores Config ********/
288
289 #define CONFIG_SYS_GRLIB_SDRAM 0
290
291 /* No SDRAM Configuration */
292 #undef CONFIG_SYS_GRLIB_GAISLER_SDCTRL1
293
294 /* See, GRLIB Docs (grip.pdf) on how to set up
295 * These the memory controller registers.
296 */
297 #define CONFIG_SYS_GRLIB_ESA_MCTRL1
298 #define CONFIG_SYS_GRLIB_ESA_MCTRL1_CFG1 (0x10f800ff | (1<<11))
299 #define CONFIG_SYS_GRLIB_ESA_MCTRL1_CFG2 0x00000000
300 #define CONFIG_SYS_GRLIB_ESA_MCTRL1_CFG3 0x00000000
301
302 /* GRLIB FT-MCTRL configuration */
303 #define CONFIG_SYS_GRLIB_GAISLER_FTMCTRL1
304 #define CONFIG_SYS_GRLIB_GAISLER_FTMCTRL1_CFG1 (0x10f800ff | (1<<11))
305 #define CONFIG_SYS_GRLIB_GAISLER_FTMCTRL1_CFG2 0x00000000
306 #define CONFIG_SYS_GRLIB_GAISLER_FTMCTRL1_CFG3 0x00000000
307
308 /* DDR controller */
309 #define CONFIG_SYS_GRLIB_GAISLER_DDRSPA1
310 #define CONFIG_SYS_GRLIB_GAISLER_DDRSPA1_CTRL 0xa900830a
311
312 /* no DDR2 Controller */
313 #undef CONFIG_SYS_GRLIB_GAISLER_DDR2SPA1
314
315 /* Identification string */
316 #define CONFIG_IDENT_STRING "GAISLER LEON3 EP2S60"
317
318 /* default kernel command line */
319 #define CONFIG_DEFAULT_KERNEL_COMMAND_LINE "console=ttyS0,38400\0\0"
320
321 #endif /* __CONFIG_H */