include/configs/imx31_phycore.h

   1 /*
   2  * (C) Copyright 2004
   3  * Texas Instruments.
   4  * Richard Woodruff <r-woodruff2@ti.com>
   5  * Kshitij Gupta <kshitij@ti.com>
   6  *
   7  * Configuration settings for the phyCORE-i.MX31 board.
   8  *
   9  * See file CREDITS for list of people who contributed to this
  10  * project.
  11  *
  12  * This program is free software; you can redistribute it and/or
  13  * modify it under the terms of the GNU General Public License as
  14  * published by the Free Software Foundation; either version 2 of
  15  * the License, or (at your option) any later version.
  16  *
  17  * This program is distributed in the hope that it will be useful,
  18  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  19  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  20  * GNU General Public License for more details.
  21  *
  22  * You should have received a copy of the GNU General Public License
  23  * along with this program; if not, write to the Free Software
  24  * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  25  * MA 02111-1307 USA
  26  */
  27
  28 #ifndef __CONFIG_H
  29 #define __CONFIG_H
  30
  31 #include <asm/arch/imx-regs.h>
  32
  33  /* High Level Configuration Options */
  34 #define CONFIG_ARM1136          1    /* This is an arm1136 CPU core */
  35 #define CONFIG_MX31             1    /* in a mx31 */
  36 #define CONFIG_MX31_HCLK_FREQ   26000000
  37 #define CONFIG_MX31_CLK32       32000
  38
  39 #define CONFIG_DISPLAY_CPUINFO
  40 #define CONFIG_DISPLAY_BOARDINFO
  41
  42 /* Temporarily disabled */
  43 #if 0
  44 #define CONFIG_OF_LIBFDT                1
  45 #define CONFIG_FIT                      1
  46 #define CONFIG_FIT_VERBOSE              1
  47 #endif
  48
  49 #define CONFIG_CMDLINE_TAG              1    /* enable passing of ATAGs */
  50 #define CONFIG_SETUP_MEMORY_TAGS        1
  51 #define CONFIG_INITRD_TAG               1
  52
  53 /*
  54  * Size of malloc() pool
  55  */
  56 #define CONFIG_SYS_MALLOC_LEN           (CONFIG_ENV_SIZE + 512 * 1024)
  57
  58 /*
  59  * Hardware drivers
  60  */
  61
  62 #define CONFIG_HARD_I2C         1
  63 #define CONFIG_I2C_MXC          1
  64 #define CONFIG_SYS_I2C_MX31_PORT2       1
  65 #define CONFIG_SYS_I2C_SPEED            100000
  66 #define CONFIG_SYS_I2C_SLAVE            0xfe
  67
  68 #define CONFIG_MXC_UART 1
  69 #define CONFIG_SYS_MX31_UART1           1
  70
  71 /* allow to overwrite serial and ethaddr */
  72 #define CONFIG_ENV_OVERWRITE
  73 #define CONFIG_CONS_INDEX       1
  74 #define CONFIG_BAUDRATE         115200
  75 #define CONFIG_SYS_BAUDRATE_TABLE       {9600, 19200, 38400, 57600, 115200}
  76
  77 /***********************************************************
  78  * Command definition
  79  ***********************************************************/
  80
  81 #include <config_cmd_default.h>
  82
  83 #define CONFIG_CMD_PING
  84 #define CONFIG_CMD_EEPROM
  85 #define CONFIG_CMD_I2C
  86
  87 #define CONFIG_BOOTDELAY        3
  88
  89 #define MTDPARTS_DEFAULT        "mtdparts=physmap-flash.0:128k(uboot)ro,1536k(kernel),-(root)"
  90
  91 #define CONFIG_NETMASK          255.255.255.0
  92 #define CONFIG_IPADDR           192.168.23.168
  93 #define CONFIG_SERVERIP         192.168.23.2
  94
  95 #define CONFIG_EXTRA_ENV_SETTINGS                                                                                       \
  96         "bootargs_base=setenv bootargs console=ttySMX0,115200\0"                                                        \
  97         "bootargs_nfs=setenv bootargs $(bootargs) root=/dev/nfs ip=dhcp nfsroot=$(serverip):$(nfsrootfs),v3,tcp\0"      \
  98         "bootargs_flash=setenv bootargs $(bootargs) root=/dev/mtdblock2 rootfstype=jffs2"                               \
  99         "bootargs_mtd=setenv bootargs $(bootargs) $(mtdparts)"                                                          \
 100         "bootcmd=run bootcmd_net\0"                                                                                     \
 101         "bootcmd_net=run bootargs_base bootargs_mtd bootargs_nfs; tftpboot 0x80000000 $(uimage); bootm\0"               \
 102         "bootcmd_flash=run bootargs_base bootargs_mtd bootargs_flash; bootm 0x80000000\0"                               \
 103         "unlock=yes\0"                                                                                                  \
 104         "mtdparts=" MTDPARTS_DEFAULT "\0"                                                                               \
 105         "prg_uboot=tftpboot 0x80000000 $(uboot); protect off 0xa0000000 +0x20000; erase 0xa0000000 +0x20000; cp.b 0x80000000 0xa0000000 $(filesize)\0" \
 106         "prg_kernel=tftpboot 0x80000000 $(uimage); erase 0xa0040000 +0x180000; cp.b 0x80000000 0xa0040000 $(filesize)\0"        \
 107         "prg_jffs2=tftpboot 0x80000000 $(jffs2); erase 0xa01c0000 0xa1ffffff; cp.b 0x80000000 0xa01c0000 $(filesize)\0" \
 108         "videomode=video=ctfb:x:240,y:320,depth:16,mode:0,pclk:185925,le:9,ri:17,up:7,lo:10,hs:1,vs:1,sync:1241513985,vmode:0\0"
 109
 110
 111 #define CONFIG_SMC911X          1
 112 #define CONFIG_SMC911X_BASE     0xa8000000
 113 #define CONFIG_SMC911X_32_BIT   1
 114
 115 /*
 116  * Miscellaneous configurable options
 117  */
 118 #define CONFIG_SYS_LONGHELP             /* undef to save memory */
 119 #define CONFIG_SYS_PROMPT               "uboot> "
 120 #define CONFIG_SYS_CBSIZE               256  /* Console I/O Buffer Size */
 121 /* Print Buffer Size */
 122 #define CONFIG_SYS_PBSIZE               (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16)
 123 #define CONFIG_SYS_MAXARGS              16          /* max number of command args */
 124 #define CONFIG_SYS_BARGSIZE             CONFIG_SYS_CBSIZE  /* Boot Argument Buffer Size */
 125
 126 #define CONFIG_SYS_MEMTEST_START        0  /* memtest works on */
 127 #define CONFIG_SYS_MEMTEST_END          0x10000
 128
 129 #define CONFIG_SYS_LOAD_ADDR            0 /* default load address */
 130
 131 #define CONFIG_SYS_HZ                   1000
 132
 133 #define CONFIG_CMDLINE_EDITING  1
 134
 135 /*-----------------------------------------------------------------------
 136  * Stack sizes
 137  *
 138  * The stack sizes are set up in start.S using the settings below
 139  */
 140 #define CONFIG_STACKSIZE        (128 * 1024) /* regular stack */
 141
 142 /*-----------------------------------------------------------------------
 143  * Physical Memory Map
 144  */
 145 #define CONFIG_NR_DRAM_BANKS    1
 146 #define PHYS_SDRAM_1            0x80000000
 147 #define PHYS_SDRAM_1_SIZE       (128 * 1024 * 1024)
 148 #define CONFIG_BOARD_EARLY_INIT_F
 149 #define CONFIG_SYS_TEXT_BASE            0xA0000000
 150
 151 #define CONFIG_SYS_SDRAM_BASE           PHYS_SDRAM_1
 152 #define CONFIG_SYS_INIT_RAM_ADDR        IRAM_BASE_ADDR
 153 #define CONFIG_SYS_INIT_RAM_SIZE        IRAM_SIZE
 154 #define CONFIG_SYS_GBL_DATA_OFFSET      (CONFIG_SYS_INIT_RAM_SIZE - \
 155                                                 GENERATED_GBL_DATA_SIZE)
 156 #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INIT_RAM_ADDR + \
 157                                                 CONFIG_SYS_GBL_DATA_OFFSET)
 158
 159 /*-----------------------------------------------------------------------
 160  * FLASH and environment organization
 161  */
 162 #define CONFIG_SYS_FLASH_BASE           0xa0000000
 163 #define CONFIG_SYS_MAX_FLASH_BANKS      1           /* max number of memory banks */
 164 #define CONFIG_SYS_MAX_FLASH_SECT       259          /* max number of sectors on one chip */
 165 #define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_FLASH_BASE /* Monitor at beginning of flash */
 166
 167 #define CONFIG_ENV_IS_IN_EEPROM         1
 168 #define CONFIG_ENV_OFFSET                       0x00    /* environment starts here     */
 169 #define CONFIG_ENV_SIZE                 4096
 170 #define CONFIG_SYS_I2C_EEPROM_ADDR              0x52
 171 #define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS       5       /* 5 bits = 32 octets          */
 172 #define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS   10      /* between stop and start      */
 173 #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN          2       /* length of byte address      */
 174
 175 /*-----------------------------------------------------------------------
 176  * CFI FLASH driver setup
 177  */
 178 #define CONFIG_SYS_FLASH_CFI            1       /* Flash memory is CFI compliant */
 179 #define CONFIG_FLASH_CFI_DRIVER 1       /* Use drivers/cfi_flash.c */
 180 #define CONFIG_SYS_FLASH_USE_BUFFER_WRITE 1     /* Use buffered writes (~10x faster) */
 181 #define CONFIG_SYS_FLASH_PROTECTION     1       /* Use hardware sector protection */
 182
 183 /* timeout values are in ticks */
 184 #define CONFIG_SYS_FLASH_ERASE_TOUT     (100*CONFIG_SYS_HZ) /* Timeout for Flash Erase */
 185 #define CONFIG_SYS_FLASH_WRITE_TOUT     (100*CONFIG_SYS_HZ) /* Timeout for Flash Write */
 186
 187 /*
 188  * JFFS2 partitions
 189  */
 190 #undef CONFIG_CMD_MTDPARTS
 191 #define CONFIG_JFFS2_DEV        "nor0"
 192
 193 /* EET platform additions */
 194 #ifdef CONFIG_IMX31_PHYCORE_EET
 195 #define BOARD_LATE_INIT
 196
 197 #define CONFIG_MXC_GPIO
 198
 199 #define CONFIG_HARD_SPI                         1
 200 #define CONFIG_MXC_SPI                          1
 201 #define CONFIG_CMD_SPI
 202
 203 #define CONFIG_S6E63D6                          1
 204
 205 #define CONFIG_VIDEO
 206 #define CONFIG_CFB_CONSOLE
 207 #define CONFIG_VIDEO_MX3
 208 #define CONFIG_VIDEO_LOGO
 209 #define CONFIG_VIDEO_SW_CURSOR
 210 #define CONFIG_VGA_AS_SINGLE_DEVICE
 211 #define CONFIG_SYS_CONSOLE_IS_IN_ENV
 212 #define CONFIG_SPLASH_SCREEN
 213 #define CONFIG_CMD_BMP
 214 #define CONFIG_BMP_16BPP
 215 #endif
 216
 217 #endif /* __CONFIG_H */