]> git.ipfire.org Git - people/ms/u-boot.git/blob - include/configs/integratorcp.h
* Patch by Philippe Robin, 09 Mar 2004:
[people/ms/u-boot.git] / include / configs / integratorcp.h
1 /*
2 * (C) Copyright 2003
3 * Texas Instruments.
4 * Kshitij Gupta <kshitij@ti.com>
5 * Configuation settings for the TI OMAP Innovator board.
6 *
7 * (C) Copyright 2004
8 * ARM Ltd.
9 * Philippe Robin, <philippe.robin@arm.com>
10 * Configuration for Compact Integrator board.
11 *
12 * See file CREDITS for list of people who contributed to this
13 * project.
14 *
15 * This program is free software; you can redistribute it and/or
16 * modify it under the terms of the GNU General Public License as
17 * published by the Free Software Foundation; either version 2 of
18 * the License, or (at your option) any later version.
19 *
20 * This program is distributed in the hope that it will be useful,
21 * but WITHOUT ANY WARRANTY; without even the implied warranty of
22 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
23 * GNU General Public License for more details.
24 *
25 * You should have received a copy of the GNU General Public License
26 * along with this program; if not, write to the Free Software
27 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
28 * MA 02111-1307 USA
29 */
30
31 #ifndef __CONFIG_H
32 #define __CONFIG_H
33
34 /*
35 * High Level Configuration Options
36 * (easy to change)
37 */
38 #define CONFIG_ARM926EJS 1 /* This is an arm926ejs CPU core */
39 #define CONFIG_INTEGRATOR 1 /* in an Integrator board */
40 #define CONFIG_ARCH_CINTEGRATOR 1 /* Specifically, a CP */
41
42
43 #define CFG_MEMTEST_START 0x100000
44 #define CFG_MEMTEST_END 0x10000000
45 #define CFG_HZ (1000000 / 256) /* Timer 1 is clocked at 1Mhz, with 256 divider */
46 #define CFG_TIMERBASE 0x13000100
47
48 #define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */
49 #define CONFIG_SETUP_MEMORY_TAGS 1
50 #define CONFIG_MISC_INIT_R 1 /* call misc_init_r during start up */
51 /*
52 * Size of malloc() pool
53 */
54 #define CFG_MALLOC_LEN (CFG_ENV_SIZE + 128*1024)
55
56 /*
57 * Hardware drivers
58 */
59 #define CONFIG_DRIVER_SMC91111
60 #define CONFIG_SMC_USE_32_BIT
61 #define CONFIG_SMC91111_BASE 0xC8000000
62 #undef CONFIG_SMC91111_EXT_PHY
63
64 /*
65 * NS16550 Configuration
66 */
67 #define CFG_PL011_SERIAL
68 #define CONFIG_CONS_INDEX 0
69 #define CONFIG_BAUDRATE 38400
70 #define CFG_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 }
71 #define CFG_SERIAL0 0x16000000
72 #define CFG_SERIAL1 0x17000000
73
74 #define CONFIG_COMMANDS (CFG_CMD_DHCP | CFG_CMD_IMI | CFG_CMD_NET | CFG_CMD_PING | CFG_CMD_BDI | CFG_CMD_MEMORY)
75 #define CONFIG_BOOTP_MASK CONFIG_BOOTP_DEFAULT
76
77 /* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */
78 #include <cmd_confdefs.h>
79
80 #define CONFIG_BOOTDELAY 2
81 #define CONFIG_BOOTARGS "root=/dev/nfs mem=128M ip=dhcp netdev=27,0,0xfc800000,0xfc800010,eth0"
82 #define CONFIG_BOOTCOMMAND "bootp ; bootm"
83
84 /*
85 * Miscellaneous configurable options
86 */
87 #define CFG_LONGHELP /* undef to save memory */
88 #define CFG_PROMPT "Integrator-CP # " /* Monitor Command Prompt */
89 #define CFG_CBSIZE 256 /* Console I/O Buffer Size */
90 /* Print Buffer Size */
91 #define CFG_PBSIZE (CFG_CBSIZE+sizeof(CFG_PROMPT)+16)
92 #define CFG_MAXARGS 16 /* max number of command args */
93 #define CFG_BARGSIZE CFG_CBSIZE /* Boot Argument Buffer Size */
94
95 #undef CFG_CLKS_IN_HZ /* everything, incl board info, in Hz */
96 #define CFG_LOAD_ADDR 0x7fc0 /* default load address */
97
98 /*-----------------------------------------------------------------------
99 * Stack sizes
100 *
101 * The stack sizes are set up in start.S using the settings below
102 */
103 #define CONFIG_STACKSIZE (128*1024) /* regular stack */
104 #ifdef CONFIG_USE_IRQ
105 #define CONFIG_STACKSIZE_IRQ (4*1024) /* IRQ stack */
106 #define CONFIG_STACKSIZE_FIQ (4*1024) /* FIQ stack */
107 #endif
108
109 /*-----------------------------------------------------------------------
110 * Physical Memory Map
111 */
112 #define CONFIG_NR_DRAM_BANKS 1 /* we have 1 bank of DRAM */
113 #define PHYS_SDRAM_1 0x00000000 /* SDRAM Bank #1 */
114 #define PHYS_SDRAM_1_SIZE 0x02000000 /* 32 MB */
115
116 #define CFG_FLASH_BASE 0x24000000
117 #define PHYS_FLASH_1 (CFG_FLASH_BASE)
118
119 /*-----------------------------------------------------------------------
120 * FLASH and environment organization
121 */
122 #define CFG_ENV_IS_NOWHERE
123 #define CFG_MAX_FLASH_BANKS 1 /* max number of memory banks */
124 #define PHYS_FLASH_SIZE 0x01000000 /* 16MB */
125 /* timeout values are in ticks */
126 #define CFG_FLASH_ERASE_TOUT (20*CFG_HZ) /* Timeout for Flash Erase */
127 #define CFG_FLASH_WRITE_TOUT (20*CFG_HZ) /* Timeout for Flash Write */
128 #define CFG_MAX_FLASH_SECT 128
129 #define CFG_ENV_SIZE 32768
130
131 #endif /* __CONFIG_H */