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git.ipfire.org Git - people/ms/u-boot.git/blob - include/configs/lart.h
3 * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
4 * Marius Groeger <mgroeger@sysgo.de>
6 * Configuation settings for the LART board.
8 * See file CREDITS for list of people who contributed to this
11 * This program is free software; you can redistribute it and/or
12 * modify it under the terms of the GNU General Public License as
13 * published by the Free Software Foundation; either version 2 of
14 * the License, or (at your option) any later version.
16 * This program is distributed in the hope that it will be useful,
17 * but WITHOUT ANY WARRANTY; without even the implied warranty of
18 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
19 * GNU General Public License for more details.
21 * You should have received a copy of the GNU General Public License
22 * along with this program; if not, write to the Free Software
23 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
31 * High Level Configuration Options
34 #define CONFIG_SA1100 1 /* This is an SA1100 CPU */
35 #define CONFIG_LART 1 /* on an LART Board */
37 #undef CONFIG_USE_IRQ /* we don't need IRQ/FIQ stuff */
40 * Size of malloc() pool
42 #define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 128*1024)
43 #define CONFIG_SYS_GBL_DATA_SIZE 128 /* size in bytes reserved for initial data */
48 #define CONFIG_DRIVER_CS8900 1 /* we have a CS8900 on-board */
49 #define CS8900_BASE 0x20008300
50 #define CS8900_BUS16 1
53 * select serial console configuration
55 #define CONFIG_SERIAL3 1 /* we use SERIAL 3 on LART */
57 /* allow to overwrite serial and ethaddr */
58 #define CONFIG_ENV_OVERWRITE
60 #define CONFIG_BAUDRATE 9600
66 #define CONFIG_BOOTP_BOOTFILESIZE
67 #define CONFIG_BOOTP_BOOTPATH
68 #define CONFIG_BOOTP_GATEWAY
69 #define CONFIG_BOOTP_HOSTNAME
73 * Command line configuration.
75 #include <config_cmd_default.h>
78 #define CONFIG_BOOTDELAY 3
79 #define CONFIG_BOOTARGS "root=ramfs devfs=mount console=ttySA0,9600"
80 #define CONFIG_ETHADDR 08:00:3e:26:0a:5b
81 #define CONFIG_NETMASK 255.255.0.0
82 #define CONFIG_IPADDR 172.22.2.131
83 #define CONFIG_SERVERIP 172.22.2.126
84 #define CONFIG_BOOTFILE "elinos-lart"
85 #define CONFIG_BOOTCOMMAND "tftp; bootm"
87 #if defined(CONFIG_CMD_KGDB)
88 #define CONFIG_KGDB_BAUDRATE 230400 /* speed to run kgdb serial port */
89 #define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */
93 * Miscellaneous configurable options
95 #define CONFIG_SYS_LONGHELP /* undef to save memory */
96 #define CONFIG_SYS_PROMPT "LART # " /* Monitor Command Prompt */
97 #define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */
98 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) /* Print Buffer Size */
99 #define CONFIG_SYS_MAXARGS 16 /* max number of command args */
100 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */
102 #define CONFIG_SYS_MEMTEST_START 0xc0400000 /* memtest works on */
103 #define CONFIG_SYS_MEMTEST_END 0xc0800000 /* 4 ... 8 MB in DRAM */
105 #undef CONFIG_SYS_CLKS_IN_HZ /* everything, incl board info, in Hz */
107 #define CONFIG_SYS_LOAD_ADDR 0xc8000000 /* default load address */
109 #define CONFIG_SYS_HZ 3686400 /* incrementer freq: 3.6864 MHz */
110 #define CONFIG_SYS_CPUSPEED 0x0b /* set core clock to 220 MHz */
112 /* valid baudrates */
113 #define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 }
115 /*-----------------------------------------------------------------------
118 * The stack sizes are set up in start.S using the settings below
120 #define CONFIG_STACKSIZE (128*1024) /* regular stack */
121 #ifdef CONFIG_USE_IRQ
122 #define CONFIG_STACKSIZE_IRQ (4*1024) /* IRQ stack */
123 #define CONFIG_STACKSIZE_FIQ (4*1024) /* FIQ stack */
126 /*-----------------------------------------------------------------------
127 * Physical Memory Map
129 #define CONFIG_NR_DRAM_BANKS 4 /* we have 2 banks of DRAM */
130 #define PHYS_SDRAM_1 0xc0000000 /* SDRAM Bank #1 */
131 #define PHYS_SDRAM_1_SIZE 0x00800000 /* 8 MB */
132 #define PHYS_SDRAM_2 0xc1000000 /* SDRAM Bank #2 */
133 #define PHYS_SDRAM_2_SIZE 0x00800000 /* 8 MB */
134 #define PHYS_SDRAM_3 0xc8000000 /* SDRAM Bank #3 */
135 #define PHYS_SDRAM_3_SIZE 0x00800000 /* 8 MB */
136 #define PHYS_SDRAM_4 0xc9000000 /* SDRAM Bank #4 */
137 #define PHYS_SDRAM_4_SIZE 0x00800000 /* 8 MB */
140 #define PHYS_FLASH_1 0x00000000 /* Flash Bank #1 */
141 #define PHYS_FLASH_SIZE 0x00400000 /* 4 MB */
143 #define CONFIG_SYS_FLASH_BASE PHYS_FLASH_1
145 /*-----------------------------------------------------------------------
146 * FLASH and environment organization
148 #define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max number of memory banks */
149 #define CONFIG_SYS_MAX_FLASH_SECT (31+8) /* max number of sectors on one chip */
151 /* timeout values are in ticks */
152 #define CONFIG_SYS_FLASH_ERASE_TOUT (2*CONFIG_SYS_HZ) /* Timeout for Flash Erase */
153 #define CONFIG_SYS_FLASH_WRITE_TOUT (2*CONFIG_SYS_HZ) /* Timeout for Flash Write */
155 #define CONFIG_ENV_IS_IN_FLASH 1
156 #define CONFIG_ENV_ADDR (PHYS_FLASH_1 + 0x1C000) /* Addr of Environment Sector */
157 #define CONFIG_ENV_SIZE 0x4000 /* Total Size of Environment Sector */
159 #endif /* __CONFIG_H */