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1 /*
2 * Copyright (C) 2011 Ilya Yanok, Emcraft Systems
3 *
4 * Based on omap3_evm_config.h
5 *
6 * SPDX-License-Identifier: GPL-2.0+
7 */
8
9 #ifndef __CONFIG_H
10 #define __CONFIG_H
11
12 /*
13 * High Level Configuration Options
14 */
15 #define CONFIG_OMAP /* in a TI OMAP core */
16 #define CONFIG_OMAP3_MCX /* working with mcx */
17 #define CONFIG_OMAP_GPIO
18 #define CONFIG_OMAP_COMMON
19 /* Common ARM Erratas */
20 #define CONFIG_ARM_ERRATA_454179
21 #define CONFIG_ARM_ERRATA_430973
22 #define CONFIG_ARM_ERRATA_621766
23
24 #define MACH_TYPE_MCX 3656
25 #define CONFIG_MACH_TYPE MACH_TYPE_MCX
26 #define CONFIG_BOARD_LATE_INIT
27
28 #define CONFIG_EMIF4 /* The chip has EMIF4 controller */
29
30 #include <asm/arch/cpu.h> /* get chip and board defs */
31 #include <asm/arch/omap.h>
32
33 /*
34 * Leave it at 0x80008000 to allow booting new u-boot.bin with X-loader
35 * and older u-boot.bin with the new U-Boot SPL.
36 */
37 #define CONFIG_SYS_TEXT_BASE 0x80008000
38
39 /*
40 * Display CPU and Board information
41 */
42 #define CONFIG_DISPLAY_BOARDINFO
43
44 /* Clock Defines */
45 #define V_OSCK 26000000 /* Clock output from T2 */
46 #define V_SCLK (V_OSCK >> 1)
47
48 #define CONFIG_MISC_INIT_R
49
50 #define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */
51 #define CONFIG_SETUP_MEMORY_TAGS
52 #define CONFIG_INITRD_TAG
53 #define CONFIG_REVISION_TAG
54
55 /*
56 * Size of malloc() pool
57 */
58 #define CONFIG_ENV_SIZE (128 << 10) /* 128 KiB sector */
59 #define CONFIG_SYS_MALLOC_LEN (1024 << 10)
60 /*
61 * DDR related
62 */
63 #define CONFIG_SYS_CS0_SIZE (256 * 1024 * 1024)
64
65 /*
66 * Hardware drivers
67 */
68
69 /*
70 * NS16550 Configuration
71 */
72 #define V_NS16550_CLK 48000000 /* 48MHz (APLL96/2) */
73
74 #define CONFIG_SYS_NS16550_SERIAL
75 #define CONFIG_SYS_NS16550_REG_SIZE (-4)
76 #define CONFIG_SYS_NS16550_CLK V_NS16550_CLK
77
78 /*
79 * select serial console configuration
80 */
81 #define CONFIG_CONS_INDEX 3
82 #define CONFIG_SYS_NS16550_COM3 OMAP34XX_UART3
83 #define CONFIG_SERIAL3 3 /* UART3 */
84
85 /* allow to overwrite serial and ethaddr */
86 #define CONFIG_ENV_OVERWRITE
87 #define CONFIG_BAUDRATE 115200
88 #define CONFIG_SYS_BAUDRATE_TABLE {4800, 9600, 19200, 38400, 57600,\
89 115200}
90 #define CONFIG_MMC
91 #define CONFIG_OMAP_HSMMC
92 #define CONFIG_GENERIC_MMC
93 #define CONFIG_DOS_PARTITION
94
95 /* EHCI */
96 #define CONFIG_OMAP3_GPIO_2
97 #define CONFIG_OMAP3_GPIO_5
98 #define CONFIG_USB_EHCI
99 #define CONFIG_USB_EHCI_OMAP
100 #define CONFIG_OMAP_EHCI_PHY1_RESET_GPIO 57
101 #define CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS 3
102 #define CONFIG_USB_HOST_ETHER
103 #define CONFIG_USB_ETHER_ASIX
104 #define CONFIG_USB_ETHER_MCS7830
105
106 /* commands to include */
107 #define CONFIG_CMD_JFFS2 /* JFFS2 Support */
108
109 #define CONFIG_CMD_DATE
110 #define CONFIG_CMD_NAND /* NAND support */
111 #define CONFIG_CMD_UBIFS
112 #define CONFIG_RBTREE
113 #define CONFIG_LZO
114 #define CONFIG_MTD_PARTITIONS
115 #define CONFIG_MTD_DEVICE
116 #define CONFIG_CMD_MTDPARTS
117
118 #define CONFIG_SYS_NO_FLASH
119 #define CONFIG_SYS_I2C
120 #define CONFIG_SYS_OMAP24_I2C_SPEED 100000
121 #define CONFIG_SYS_OMAP24_I2C_SLAVE 1
122 #define CONFIG_SYS_I2C_OMAP34XX
123
124 /* RTC */
125 #define CONFIG_RTC_DS1337
126 #define CONFIG_SYS_I2C_RTC_ADDR 0x68
127
128 /*
129 * Board NAND Info.
130 */
131 #define CONFIG_SYS_NAND_ADDR NAND_BASE /* physical address */
132 /* to access nand */
133 #define CONFIG_SYS_NAND_BASE NAND_BASE /* physical address */
134 /* to access */
135 /* nand at CS0 */
136
137 #define CONFIG_SYS_MAX_NAND_DEVICE 1 /* Max number of */
138 /* NAND devices */
139 #define CONFIG_JFFS2_NAND
140 /* nand device jffs2 lives on */
141 #define CONFIG_JFFS2_DEV "nand0"
142 /* start of jffs2 partition */
143 #define CONFIG_JFFS2_PART_OFFSET 0x680000
144 #define CONFIG_JFFS2_PART_SIZE 0xf980000 /* sz of jffs2 part */
145
146 /* Environment information */
147
148 #define CONFIG_BOOTFILE "uImage"
149
150 /* Setup MTD for NAND on the SOM */
151 #define MTDIDS_DEFAULT "nand0=omap2-nand.0"
152 #define MTDPARTS_DEFAULT "mtdparts=omap2-nand.0:512k(MLO)," \
153 "1m(u-boot),256k(env1)," \
154 "256k(env2),6m(kernel),6m(k_recovery)," \
155 "8m(fs_recovery),-(common_data)"
156
157 #define CONFIG_HOSTNAME mcx
158 #define CONFIG_EXTRA_ENV_SETTINGS \
159 "adddbg=setenv bootargs ${bootargs} trace_buf_size=64M\0" \
160 "adddebug=setenv bootargs ${bootargs} earlyprintk=serial\0" \
161 "addeth=setenv bootargs ${bootargs} ethaddr=${ethaddr}\0" \
162 "addfb=setenv bootargs ${bootargs} vram=6M " \
163 "omapfb.vram=1:2M,2:2M,3:2M omapdss.def_disp=lcd\0" \
164 "addip_sta=setenv bootargs ${bootargs} " \
165 "ip=${ipaddr}:${serverip}:${gatewayip}:" \
166 "${netmask}:${hostname}:eth0:off\0" \
167 "addip_dyn=setenv bootargs ${bootargs} ip=dhcp\0" \
168 "addip=if test -n ${ipdyn};then run addip_dyn;" \
169 "else run addip_sta;fi\0" \
170 "addmisc=setenv bootargs ${bootargs} ${misc}\0" \
171 "addtty=setenv bootargs ${bootargs} " \
172 "console=${consoledev},${baudrate}\0" \
173 "addmtd=setenv bootargs ${bootargs} ${mtdparts}\0" \
174 "baudrate=115200\0" \
175 "consoledev=ttyO2\0" \
176 "hostname=" __stringify(CONFIG_HOSTNAME) "\0" \
177 "loadaddr=0x82000000\0" \
178 "load=tftp ${loadaddr} ${u-boot}\0" \
179 "load_k=tftp ${loadaddr} ${bootfile}\0" \
180 "loaduimage=fatload mmc 0 ${loadaddr} uImage\0" \
181 "loadmlo=tftp ${loadaddr} ${mlo}\0" \
182 "mlo=" __stringify(CONFIG_HOSTNAME) "/MLO\0" \
183 "mmcargs=root=/dev/mmcblk0p2 rw " \
184 "rootfstype=ext3 rootwait\0" \
185 "mmcboot=echo Booting from mmc ...; " \
186 "run mmcargs; " \
187 "run addip addtty addmtd addfb addeth addmisc;" \
188 "run loaduimage; " \
189 "bootm ${loadaddr}\0" \
190 "net_nfs=run load_k; " \
191 "run nfsargs; " \
192 "run addip addtty addmtd addfb addeth addmisc;" \
193 "bootm ${loadaddr}\0" \
194 "nfsargs=setenv bootargs root=/dev/nfs rw " \
195 "nfsroot=${serverip}:${rootpath}\0" \
196 "u-boot=" __stringify(CONFIG_HOSTNAME) "/u-boot.img\0" \
197 "uboot_addr=0x80000\0" \
198 "update=nandecc sw;nand erase ${uboot_addr} 100000;" \
199 "nand write ${loadaddr} ${uboot_addr} 80000\0" \
200 "updatemlo=nandecc hw;nand erase 0 20000;" \
201 "nand write ${loadaddr} 0 20000\0" \
202 "upd=if run load;then echo Updating u-boot;if run update;" \
203 "then echo U-Boot updated;" \
204 "else echo Error updating u-boot !;" \
205 "echo Board without bootloader !!;" \
206 "fi;" \
207 "else echo U-Boot not downloaded..exiting;fi\0" \
208 "loadbootscript=fatload mmc 0 ${loadaddr} boot.scr\0" \
209 "bootscript=echo Running bootscript from mmc ...; " \
210 "source ${loadaddr}\0" \
211 "nandargs=setenv bootargs ubi.mtd=7 " \
212 "root=ubi0:rootfs rootfstype=ubifs\0" \
213 "nandboot=echo Booting from nand ...; " \
214 "run nandargs; " \
215 "ubi part nand0,4;" \
216 "ubi readvol ${loadaddr} kernel;" \
217 "run addtty addmtd addfb addeth addmisc;" \
218 "bootm ${loadaddr}\0" \
219 "preboot=ubi part nand0,7;" \
220 "ubi readvol ${loadaddr} splash;" \
221 "bmp display ${loadaddr};" \
222 "gpio set 55\0" \
223 "swupdate_args=setenv bootargs root=/dev/ram " \
224 "quiet loglevel=1 " \
225 "consoleblank=0 ${swupdate_misc}\0" \
226 "swupdate=echo Running Sw-Update...;" \
227 "if printenv mtdparts;then echo Starting SwUpdate...; " \
228 "else mtdparts default;fi; " \
229 "ubi part nand0,5;" \
230 "ubi readvol 0x82000000 kernel_recovery;" \
231 "ubi part nand0,6;" \
232 "ubi readvol 0x84000000 fs_recovery;" \
233 "run swupdate_args; " \
234 "setenv bootargs ${bootargs} " \
235 "${mtdparts} " \
236 "vram=6M omapfb.vram=1:2M,2:2M,3:2M " \
237 "omapdss.def_disp=lcd;" \
238 "bootm 0x82000000 0x84000000\0" \
239 "bootcmd=mmc rescan;if fatload mmc 0 82000000 loadbootscr.scr;" \
240 "then source 82000000;else run nandboot;fi\0"
241
242 #define CONFIG_AUTO_COMPLETE
243 #define CONFIG_CMDLINE_EDITING
244
245 /*
246 * Miscellaneous configurable options
247 */
248 #define CONFIG_SYS_LONGHELP /* undef to save memory */
249 #define CONFIG_SYS_CBSIZE 1024/* Console I/O Buffer Size */
250 /* Print Buffer Size */
251 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \
252 sizeof(CONFIG_SYS_PROMPT) + 16)
253 #define CONFIG_SYS_MAXARGS 16 /* max number of command */
254 /* args */
255 /* Boot Argument Buffer Size */
256 #define CONFIG_SYS_BARGSIZE (CONFIG_SYS_CBSIZE)
257 /* memtest works on */
258 #define CONFIG_SYS_MEMTEST_START (OMAP34XX_SDRC_CS0)
259 #define CONFIG_SYS_MEMTEST_END (OMAP34XX_SDRC_CS0 + \
260 0x01F00000) /* 31MB */
261
262 #define CONFIG_SYS_LOAD_ADDR (OMAP34XX_SDRC_CS0) /* default load */
263 /* address */
264 #define CONFIG_PREBOOT
265
266 /*
267 * AM3517 has 12 GP timers, they can be driven by the system clock
268 * (12/13/16.8/19.2/38.4MHz) or by 32KHz clock. We use 13MHz (V_SCLK).
269 * This rate is divided by a local divisor.
270 */
271 #define CONFIG_SYS_TIMERBASE OMAP34XX_GPT2
272 #define CONFIG_SYS_PTV 2 /* Divisor: 2^(PTV+1) => 8 */
273
274 /*
275 * Physical Memory Map
276 */
277 #define CONFIG_NR_DRAM_BANKS 2 /* CS1 may or may not be populated */
278 #define PHYS_SDRAM_1 OMAP34XX_SDRC_CS0
279 #define PHYS_SDRAM_2 OMAP34XX_SDRC_CS1
280
281 /*
282 * FLASH and environment organization
283 */
284
285 /* **** PISMO SUPPORT *** */
286 #define CONFIG_NAND
287 #define CONFIG_SYS_NAND_BUSWIDTH_16BIT
288 #define CONFIG_NAND_OMAP_GPMC
289 #define CONFIG_NAND_OMAP_GPMC_PREFETCH
290 #define CONFIG_ENV_IS_IN_NAND
291 #define SMNAND_ENV_OFFSET 0x180000 /* environment starts here */
292
293 /* Redundant Environment */
294 #define CONFIG_SYS_ENV_SECT_SIZE (128 << 10) /* 128 KiB */
295 #define CONFIG_ENV_OFFSET SMNAND_ENV_OFFSET
296 #define CONFIG_ENV_ADDR SMNAND_ENV_OFFSET
297 #define CONFIG_ENV_OFFSET_REDUND (CONFIG_ENV_OFFSET + \
298 2 * CONFIG_SYS_ENV_SECT_SIZE)
299 #define CONFIG_ENV_SIZE_REDUND CONFIG_ENV_SIZE
300
301 /* Flash banks JFFS2 should use */
302 #define CONFIG_SYS_MAX_MTD_BANKS (CONFIG_SYS_MAX_FLASH_BANKS + \
303 CONFIG_SYS_MAX_NAND_DEVICE)
304 #define CONFIG_SYS_JFFS2_MEM_NAND
305 /* use flash_info[2] */
306 #define CONFIG_SYS_JFFS2_FIRST_BANK CONFIG_SYS_MAX_FLASH_BANKS
307 #define CONFIG_SYS_JFFS2_NUM_BANKS 1
308
309 #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1
310 #define CONFIG_SYS_INIT_RAM_ADDR 0x4020f800
311 #define CONFIG_SYS_INIT_RAM_SIZE 0x800
312 #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INIT_RAM_ADDR + \
313 CONFIG_SYS_INIT_RAM_SIZE - \
314 GENERATED_GBL_DATA_SIZE)
315
316 /* Defines for SPL */
317 #define CONFIG_SPL_FRAMEWORK
318 #define CONFIG_SPL_BOARD_INIT
319 #define CONFIG_SPL_NAND_SIMPLE
320
321 #define CONFIG_SPL_NAND_BASE
322 #define CONFIG_SPL_NAND_DRIVERS
323 #define CONFIG_SPL_NAND_ECC
324 #define CONFIG_SPL_LDSCRIPT "$(CPUDIR)/omap-common/u-boot-spl.lds"
325
326 #define CONFIG_SPL_TEXT_BASE 0x40200000 /*CONFIG_SYS_SRAM_START*/
327 #define CONFIG_SPL_MAX_SIZE (54 * 1024) /* 8 KB for stack */
328 #define CONFIG_SPL_STACK LOW_LEVEL_SRAM_STACK
329
330 /* move malloc and bss high to prevent clashing with the main image */
331 #define CONFIG_SYS_SPL_MALLOC_START 0x8f000000
332 #define CONFIG_SYS_SPL_MALLOC_SIZE 0x80000
333 #define CONFIG_SPL_BSS_START_ADDR 0x8f080000 /* end of RAM */
334 #define CONFIG_SPL_BSS_MAX_SIZE 0x80000
335
336 #define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 0x300 /* address 0x60000 */
337 #define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION 1
338 #define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME "u-boot.img"
339
340 /* NAND boot config */
341 #define CONFIG_SYS_NAND_PAGE_COUNT 64
342 #define CONFIG_SYS_NAND_PAGE_SIZE 2048
343 #define CONFIG_SYS_NAND_OOBSIZE 64
344 #define CONFIG_SYS_NAND_BLOCK_SIZE (128*1024)
345 #define CONFIG_SYS_NAND_5_ADDR_CYCLE
346 #define CONFIG_SYS_NAND_BAD_BLOCK_POS 0
347 #define CONFIG_SYS_NAND_ECCPOS {40, 41, 42, 43, 44, 45, 46, 47,\
348 48, 49, 50, 51, 52, 53, 54, 55,\
349 56, 57, 58, 59, 60, 61, 62, 63}
350 #define CONFIG_SYS_NAND_ECCSIZE 256
351 #define CONFIG_SYS_NAND_ECCBYTES 3
352 #define CONFIG_NAND_OMAP_ECCSCHEME OMAP_ECC_HAM1_CODE_SW
353 #define CONFIG_SPL_NAND_SOFTECC
354
355 #define CONFIG_SYS_NAND_U_BOOT_START CONFIG_SYS_TEXT_BASE
356
357 #define CONFIG_SYS_NAND_U_BOOT_OFFS 0x80000
358
359 /*
360 * ethernet support
361 *
362 */
363 #if defined(CONFIG_CMD_NET)
364 #define CONFIG_DRIVER_TI_EMAC
365 #define CONFIG_DRIVER_TI_EMAC_USE_RMII
366 #define CONFIG_MII
367 #define CONFIG_BOOTP_DNS
368 #define CONFIG_BOOTP_DNS2
369 #define CONFIG_BOOTP_SEND_HOSTNAME
370 #define CONFIG_NET_RETRY_COUNT 10
371 #endif
372
373 #define CONFIG_VIDEO
374 #define CONFIG_CFB_CONSOLE
375 #define CONFIG_VGA_AS_SINGLE_DEVICE
376 #define CONFIG_SPLASH_SCREEN
377 #define CONFIG_VIDEO_BMP_RLE8
378 #define CONFIG_CMD_BMP
379 #define CONFIG_VIDEO_OMAP3
380 #define CONFIG_SYS_CONSOLE_IS_IN_ENV
381
382 #endif /* __CONFIG_H */