include/configs/ms7750se.h

   1 /*
   2  * Configuation settings for the Hitachi Solution Engine 7750
   3  *
   4  * Copyright (C) 2007 Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
   5  *
   6  * SPDX-License-Identifier:     GPL-2.0+
   7  */
   8
   9 #ifndef __MS7750SE_H
  10 #define __MS7750SE_H
  11
  12 #define CONFIG_SH4              1
  13 #define CONFIG_CPU_SH7750       1
  14 /* #define CONFIG_CPU_SH7751    1 */
  15 /* #define CONFIG_CPU_TYPE_R    1 */
  16 #define CONFIG_MS7750SE         1
  17 #define __LITTLE_ENDIAN__       1
  18
  19 /*
  20  * Command line configuration.
  21  */
  22 /*#include <config_cmd_default.h>*/
  23
  24 #define CONFIG_CMD_FLASH
  25 #define CONFIG_CMD_SAVEENV
  26
  27 #define CONFIG_SCIF_CONSOLE     1
  28 #define CONFIG_BAUDRATE         38400
  29 #define CONFIG_CONS_SCIF1       1
  30 #define CONFIG_BOARD_LATE_INIT
  31
  32 #define CONFIG_BOOTDELAY        -1
  33 #define CONFIG_BOOTARGS         "console=ttySC0,38400"
  34 #define CONFIG_ENV_OVERWRITE    1
  35
  36 /* SDRAM */
  37 #define CONFIG_SYS_SDRAM_BASE           (0x8C000000)
  38 #define CONFIG_SYS_SDRAM_SIZE           (64 * 1024 * 1024)
  39
  40 #define CONFIG_SYS_LONGHELP
  41 #define CONFIG_SYS_CBSIZE               256
  42 #define CONFIG_SYS_PBSIZE               256
  43 #define CONFIG_SYS_MAXARGS              16
  44 #define CONFIG_SYS_BARGSIZE             512
  45
  46 #define CONFIG_SYS_TEXT_BASE            0x8FFC0000
  47 #define CONFIG_SYS_MEMTEST_START        (CONFIG_SYS_SDRAM_BASE)
  48 #define CONFIG_SYS_MEMTEST_END          (CONFIG_SYS_TEXT_BASE - 0x100000)
  49
  50 /* NOR Flash */
  51 /* #define CONFIG_SYS_FLASH_BASE                (0xA1000000)*/
  52 #define CONFIG_SYS_FLASH_BASE           (0xA0000000)
  53 #define CONFIG_SYS_MAX_FLASH_BANKS      (1)     /* Max number of
  54                                          * Flash memory banks
  55                                          */
  56 #define CONFIG_SYS_MAX_FLASH_SECT       142
  57 #define CONFIG_SYS_FLASH_BANKS_LIST     { CONFIG_SYS_FLASH_BASE }
  58
  59 #define CONFIG_SYS_LOAD_ADDR            (CONFIG_SYS_SDRAM_BASE + 4 * 1024 * 1024)
  60 #define CONFIG_SYS_MONITOR_BASE (CONFIG_SYS_FLASH_BASE) /* Address of u-boot image in Flash */
  61 #define CONFIG_SYS_MONITOR_LEN          (128 * 1024)
  62 #define CONFIG_SYS_MALLOC_LEN           (256 * 1024)            /* Size of DRAM reserved for malloc() use */
  63
  64 #define CONFIG_SYS_BOOTMAPSZ            (8 * 1024 * 1024)
  65 #define CONFIG_SYS_RX_ETH_BUFFER        (8)
  66
  67 #define CONFIG_SYS_FLASH_CFI
  68 #define CONFIG_FLASH_CFI_DRIVER
  69 #undef CONFIG_SYS_FLASH_CFI_BROKEN_TABLE
  70 #undef  CONFIG_SYS_FLASH_QUIET_TEST
  71 #define CONFIG_SYS_FLASH_EMPTY_INFO                             /* print 'E' for empty sector on flinfo */
  72
  73
  74 #define CONFIG_ENV_IS_IN_FLASH
  75 #define CONFIG_ENV_SECT_SIZE    0x20000
  76 #define CONFIG_ENV_SIZE         (CONFIG_ENV_SECT_SIZE)
  77 #define CONFIG_ENV_ADDR         (CONFIG_SYS_MONITOR_BASE + CONFIG_SYS_MONITOR_LEN)
  78 #define CONFIG_SYS_FLASH_ERASE_TOUT     120000
  79 #define CONFIG_SYS_FLASH_WRITE_TOUT     500
  80
  81 /* Board Clock */
  82 #define CONFIG_SYS_CLK_FREQ     33333333
  83 #define CONFIG_SH_TMU_CLK_FREQ CONFIG_SYS_CLK_FREQ
  84 #define CONFIG_SH_SCIF_CLK_FREQ CONFIG_SYS_CLK_FREQ
  85 #define CONFIG_SYS_TMU_CLK_DIV          4
  86
  87 #endif /* __MS7750SE_H */