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1 /*
2 * Copyright (C) 2008, Guennadi Liakhovetski <lg@denx.de>
3 *
4 * Configuration settings for the MX31ADS Freescale board.
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License as
8 * published by the Free Software Foundation; either version 2 of
9 * the License, or (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
19 * MA 02111-1307 USA
20 */
21
22 #ifndef __CONFIG_H
23 #define __CONFIG_H
24
25 #include <asm/arch/imx-regs.h>
26
27 /* High Level Configuration Options */
28 #define CONFIG_ARM1136 1 /* This is an arm1136 CPU core */
29 #define CONFIG_MX31 1 /* in a mx31 */
30 #define CONFIG_MX31_HCLK_FREQ 26000000 /* RedBoot says 26MHz */
31 #define CONFIG_MX31_CLK32 32768
32
33 #define CONFIG_DISPLAY_CPUINFO
34 #define CONFIG_DISPLAY_BOARDINFO
35
36 #define CONFIG_SYS_TEXT_BASE 0xA0000000
37
38 /*
39 * Disabled for now due to build problems under Debian and a significant increase
40 * in the final file size: 144260 vs. 109536 Bytes.
41 */
42 #if 0
43 #define CONFIG_OF_LIBFDT 1
44 #define CONFIG_FIT 1
45 #define CONFIG_FIT_VERBOSE 1
46 #endif
47
48 #define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */
49 #define CONFIG_SETUP_MEMORY_TAGS 1
50 #define CONFIG_INITRD_TAG 1
51
52 /*
53 * Size of malloc() pool
54 */
55 #define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 128 * 1024)
56
57 /*
58 * Hardware drivers
59 */
60
61 #define CONFIG_MXC_UART 1
62 #define CONFIG_SYS_MX31_UART1 1
63
64 #define CONFIG_HARD_SPI 1
65 #define CONFIG_MXC_SPI 1
66 #define CONFIG_DEFAULT_SPI_BUS 1
67 #define CONFIG_DEFAULT_SPI_MODE (SPI_MODE_0 | SPI_CS_HIGH)
68
69 #define CONFIG_FSL_PMIC
70 #define CONFIG_FSL_PMIC_BUS 1
71 #define CONFIG_FSL_PMIC_CS 0
72 #define CONFIG_FSL_PMIC_CLK 1000000
73 #define CONFIG_FSL_PMIC_MODE (SPI_MODE_0 | SPI_CS_HIGH)
74 #define CONFIG_RTC_MC13783 1
75
76 /* allow to overwrite serial and ethaddr */
77 #define CONFIG_ENV_OVERWRITE
78 #define CONFIG_CONS_INDEX 1
79 #define CONFIG_BAUDRATE 115200
80 #define CONFIG_SYS_BAUDRATE_TABLE {9600, 19200, 38400, 57600, 115200}
81
82 /***********************************************************
83 * Command definition
84 ***********************************************************/
85
86 #include <config_cmd_default.h>
87
88 #define CONFIG_CMD_PING
89 #define CONFIG_CMD_DHCP
90 #define CONFIG_CMD_SPI
91 #define CONFIG_CMD_DATE
92
93 #define CONFIG_BOOTDELAY 3
94
95 #define CONFIG_LOADADDR 0x80800000 /* loadaddr env var */
96
97 #define CONFIG_EXTRA_ENV_SETTINGS \
98 "netdev=eth0\0" \
99 "uboot_addr=0xa0000000\0" \
100 "uboot=mx31ads/u-boot.bin\0" \
101 "kernel=mx31ads/uImage\0" \
102 "nfsroot=/opt/eldk/arm\0" \
103 "bootargs_base=setenv bootargs console=ttymxc0,115200\0" \
104 "bootargs_nfs=setenv bootargs ${bootargs} root=/dev/nfs " \
105 "ip=dhcp nfsroot=${serverip}:${nfsroot},v3,tcp\0" \
106 "bootcmd=run bootcmd_net\0" \
107 "bootcmd_net=run bootargs_base bootargs_nfs; " \
108 "tftpboot ${loadaddr} ${kernel}; bootm\0" \
109 "prg_uboot=tftpboot ${loadaddr} ${uboot}; " \
110 "protect off ${uboot_addr} 0xa003ffff; " \
111 "erase ${uboot_addr} 0xa003ffff; " \
112 "cp.b ${loadaddr} ${uboot_addr} ${filesize}; " \
113 "setenv filesize; saveenv\0"
114
115 #define CONFIG_NET_MULTI
116 #define CONFIG_CS8900
117 #define CONFIG_CS8900_BASE 0xb4020300
118 #define CONFIG_CS8900_BUS16 1 /* follow the Linux driver */
119
120 /*
121 * The MX31ADS board seems to have a hardware "peculiarity" confirmed under
122 * U-Boot, RedBoot and Linux: the ethernet Rx signal is reaching the CS8900A
123 * controller inverted. The controller is capable of detecting and correcting
124 * this, but it needs 4 network packets for that. Which means, at startup, you
125 * will not receive answers to the first 4 packest, unless there have been some
126 * broadcasts on the network, or your board is on a hub. Reducing the ARP
127 * timeout from default 5 seconds to 200ms we speed up the initial TFTP
128 * transfer, should the user wish one, significantly.
129 */
130 #define CONFIG_ARP_TIMEOUT 200UL
131
132 /*
133 * Miscellaneous configurable options
134 */
135 #define CONFIG_SYS_LONGHELP /* undef to save memory */
136 #define CONFIG_SYS_PROMPT "=> "
137 #define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */
138 /* Print Buffer Size */
139 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
140 #define CONFIG_SYS_MAXARGS 16 /* max number of command args */
141 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */
142
143 #define CONFIG_SYS_MEMTEST_START 0 /* memtest works on */
144 #define CONFIG_SYS_MEMTEST_END 0x10000
145
146 #define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
147
148 #define CONFIG_SYS_HZ 1000
149
150 #define CONFIG_CMDLINE_EDITING 1
151
152 /*-----------------------------------------------------------------------
153 * Stack sizes
154 *
155 * The stack sizes are set up in start.S using the settings below
156 */
157 #define CONFIG_STACKSIZE (128 * 1024) /* regular stack */
158
159 /*-----------------------------------------------------------------------
160 * Physical Memory Map
161 */
162 #define CONFIG_NR_DRAM_BANKS 1
163 #define PHYS_SDRAM_1 CSD0_BASE
164 #define PHYS_SDRAM_1_SIZE (128 * 1024 * 1024)
165 #define CONFIG_BOARD_EARLY_INIT_F
166
167 #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1
168 #define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR
169 #define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE
170 #define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - \
171 GENERATED_GBL_DATA_SIZE)
172 #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INIT_RAM_ADDR + \
173 CONFIG_SYS_GBL_DATA_OFFSET)
174
175 /*-----------------------------------------------------------------------
176 * FLASH and environment organization
177 */
178 #define CONFIG_SYS_FLASH_BASE CS0_BASE
179 #define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max number of memory banks */
180 #define CONFIG_SYS_MAX_FLASH_SECT 262 /* max number of sectors on one chip */
181 #define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_FLASH_BASE /* Monitor at beginning of flash */
182 #define CONFIG_SYS_MONITOR_LEN (256 * 1024) /* Reserve 256KiB */
183
184 #define CONFIG_ENV_IS_IN_FLASH 1
185 #define CONFIG_ENV_SECT_SIZE (32 * 1024)
186 #define CONFIG_ENV_SIZE CONFIG_ENV_SECT_SIZE
187
188 /* Address and size of Redundant Environment Sector */
189 #define CONFIG_ENV_OFFSET_REDUND (CONFIG_ENV_OFFSET + CONFIG_ENV_SIZE)
190 #define CONFIG_ENV_SIZE_REDUND CONFIG_ENV_SIZE
191
192 /* S29WS256N NOR flash has 4 32KiB small sectors at the beginning and at the end.
193 * The rest of 32MiB is in 128KiB big sectors. U-Boot occupies the low 4 sectors,
194 * if we put environment next to it, we will have to occupy 128KiB for it.
195 * Putting it at the top of flash we use only 32KiB. */
196 #define CONFIG_ENV_ADDR (CONFIG_SYS_MONITOR_BASE + CONFIG_ENV_SECT_SIZE)
197
198 /*-----------------------------------------------------------------------
199 * CFI FLASH driver setup
200 */
201 #define CONFIG_SYS_FLASH_CFI 1 /* Flash memory is CFI compliant */
202 #define CONFIG_FLASH_CFI_DRIVER 1 /* Use drivers/cfi_flash.c */
203 #define CONFIG_FLASH_SPANSION_S29WS_N 1 /* A non-standard buffered write algorithm */
204 #define CONFIG_SYS_FLASH_USE_BUFFER_WRITE 1 /* Use buffered writes (~10x faster) */
205 #define CONFIG_SYS_FLASH_PROTECTION 1 /* Use hardware sector protection */
206
207 /*
208 * JFFS2 partitions
209 */
210 #undef CONFIG_CMD_MTDPARTS
211 #define CONFIG_JFFS2_DEV "nor0"
212
213 #endif /* __CONFIG_H */