include/configs/omap3_evm.h

   1 /*
   2  * (C) Copyright 2006-2008
   3  * Texas Instruments.
   4  * Author :
   5  *      Manikandan Pillai <mani.pillai@ti.com>
   6  * Derived from Beagle Board and 3430 SDP code by
   7  *      Richard Woodruff <r-woodruff2@ti.com>
   8  *      Syed Mohammed Khasim <khasim@ti.com>
   9  *
  10  * Manikandan Pillai <mani.pillai@ti.com>
  11  *
  12  * Configuration settings for the TI OMAP3 EVM board.
  13  *
  14  * See file CREDITS for list of people who contributed to this
  15  * project.
  16  *
  17  * This program is free software; you can redistribute it and/or
  18  * modify it under the terms of the GNU General Public License as
  19  * published by the Free Software Foundation; either version 2 of
  20  * the License, or (at your option) any later version.
  21  *
  22  * This program is distributed in the hope that it will be useful,
  23  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  24  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  25  * GNU General Public License for more details.
  26  *
  27  * You should have received a copy of the GNU General Public License
  28  * along with this program; if not, write to the Free Software
  29  * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  30  * MA 02111-1307 USA
  31  */
  32
  33 #ifndef __CONFIG_H
  34 #define __CONFIG_H
  35 #include <asm/sizes.h>
  36
  37 /*
  38  * High Level Configuration Options
  39  */
  40 #define CONFIG_ARMCORTEXA8      1       /* This is an ARM V7 CPU core */
  41 #define CONFIG_OMAP             1       /* in a TI OMAP core */
  42 #define CONFIG_OMAP34XX         1       /* which is a 34XX */
  43 #define CONFIG_OMAP3430         1       /* which is in a 3430 */
  44 #define CONFIG_OMAP3_EVM        1       /* working with EVM */
  45
  46 #include <asm/arch/cpu.h>       /* get chip and board defs */
  47 #include <asm/arch/omap3.h>
  48
  49 /*
  50  * Display CPU and Board information
  51  */
  52 #define CONFIG_DISPLAY_CPUINFO          1
  53 #define CONFIG_DISPLAY_BOARDINFO        1
  54
  55 /* Clock Defines */
  56 #define V_OSCK                  26000000        /* Clock output from T2 */
  57 #define V_SCLK                  (V_OSCK >> 1)
  58
  59 #undef CONFIG_USE_IRQ                   /* no support for IRQs */
  60 #define CONFIG_MISC_INIT_R
  61
  62 #define CONFIG_CMDLINE_TAG              1       /* enable passing of ATAGs */
  63 #define CONFIG_SETUP_MEMORY_TAGS        1
  64 #define CONFIG_INITRD_TAG               1
  65 #define CONFIG_REVISION_TAG             1
  66
  67 /*
  68  * Size of malloc() pool
  69  */
  70 #define CONFIG_ENV_SIZE                 SZ_128K /* Total Size Environment */
  71                                                 /* Sector */
  72 #define CONFIG_SYS_MALLOC_LEN           (CONFIG_ENV_SIZE + SZ_128K)
  73 #define CONFIG_SYS_GBL_DATA_SIZE        128     /* bytes reserved for */
  74                                                 /* initial data */
  75 /*
  76  * Hardware drivers
  77  */
  78
  79 /*
  80  * NS16550 Configuration
  81  */
  82 #define V_NS16550_CLK                   48000000        /* 48MHz (APLL96/2) */
  83
  84 #define CONFIG_SYS_NS16550
  85 #define CONFIG_SYS_NS16550_SERIAL
  86 #define CONFIG_SYS_NS16550_REG_SIZE     (-4)
  87 #define CONFIG_SYS_NS16550_CLK          V_NS16550_CLK
  88
  89 /*
  90  * select serial console configuration
  91  */
  92 #define CONFIG_CONS_INDEX               1
  93 #define CONFIG_SYS_NS16550_COM1         OMAP34XX_UART1
  94 #define CONFIG_SERIAL1                  1       /* UART1 on OMAP3 EVM */
  95
  96 /* allow to overwrite serial and ethaddr */
  97 #define CONFIG_ENV_OVERWRITE
  98 #define CONFIG_BAUDRATE                 115200
  99 #define CONFIG_SYS_BAUDRATE_TABLE       {4800, 9600, 19200, 38400, 57600,\
 100                                         115200}
 101 #define CONFIG_MMC                      1
 102 #define CONFIG_OMAP3_MMC                1
 103 #define CONFIG_DOS_PARTITION            1
 104
 105 /* commands to include */
 106 #include <config_cmd_default.h>
 107
 108 #define CONFIG_CMD_EXT2         /* EXT2 Support                 */
 109 #define CONFIG_CMD_FAT          /* FAT support                  */
 110 #define CONFIG_CMD_JFFS2        /* JFFS2 Support                */
 111
 112 #define CONFIG_CMD_I2C          /* I2C serial bus support       */
 113 #define CONFIG_CMD_MMC          /* MMC support                  */
 114 #define CONFIG_CMD_ONENAND      /* ONENAND support              */
 115 #define CONFIG_CMD_DHCP
 116 #define CONFIG_CMD_PING
 117
 118 #undef CONFIG_CMD_FLASH         /* flinfo, erase, protect       */
 119 #undef CONFIG_CMD_FPGA          /* FPGA configuration Support   */
 120 #undef CONFIG_CMD_IMI           /* iminfo                       */
 121 #undef CONFIG_CMD_IMLS          /* List all found images        */
 122
 123 #define CONFIG_SYS_NO_FLASH
 124 #define CONFIG_SYS_I2C_SPEED            100000
 125 #define CONFIG_SYS_I2C_SLAVE            1
 126 #define CONFIG_SYS_I2C_BUS              0
 127 #define CONFIG_SYS_I2C_BUS_SELECT       1
 128 #define CONFIG_DRIVER_OMAP34XX_I2C      1
 129
 130 /*
 131  * Board NAND Info.
 132  */
 133 #define CONFIG_SYS_NAND_ADDR            NAND_BASE       /* physical address */
 134                                                         /* to access nand */
 135 #define CONFIG_SYS_NAND_BASE            NAND_BASE       /* physical address */
 136                                                         /* to access */
 137                                                         /* nand at CS0 */
 138
 139 #define CONFIG_SYS_MAX_NAND_DEVICE      1               /* Max number of */
 140                                                         /* NAND devices */
 141
 142 #define CONFIG_JFFS2_NAND
 143 /* nand device jffs2 lives on */
 144 #define CONFIG_JFFS2_DEV                "nand0"
 145 /* start of jffs2 partition */
 146 #define CONFIG_JFFS2_PART_OFFSET        0x680000
 147 #define CONFIG_JFFS2_PART_SIZE          0xf980000       /* sz of jffs2 part */
 148
 149 /* Environment information */
 150 #define CONFIG_BOOTDELAY        10
 151
 152 #define CONFIG_EXTRA_ENV_SETTINGS \
 153         "loadaddr=0x82000000\0" \
 154         "console=ttyS2,115200n8\0" \
 155         "mmcargs=setenv bootargs console=${console} " \
 156                 "root=/dev/mmcblk0p2 rw " \
 157                 "rootfstype=ext3 rootwait\0" \
 158         "nandargs=setenv bootargs console=${console} " \
 159                 "root=/dev/mtdblock4 rw " \
 160                 "rootfstype=jffs2\0" \
 161         "loadbootscript=fatload mmc 0 ${loadaddr} boot.scr\0" \
 162         "bootscript=echo Running bootscript from mmc ...; " \
 163                 "source ${loadaddr}\0" \
 164         "loaduimage=fatload mmc 0 ${loadaddr} uImage\0" \
 165         "mmcboot=echo Booting from mmc ...; " \
 166                 "run mmcargs; " \
 167                 "bootm ${loadaddr}\0" \
 168         "nandboot=echo Booting from nand ...; " \
 169                 "run nandargs; " \
 170                 "onenand read ${loadaddr} 280000 400000; " \
 171                 "bootm ${loadaddr}\0" \
 172
 173 #define CONFIG_BOOTCOMMAND \
 174         "if mmc init; then " \
 175                 "if run loadbootscript; then " \
 176                         "run bootscript; " \
 177                 "else " \
 178                         "if run loaduimage; then " \
 179                                 "run mmcboot; " \
 180                         "else run nandboot; " \
 181                         "fi; " \
 182                 "fi; " \
 183         "else run nandboot; fi"
 184
 185 #define CONFIG_AUTO_COMPLETE    1
 186 /*
 187  * Miscellaneous configurable options
 188  */
 189 #define V_PROMPT                "OMAP3_EVM # "
 190
 191 #define CONFIG_SYS_LONGHELP             /* undef to save memory */
 192 #define CONFIG_SYS_HUSH_PARSER          /* use "hush" command parser */
 193 #define CONFIG_SYS_PROMPT_HUSH_PS2      "> "
 194 #define CONFIG_SYS_PROMPT               V_PROMPT
 195 #define CONFIG_SYS_CBSIZE               256     /* Console I/O Buffer Size */
 196 /* Print Buffer Size */
 197 #define CONFIG_SYS_PBSIZE               (CONFIG_SYS_CBSIZE + \
 198                                         sizeof(CONFIG_SYS_PROMPT) + 16)
 199 #define CONFIG_SYS_MAXARGS              16      /* max number of command */
 200                                                 /* args */
 201 /* Boot Argument Buffer Size */
 202 #define CONFIG_SYS_BARGSIZE             (CONFIG_SYS_CBSIZE)
 203 /* memtest works on */
 204 #define CONFIG_SYS_MEMTEST_START        (OMAP34XX_SDRC_CS0)
 205 #define CONFIG_SYS_MEMTEST_END          (OMAP34XX_SDRC_CS0 + \
 206                                         0x01F00000) /* 31MB */
 207
 208 #define CONFIG_SYS_LOAD_ADDR            (OMAP34XX_SDRC_CS0) /* default load */
 209                                                                 /* address */
 210
 211 /*
 212  * OMAP3 has 12 GP timers, they can be driven by the system clock
 213  * (12/13/16.8/19.2/38.4MHz) or by 32KHz clock. We use 13MHz (V_SCLK).
 214  * This rate is divided by a local divisor.
 215  */
 216 #define CONFIG_SYS_TIMERBASE            OMAP34XX_GPT2
 217 #define CONFIG_SYS_PTV                  2       /* Divisor: 2^(PTV+1) => 8 */
 218 #define CONFIG_SYS_HZ                   1000
 219
 220 /*-----------------------------------------------------------------------
 221  * Stack sizes
 222  *
 223  * The stack sizes are set up in start.S using the settings below
 224  */
 225 #define CONFIG_STACKSIZE        SZ_128K /* regular stack */
 226 #ifdef CONFIG_USE_IRQ
 227 #define CONFIG_STACKSIZE_IRQ    SZ_4K   /* IRQ stack */
 228 #define CONFIG_STACKSIZE_FIQ    SZ_4K   /* FIQ stack */
 229 #endif
 230
 231 /*-----------------------------------------------------------------------
 232  * Physical Memory Map
 233  */
 234 #define CONFIG_NR_DRAM_BANKS    2       /* CS1 may or may not be populated */
 235 #define PHYS_SDRAM_1            OMAP34XX_SDRC_CS0
 236 #define PHYS_SDRAM_1_SIZE       SZ_32M  /* at least 32 meg */
 237 #define PHYS_SDRAM_2            OMAP34XX_SDRC_CS1
 238
 239 /* SDRAM Bank Allocation method */
 240 #define SDRC_R_B_C              1
 241
 242 /*-----------------------------------------------------------------------
 243  * FLASH and environment organization
 244  */
 245
 246 /* **** PISMO SUPPORT *** */
 247
 248 /* Configure the PISMO */
 249 #define PISMO1_NAND_SIZE                GPMC_SIZE_128M
 250 #define PISMO1_ONEN_SIZE                GPMC_SIZE_128M
 251
 252 #define CONFIG_SYS_MAX_FLASH_SECT       520     /* max number of sectors */
 253                                                 /* on one chip */
 254 #define CONFIG_SYS_MAX_FLASH_BANKS      2       /* max number of flash banks */
 255 #define CONFIG_SYS_MONITOR_LEN          SZ_256K /* Reserve 2 sectors */
 256
 257 #define CONFIG_SYS_FLASH_BASE           boot_flash_base
 258
 259 /* Monitor at start of flash */
 260 #define CONFIG_SYS_MONITOR_BASE         CONFIG_SYS_FLASH_BASE
 261 #define CONFIG_SYS_ONENAND_BASE         ONENAND_MAP
 262
 263 #define CONFIG_ENV_IS_IN_ONENAND        1
 264 #define ONENAND_ENV_OFFSET              0x260000 /* environment starts here */
 265 #define SMNAND_ENV_OFFSET               0x260000 /* environment starts here */
 266
 267 #define CONFIG_SYS_ENV_SECT_SIZE        boot_flash_sec
 268 #define CONFIG_ENV_OFFSET               boot_flash_off
 269 #define CONFIG_ENV_ADDR                 boot_flash_env_addr
 270
 271 /*-----------------------------------------------------------------------
 272  * CFI FLASH driver setup
 273  */
 274 /* timeout values are in ticks */
 275 #define CONFIG_SYS_FLASH_ERASE_TOUT     (100 * CONFIG_SYS_HZ)
 276 #define CONFIG_SYS_FLASH_WRITE_TOUT     (100 * CONFIG_SYS_HZ)
 277
 278 /* Flash banks JFFS2 should use */
 279 #define CONFIG_SYS_MAX_MTD_BANKS        (CONFIG_SYS_MAX_FLASH_BANKS + \
 280                                         CONFIG_SYS_MAX_NAND_DEVICE)
 281 #define CONFIG_SYS_JFFS2_MEM_NAND
 282 /* use flash_info[2] */
 283 #define CONFIG_SYS_JFFS2_FIRST_BANK     CONFIG_SYS_MAX_FLASH_BANKS
 284 #define CONFIG_SYS_JFFS2_NUM_BANKS      1
 285
 286 #ifndef __ASSEMBLY__
 287 extern gpmc_csx_t *nand_cs_base;
 288 extern gpmc_t *gpmc_cfg_base;
 289 extern unsigned int boot_flash_base;
 290 extern volatile unsigned int boot_flash_env_addr;
 291 extern unsigned int boot_flash_off;
 292 extern unsigned int boot_flash_sec;
 293 extern unsigned int boot_flash_type;
 294 #endif
 295
 296 /*----------------------------------------------------------------------------
 297  * SMSC9115 Ethernet from SMSC9118 family
 298  *----------------------------------------------------------------------------
 299  */
 300 #if defined(CONFIG_CMD_NET)
 301
 302 #define CONFIG_DRIVER_SMC911X
 303 #define CONFIG_DRIVER_SMC911X_32_BIT
 304 #define CONFIG_DRIVER_SMC911X_BASE      0x2C000000
 305
 306 #endif /* (CONFIG_CMD_NET) */
 307
 308 /*
 309  * BOOTP fields
 310  */
 311
 312 #define CONFIG_BOOTP_SUBNETMASK         0x00000001
 313 #define CONFIG_BOOTP_GATEWAY            0x00000002
 314 #define CONFIG_BOOTP_HOSTNAME           0x00000004
 315 #define CONFIG_BOOTP_BOOTPATH           0x00000010
 316
 317 #endif /* __CONFIG_H */