include/configs/sama5d3xek.h

   1 /*
   2  * Configuation settings for the SAMA5D3xEK board.
   3  *
   4  * Copyright (C) 2012 - 2013 Atmel
   5  *
   6  * based on at91sam9m10g45ek.h by:
   7  * Stelian Pop <stelian@popies.net>
   8  * Lead Tech Design <www.leadtechdesign.com>
   9  *
  10  * SPDX-License-Identifier:     GPL-2.0+
  11  */
  12
  13 #ifndef __CONFIG_H
  14 #define __CONFIG_H
  15
  16 #include "at91-sama5_common.h"
  17
  18 #define CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG
  19
  20 /*
  21  * This needs to be defined for the OHCI code to work but it is defined as
  22  * ATMEL_ID_UHPHS in the CPU specific header files.
  23  */
  24 #define ATMEL_ID_UHP                    ATMEL_ID_UHPHS
  25
  26 /*
  27  * Specify the clock enable bit in the PMC_SCER register.
  28  */
  29 #define ATMEL_PMC_UHP                   AT91SAM926x_PMC_UHP
  30
  31 /* LCD */
  32 #define LCD_BPP                         LCD_COLOR16
  33 #define LCD_OUTPUT_BPP                  24
  34 #define CONFIG_LCD_LOGO
  35 #define CONFIG_LCD_INFO
  36 #define CONFIG_LCD_INFO_BELOW_LOGO
  37 #define CONFIG_SYS_WHITE_ON_BLACK
  38 #define CONFIG_ATMEL_HLCD
  39 #define CONFIG_ATMEL_LCD_RGB565
  40
  41 /* board specific (not enough SRAM) */
  42 #define CONFIG_SAMA5D3_LCD_BASE         0x23E00000
  43
  44 /* NOR flash */
  45 #ifdef CONFIG_MTD_NOR_FLASH
  46 #define CONFIG_FLASH_CFI_DRIVER
  47 #define CONFIG_SYS_FLASH_CFI
  48 #define CONFIG_SYS_FLASH_PROTECTION
  49 #define CONFIG_SYS_FLASH_BASE           0x10000000
  50 #define CONFIG_SYS_MAX_FLASH_SECT       131
  51 #define CONFIG_SYS_MAX_FLASH_BANKS      1
  52 #endif
  53
  54 /* SDRAM */
  55 #define CONFIG_NR_DRAM_BANKS            1
  56 #define CONFIG_SYS_SDRAM_BASE           ATMEL_BASE_DDRCS
  57 #define CONFIG_SYS_SDRAM_SIZE           0x20000000
  58
  59 #ifdef CONFIG_SPL_BUILD
  60 #define CONFIG_SYS_INIT_SP_ADDR         0x318000
  61 #else
  62 #define CONFIG_SYS_INIT_SP_ADDR \
  63         (CONFIG_SYS_SDRAM_BASE + 16 * 1024 - GENERATED_GBL_DATA_SIZE)
  64 #endif
  65
  66 /* SerialFlash */
  67
  68 #ifdef CONFIG_CMD_SF
  69 #define CONFIG_SF_DEFAULT_SPEED         30000000
  70 #endif
  71
  72 /* NAND flash */
  73 #define CONFIG_CMD_NAND
  74
  75 #ifdef CONFIG_CMD_NAND
  76 #define CONFIG_NAND_ATMEL
  77 #define CONFIG_SYS_MAX_NAND_DEVICE      1
  78 #define CONFIG_SYS_NAND_BASE            ATMEL_BASE_CS3
  79 /* our ALE is AD21 */
  80 #define CONFIG_SYS_NAND_MASK_ALE        (1 << 21)
  81 /* our CLE is AD22 */
  82 #define CONFIG_SYS_NAND_MASK_CLE        (1 << 22)
  83 #define CONFIG_SYS_NAND_ONFI_DETECTION
  84 /* PMECC & PMERRLOC */
  85 #define CONFIG_ATMEL_NAND_HWECC
  86 #define CONFIG_ATMEL_NAND_HW_PMECC
  87 #define CONFIG_PMECC_CAP                4
  88 #define CONFIG_PMECC_SECTOR_SIZE        512
  89 #define CONFIG_CMD_NAND_TRIMFFS
  90 #endif
  91
  92 #define CONFIG_PHY_MICREL_KSZ9021
  93
  94 /* USB */
  95
  96 #ifdef CONFIG_CMD_USB
  97 #define CONFIG_USB_ATMEL_CLK_SEL_UPLL
  98 #define CONFIG_USB_OHCI_NEW
  99 #define CONFIG_SYS_USB_OHCI_CPU_INIT
 100 #define CONFIG_SYS_USB_OHCI_REGS_BASE           ATMEL_BASE_OHCI
 101 #define CONFIG_SYS_USB_OHCI_SLOT_NAME           "sama5d3"
 102 #define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS      3
 103 #endif
 104
 105 #if defined(CONFIG_CMD_USB) || defined(CONFIG_CMD_MMC)
 106 #define CONFIG_FAT_WRITE
 107 #endif
 108
 109 #define CONFIG_SYS_LOAD_ADDR                    0x22000000 /* load address */
 110
 111 #ifdef CONFIG_SYS_USE_SERIALFLASH
 112 /* override the bootcmd, bootargs and other configuration for spi flash env*/
 113 #elif CONFIG_SYS_USE_NANDFLASH
 114 /* override the bootcmd, bootargs and other configuration nandflash env */
 115 #elif CONFIG_SYS_USE_MMC
 116 /* override the bootcmd, bootargs and other configuration for sd/mmc env */
 117 #else
 118 #define CONFIG_ENV_IS_NOWHERE
 119 #endif
 120
 121 /* SPL */
 122 #define CONFIG_SPL_FRAMEWORK
 123 #define CONFIG_SPL_TEXT_BASE            0x300000
 124 #define CONFIG_SPL_MAX_SIZE             0x18000
 125 #define CONFIG_SPL_BSS_START_ADDR       0x20000000
 126 #define CONFIG_SPL_BSS_MAX_SIZE         0x80000
 127 #define CONFIG_SYS_SPL_MALLOC_START     0x20080000
 128 #define CONFIG_SYS_SPL_MALLOC_SIZE      0x80000
 129
 130 #define CONFIG_SPL_BOARD_INIT
 131 #define CONFIG_SYS_MONITOR_LEN          (512 << 10)
 132
 133 #ifdef CONFIG_SYS_USE_MMC
 134 #define CONFIG_SPL_LDSCRIPT             arch/arm/mach-at91/armv7/u-boot-spl.lds
 135 #define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION      1
 136 #define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME "u-boot.img"
 137
 138 #elif CONFIG_SYS_USE_NANDFLASH
 139 #define CONFIG_SPL_NAND_DRIVERS
 140 #define CONFIG_SPL_NAND_BASE
 141 #define CONFIG_SYS_NAND_U_BOOT_OFFS     0x40000
 142 #define CONFIG_SYS_NAND_5_ADDR_CYCLE
 143 #define CONFIG_SYS_NAND_PAGE_SIZE       0x800
 144 #define CONFIG_SYS_NAND_PAGE_COUNT      64
 145 #define CONFIG_SYS_NAND_OOBSIZE         64
 146 #define CONFIG_SYS_NAND_BLOCK_SIZE      0x20000
 147 #define CONFIG_SYS_NAND_BAD_BLOCK_POS   0x0
 148 #define CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER
 149
 150 #elif CONFIG_SYS_USE_SERIALFLASH
 151 #define CONFIG_SPL_SPI_LOAD
 152 #define CONFIG_SYS_SPI_U_BOOT_OFFS      0x10000
 153
 154 #endif
 155
 156 #endif