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sbc35_a9g20: update board to the new AT91 organization
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1 /*
2 * Copyright (C) 2009
3 * Albin Tonnerre, Free Electrons <albin.tonnerre@free-electrons.com>
4 *
5 * Configuation settings for the Calao SBC35-A9G20 board
6 *
7 * See file CREDITS for list of people who contributed to this
8 * project.
9 *
10 * This program is free software; you can redistribute it and/or
11 * modify it under the terms of the GNU General Public License as
12 * published by the Free Software Foundation; either version 2 of
13 * the License, or (at your option) any later version.
14 *
15 * This program is distributed in the hope that it will be useful,
16 * but WITHOUT ANY WARRANTY; without even the implied warranty of
17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
18 * GNU General Public License for more details.
19 *
20 * You should have received a copy of the GNU General Public License
21 * along with this program; if not, write to the Free Software
22 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
23 * MA 02111-1307 USA
24 */
25
26 #ifndef __CONFIG_H
27 #define __CONFIG_H
28
29 /* SoC type is defined in boards.cfg */
30 #include <asm/hardware.h>
31 #include <asm/sizes.h>
32
33 #if defined(CONFIG_SYS_USE_NANDFLASH)
34 #define CONFIG_ENV_IS_IN_NAND
35 #else
36 #define CONFIG_ENV_IS_IN_EEPROM
37 #endif
38
39 /* ARM asynchronous clock */
40 #define CONFIG_SYS_AT91_SLOW_CLOCK 32768 /* slow clock xtal */
41 #define CONFIG_SYS_AT91_MAIN_CLOCK 12000000 /* 12.000 MHz crystal */
42 #define CONFIG_SYS_HZ 1000
43
44 #define CONFIG_ARCH_CPU_INIT
45 #undef CONFIG_USE_IRQ /* we don't need IRQ/FIQ stuff */
46
47 #define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */
48 #define CONFIG_SETUP_MEMORY_TAGS
49 #define CONFIG_INITRD_TAG
50 #define CONFIG_SKIP_LOWLEVEL_INIT
51
52 /* GPIO */
53 #define CONFIG_ATMEL_LEGACY /* required until (g)pio is fixed */
54 #define CONFIG_AT91_GPIO
55
56 /* Serial */
57 #define CONFIG_ATMEL_USART
58 #define CONFIG_USART_BASE ATMEL_BASE_DBGU
59 #define CONFIG_USART_ID ATMEL_ID_SYS
60 #define CONFIG_BAUDRATE 115200
61 #define CONFIG_SYS_BAUDRATE_TABLE {115200 , 19200, 38400, 57600, 9600 }
62
63 #define CONFIG_BOOTDELAY 3
64
65 /*
66 * BOOTP options
67 */
68 #define CONFIG_BOOTP_BOOTFILESIZE
69 #define CONFIG_BOOTP_BOOTPATH
70 #define CONFIG_BOOTP_GATEWAY
71 #define CONFIG_BOOTP_HOSTNAME
72
73 /*
74 * Command line configuration.
75 */
76 #include <config_cmd_default.h>
77 #undef CONFIG_CMD_BDI
78 #undef CONFIG_CMD_FPGA
79 #undef CONFIG_CMD_IMI
80 #undef CONFIG_CMD_IMLS
81 #undef CONFIG_CMD_LOADS
82 #undef CONFIG_CMD_SOURCE
83
84 #define CONFIG_CMD_PING
85 #define CONFIG_CMD_DHCP
86 #define CONFIG_CMD_USB
87
88 /* SDRAM */
89 #define CONFIG_NR_DRAM_BANKS 1
90 #define CONFIG_SYS_SDRAM_BASE ATMEL_BASE_CS1
91 #define CONFIG_SYS_SDRAM_SIZE 0x04000000 /* 64 megs */
92 #define CONFIG_SYS_INIT_SP_ADDR (ATMEL_BASE_SRAM1 + 0x1000 - \
93 GENERATED_GBL_DATA_SIZE)
94
95 /* SPI EEPROM */
96 #define CONFIG_SPI
97 #define CONFIG_CMD_SPI
98 #define CONFIG_ATMEL_SPI
99 #define CONFIG_SYS_SPI_WRITE_TOUT (5 * CONFIG_SYS_HZ)
100
101 #define CONFIG_CMD_EEPROM
102 #define CONFIG_SPI_M95XXX
103 #define CONFIG_SYS_EEPROM_SIZE 0x10000
104 #define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 5
105
106 /* SPI RTC */
107 #define CONFIG_CMD_DATE
108 #define CONFIG_RTC_M41T94
109 #define CONFIG_M41T94_SPI_BUS 0
110 #define CONFIG_M41T94_SPI_CS 0
111
112 /* NAND flash */
113 #define CONFIG_CMD_NAND
114 #define CONFIG_NAND_ATMEL
115 #define CONFIG_SYS_MAX_NAND_DEVICE 1
116 #define CONFIG_SYS_NAND_BASE 0x40000000
117 #define CONFIG_SYS_NAND_DBW_8
118 /* our ALE is AD21 */
119 #define CONFIG_SYS_NAND_MASK_ALE (1 << 21)
120 /* our CLE is AD22 */
121 #define CONFIG_SYS_NAND_MASK_CLE (1 << 22)
122 #define CONFIG_SYS_NAND_ENABLE_PIN AT91_PIN_PC14
123 #define CONFIG_SYS_NAND_READY_PIN AT91_PIN_PC13
124
125 /* NOR flash - no real flash on this board */
126 #define CONFIG_SYS_NO_FLASH 1
127
128 /* Ethernet */
129 #define CONFIG_MACB
130 #define CONFIG_RMII
131 #define CONFIG_NET_MULTI
132 #define CONFIG_NET_RETRY_COUNT 20
133 #define CONFIG_RESET_PHY_R
134 #define CONFIG_MACB_SEARCH_PHY
135
136 /* USB */
137 #define CONFIG_USB_ATMEL
138 #define CONFIG_USB_OHCI_NEW
139 #define CONFIG_DOS_PARTITION
140 #define CONFIG_SYS_USB_OHCI_CPU_INIT
141 #define CONFIG_SYS_USB_OHCI_REGS_BASE 0x00500000 /* AT91SAM9260_UHP_BASE */
142 #define CONFIG_SYS_USB_OHCI_SLOT_NAME "at91sam9260"
143 #define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 2
144 #define CONFIG_USB_STORAGE
145 #define CONFIG_CMD_FAT
146
147 #define CONFIG_SYS_LOAD_ADDR 0x22000000 /* load address */
148
149 #define CONFIG_SYS_MEMTEST_START CONFIG_SYS_SDRAM_BASE
150 #define CONFIG_SYS_MEMTEST_END 0x23e00000
151
152 /* Env in EEPROM, bootstrap + u-boot in NAND*/
153 #ifdef CONFIG_ENV_IS_IN_EEPROM
154 #define CONFIG_ENV_OFFSET 0x20
155 #define CONFIG_ENV_SIZE 0x1000
156 #endif
157
158 /* Env, bootstrap and u-boot in NAND */
159 #ifdef CONFIG_ENV_IS_IN_NAND
160 #define CONFIG_ENV_OFFSET 0x60000
161 #define CONFIG_ENV_OFFSET_REDUND 0x80000
162 #define CONFIG_ENV_SIZE 0x20000
163 #endif
164
165 #define CONFIG_BOOTCOMMAND "nboot 0x21000000 0 400000"
166 #define CONFIG_BOOTARGS "console=ttyS0,115200 " \
167 "root=/dev/mtdblock1 " \
168 "mtdparts=atmel_nand:16M(kernel)ro," \
169 "120M(rootfs),-(other) " \
170 "rw rootfstype=jffs2"
171
172
173 #define CONFIG_SYS_PROMPT "U-Boot> "
174 #define CONFIG_SYS_CBSIZE 256
175 #define CONFIG_SYS_MAXARGS 16
176 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
177 #define CONFIG_SYS_LONGHELP 1
178 #define CONFIG_CMDLINE_EDITING 1
179
180 /*
181 * Size of malloc() pool
182 */
183 #define CONFIG_SYS_MALLOC_LEN ROUND(3 * CONFIG_ENV_SIZE + 128 * 1024, 0x1000)
184 #define CONFIG_STACKSIZE (32 * 1024) /* regular stack */
185
186 #ifdef CONFIG_USE_IRQ
187 #error CONFIG_USE_IRQ not supported
188 #endif
189
190 #endif