include/configs/sc520_cdp.h

   1 /*
   2  * (C) Copyright 2002
   3  * Daniel Engström, Omicron Ceti AB, daniel@omicron.se.
   4  *
   5  * See file CREDITS for list of people who contributed to this
   6  * project.
   7  *
   8  * This program is free software; you can redistribute it and/or
   9  * modify it under the terms of the GNU General Public License as
  10  * published by the Free Software Foundation; either version 2 of
  11  * the License, or (at your option) any later version.
  12  *
  13  * This program is distributed in the hope that it will be useful,
  14  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  15  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  16  * GNU General Public License for more details.
  17  *
  18  * You should have received a copy of the GNU General Public License
  19  * along with this program; if not, write to the Free Software
  20  * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  21  * MA 02111-1307 USA
  22  */
  23
  24 /*
  25  * board/config.h - configuration options, board specific
  26  */
  27
  28 #ifndef __CONFIG_H
  29 #define __CONFIG_H
  30
  31 #define GRUSS_TESTING
  32 /*
  33  * High Level Configuration Options
  34  * (easy to change)
  35  */
  36
  37 #define CONFIG_X86              1       /* This is a X86 CPU            */
  38 #define CONFIG_SC520            1       /* Include support for AMD SC520 */
  39 #define CONFIG_ALI152X          1       /* Include support for Ali 152x SIO */
  40
  41 #define CONFIG_SYS_SDRAM_PRECHARGE_DELAY 6     /* 6T */
  42 #define CONFIG_SYS_SDRAM_REFRESH_RATE    78    /* 7.8uS (choices are 7.8, 15.6, 31.2 or 62.5uS) */
  43 #define CONFIG_SYS_SDRAM_RAS_CAS_DELAY   3     /* 3T */
  44
  45 /* define at most one of these */
  46 #undef CONFIG_SYS_SDRAM_CAS_LATENCY_2T
  47 #define CONFIG_SYS_SDRAM_CAS_LATENCY_3T
  48
  49 #define CONFIG_SYS_SC520_HIGH_SPEED    0       /* 100 or 133MHz */
  50 #define CONFIG_SYS_RESET_GENERIC       1       /* use tripple-fault to reset cpu */
  51 #undef  CONFIG_SYS_RESET_SC520                 /* use SC520 MMCR's to reset cpu */
  52 #undef  CONFIG_SYS_TIMER_SC520                 /* use SC520 swtimers */
  53 #define CONFIG_SYS_TIMER_GENERIC       1       /* use the i8254 PIT timers */
  54 #undef  CONFIG_SYS_TIMER_TSC                   /* use the Pentium TSC timers */
  55 #define  CONFIG_SYS_USE_SIO_UART       0       /* prefer the uarts on the SIO to those
  56                                          * in the SC520 on the CDP */
  57
  58 #define CONFIG_SYS_STACK_SIZE          0x8000  /* Size of bootloader stack */
  59
  60 #define CONFIG_SHOW_BOOT_PROGRESS 1
  61 #define CONFIG_LAST_STAGE_INIT    1
  62
  63 /*
  64  * Size of malloc() pool
  65  */
  66 #define CONFIG_MALLOC_SIZE      (CONFIG_ENV_SIZE + 128*1024)
  67
  68 #define CONFIG_BAUDRATE         9600
  69
  70 /*
  71  * BOOTP options
  72  */
  73 #define CONFIG_BOOTP_BOOTFILESIZE
  74 #define CONFIG_BOOTP_BOOTPATH
  75 #define CONFIG_BOOTP_GATEWAY
  76 #define CONFIG_BOOTP_HOSTNAME
  77
  78
  79 /*
  80  * Command line configuration.
  81  */
  82 #include <config_cmd_default.h>
  83
  84 #define CONFIG_CMD_PCI
  85 #ifndef GRUSS_TESTING
  86 #define CONFIG_CMD_SATA
  87 #else
  88 #undef CONFIG_CMD_SATA
  89 #endif
  90 #define CONFIG_CMD_JFFS2
  91 #define CONFIG_CMD_NET
  92 #define CONFIG_CMD_EEPROM
  93
  94 #define CONFIG_BOOTDELAY        15
  95 #define CONFIG_BOOTARGS         "root=/dev/mtdblock0 console=ttyS0,9600"
  96 /* #define CONFIG_BOOTCOMMAND   "bootm 38000000" */
  97
  98 #if defined(CONFIG_CMD_KGDB)
  99 #define CONFIG_KGDB_BAUDRATE    115200          /* speed to run kgdb serial port */
 100 #define CONFIG_KGDB_SER_INDEX   2               /* which serial port to use */
 101 #endif
 102
 103 /*
 104  * Miscellaneous configurable options
 105  */
 106 #define CONFIG_SYS_LONGHELP                             /* undef to save memory         */
 107 #define CONFIG_SYS_PROMPT               "boot > "       /* Monitor Command Prompt       */
 108 #define CONFIG_SYS_CBSIZE               256             /* Console I/O Buffer Size      */
 109 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) /* Print Buffer Size */
 110 #define CONFIG_SYS_MAXARGS              16              /* max number of command args   */
 111 #define CONFIG_SYS_BARGSIZE             CONFIG_SYS_CBSIZE       /* Boot Argument Buffer Size    */
 112
 113 #define CONFIG_SYS_MEMTEST_START        0x00100000      /* memtest works on     */
 114 #define CONFIG_SYS_MEMTEST_END          0x01000000      /* 1 ... 16 MB in DRAM  */
 115
 116 #undef  CONFIG_SYS_CLKS_IN_HZ           /* everything, incl board info, in Hz */
 117
 118 #define CONFIG_SYS_LOAD_ADDR            0x100000        /* default load address */
 119
 120 #define CONFIG_SYS_HZ                   1024            /* incrementer freq: 1kHz */
 121
 122                                                 /* valid baudrates */
 123 #define CONFIG_SYS_BAUDRATE_TABLE       { 9600, 19200, 38400, 57600, 115200 }
 124
 125 /*-----------------------------------------------------------------------
 126  * Physical Memory Map
 127  */
 128 #define CONFIG_NR_DRAM_BANKS    4          /* we have 4 banks of DRAM */
 129
 130 /*-----------------------------------------------------------------------
 131  * FLASH and environment organization
 132  */
 133 #define CONFIG_SYS_MAX_FLASH_BANKS      3       /* max number of memory banks           */
 134 #define CONFIG_SYS_MAX_FLASH_SECT       64      /* max number of sectors on one chip    */
 135
 136 /* timeout values are in ticks */
 137 #define CONFIG_SYS_FLASH_ERASE_TOUT     (2*CONFIG_SYS_HZ) /* Timeout for Flash Erase */
 138 #define CONFIG_SYS_FLASH_WRITE_TOUT     (2*CONFIG_SYS_HZ) /* Timeout for Flash Write */
 139
 140 #define CONFIG_SPI_EEPROM      /* Support for SPI EEPROMs (AT25128) */
 141 #define CONFIG_MW_EEPROM       /* Support for MicroWire EEPROMs (AT93LC46) */
 142
 143 /* allow to overwrite serial and ethaddr */
 144 #define CONFIG_ENV_OVERWRITE
 145
 146 /* Environment in EEPROM */
 147 #define CONFIG_ENV_IS_IN_EEPROM   1
 148 #define CONFIG_SPI
 149 #define CONFIG_ENV_SIZE        0x4000   /* Total Size of Environment EEPROM 16k is SPI is used or 128 bytes if MW is used*/
 150 #define CONFIG_ENV_OFFSET         0
 151 #define CONFIG_SC520_CDP_USE_SPI  /* Store configuration in the SPI part */
 152 #undef CONFIG_SC520_CDP_USE_MW    /* Store configuration in the MicroWire part */
 153 #define CONFIG_SPI_X 1
 154
 155 /*
 156  * JFFS2 partitions
 157  */
 158 /* No command line, one static partition, whole device */
 159 #undef CONFIG_JFFS2_CMDLINE
 160 #define CONFIG_JFFS2_DEV                "nor0"
 161 #define CONFIG_JFFS2_PART_SIZE          0xFFFFFFFF
 162 #define CONFIG_JFFS2_PART_OFFSET        0x00000000
 163
 164 /* mtdparts command line support */
 165 /*
 166 #define CONFIG_JFFS2_CMDLINE
 167 #define MTDIDS_DEFAULT          "nor0=SC520CDP Flash Bank #0"
 168 #define MTDPARTS_DEFAULT        "mtdparts=SC520CDP Flash Bank #0:-(jffs2)"
 169 */
 170
 171 /*-----------------------------------------------------------------------
 172  * Device drivers
 173  */
 174 #define CONFIG_NET_MULTI        /* Multi ethernet cards support */
 175 #define CONFIG_PCNET
 176 #define CONFIG_PCNET_79C973
 177 #define CONFIG_PCNET_79C975
 178 #define PCNET_HAS_PROM         1
 179
 180 /************************************************************
 181 *SATA/Native Stuff
 182 ************************************************************/
 183 #ifndef GRUSS_TESTING
 184 #define CONFIG_SYS_SATA_MAXBUS         2       /*Max Sata buses supported */
 185 #define CONFIG_SYS_SATA_DEVS_PER_BUS   2      /*Max no. of devices per bus/port */
 186 #define CONFIG_SYS_SATA_MAX_DEVICE     (CONFIG_SYS_SATA_MAXBUS* CONFIG_SYS_SATA_DEVS_PER_BUS)
 187 #define CONFIG_ATA_PIIX         1       /*Supports ata_piix driver */
 188 #else
 189 #undef CONFIG_SYS_SATA_MAXBUS
 190 #undef CONFIG_SYS_SATA_DEVS_PER_BUS
 191 #undef CONFIG_SYS_SATA_MAX_DEVICE
 192 #undef CONFIG_ATA_PIIX
 193 #endif
 194
 195
 196 /************************************************************
 197  * DISK Partition support
 198  ************************************************************/
 199 #define CONFIG_DOS_PARTITION
 200 #define CONFIG_MAC_PARTITION
 201 #define CONFIG_ISO_PARTITION /* Experimental */
 202
 203 /************************************************************
 204  * Video/Keyboard support
 205  ************************************************************/
 206 #ifndef GRUSS_TESTING
 207 #define CONFIG_VIDEO                    /* To enable video controller support */
 208 #else
 209 #undef CONFIG_VIDEO
 210 #endif
 211 #define CONFIG_I8042_KBD
 212 #define CONFIG_SYS_ISA_IO 0
 213
 214 /************************************************************
 215  * RTC
 216  ***********************************************************/
 217 #define CONFIG_RTC_MC146818
 218 #undef CONFIG_WATCHDOG                  /* watchdog disabled            */
 219
 220 /*
 221  * PCI stuff
 222  */
 223 #ifndef GRUSS_TESTING
 224 #define CONFIG_PCI                                /* include pci support */
 225 #define CONFIG_PCI_PNP                            /* pci plug-and-play */
 226 #define CONFIG_PCI_SCAN_SHOW
 227
 228 #define CONFIG_SYS_FIRST_PCI_IRQ   10
 229 #define CONFIG_SYS_SECOND_PCI_IRQ  9
 230 #define CONFIG_SYS_THIRD_PCI_IRQ   11
 231 #define CONFIG_SYS_FORTH_PCI_IRQ   15
 232 #else
 233 #undef CONFIG_PCI
 234 #undef CONFIG_PCI_PNP
 235 #undef CONFIG_PCI_SCAN_SHOW
 236 #endif
 237
 238
 239 #endif  /* __CONFIG_H */