include/configs/smdk6400.h

   1 /*
   2  * (C) Copyright 2002
   3  * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
   4  * Marius Groeger <mgroeger@sysgo.de>
   5  * Gary Jennejohn <garyj@denx.de>
   6  * David Mueller <d.mueller@elsoft.ch>
   7  *
   8  * (C) Copyright 2008
   9  * Guennadi Liakhovetki, DENX Software Engineering, <lg@denx.de>
  10  *
  11  * Configuation settings for the SAMSUNG SMDK6400(mDirac-III) board.
  12  *
  13  * See file CREDITS for list of people who contributed to this
  14  * project.
  15  *
  16  * This program is free software; you can redistribute it and/or
  17  * modify it under the terms of the GNU General Public License as
  18  * published by the Free Software Foundation; either version 2 of
  19  * the License, or (at your option) any later version.
  20  *
  21  * This program is distributed in the hope that it will be useful,
  22  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  23  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  24  * GNU General Public License for more details.
  25  *
  26  * You should have received a copy of the GNU General Public License
  27  * along with this program; if not, write to the Free Software
  28  * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  29  * MA 02111-1307 USA
  30  */
  31
  32 #ifndef __CONFIG_H
  33 #define __CONFIG_H
  34
  35 /*
  36  * High Level Configuration Options
  37  * (easy to change)
  38  */
  39 #define CONFIG_S3C6400          1       /* in a SAMSUNG S3C6400 SoC     */
  40 #define CONFIG_S3C64XX          1       /* in a SAMSUNG S3C64XX Family  */
  41 #define CONFIG_SMDK6400         1       /* on a SAMSUNG SMDK6400 Board  */
  42
  43 #define CONFIG_PERIPORT_REMAP
  44 #define CONFIG_PERIPORT_BASE    0x70000000
  45 #define CONFIG_PERIPORT_SIZE    0x13
  46
  47 #define CONFIG_SYS_IRAM_BASE    0x0c000000  /* Internal SRAM base address */
  48 #define CONFIG_SYS_IRAM_SIZE    0x2000      /* 8 KB of internal SRAM memory */
  49 #define CONFIG_SYS_IRAM_END     (CONFIG_SYS_IRAM_BASE + CONFIG_SYS_IRAM_SIZE)
  50 #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_IRAM_END - GENERATED_GBL_DATA_SIZE)
  51
  52 #define CONFIG_SYS_SDRAM_BASE   0x50000000
  53
  54 /* input clock of PLL: SMDK6400 has 12MHz input clock */
  55 #define CONFIG_SYS_CLK_FREQ     12000000
  56
  57 #if !defined(CONFIG_NAND_SPL) && (CONFIG_SYS_TEXT_BASE >= 0xc0000000)
  58 #define CONFIG_ENABLE_MMU
  59 #endif
  60
  61 #define CONFIG_SETUP_MEMORY_TAGS
  62 #define CONFIG_CMDLINE_TAG
  63 #define CONFIG_INITRD_TAG
  64
  65 /*
  66  * Architecture magic and machine type
  67  */
  68 #define CONFIG_MACH_TYPE                1270
  69
  70 #define CONFIG_DISPLAY_CPUINFO
  71 #define CONFIG_DISPLAY_BOARDINFO
  72
  73 /*
  74  * Size of malloc() pool
  75  */
  76 #define CONFIG_SYS_MALLOC_LEN           (CONFIG_ENV_SIZE + 1024 * 1024)
  77
  78 /*
  79  * Hardware drivers
  80  */
  81 #define CONFIG_CS8900                   /* we have a CS8900 on-board    */
  82 #define CONFIG_CS8900_BASE              0x18800300
  83 #define CONFIG_CS8900_BUS16             /* follow the Linux driver      */
  84
  85 /*
  86  * select serial console configuration
  87  */
  88 #define CONFIG_SERIAL1          1       /* we use SERIAL 1 on SMDK6400  */
  89
  90 #define CONFIG_SYS_HUSH_PARSER                  /* use "hush" command parser    */
  91
  92 #define CONFIG_CMDLINE_EDITING
  93
  94 /* allow to overwrite serial and ethaddr */
  95 #define CONFIG_ENV_OVERWRITE
  96
  97 #define CONFIG_BAUDRATE         115200
  98
  99 /***********************************************************
 100  * Command definition
 101  ***********************************************************/
 102 #include <config_cmd_default.h>
 103
 104 #define CONFIG_CMD_CACHE
 105 #define CONFIG_CMD_REGINFO
 106 #define CONFIG_CMD_LOADS
 107 #define CONFIG_CMD_LOADB
 108 #define CONFIG_CMD_SAVEENV
 109 #define CONFIG_CMD_NAND
 110 #if defined(CONFIG_BOOT_ONENAND)
 111 #define CONFIG_CMD_ONENAND
 112 #endif
 113 #define CONFIG_CMD_PING
 114 #define CONFIG_CMD_ELF
 115 #define CONFIG_CMD_FAT
 116 #define CONFIG_CMD_EXT2
 117
 118 #define CONFIG_BOOTDELAY        3
 119
 120 #define CONFIG_ZERO_BOOTDELAY_CHECK
 121
 122 #if (CONFIG_COMMANDS & CONFIG_CMD_KGDB)
 123 #define CONFIG_KGDB_BAUDRATE    115200  /* speed to run kgdb serial port */
 124 #define CONFIG_KGDB_SER_INDEX   1       /* which serial port to use      */
 125 #endif
 126
 127 /*
 128  * Miscellaneous configurable options
 129  */
 130 #define CONFIG_SYS_LONGHELP                             /* undef to save memory       */
 131 #define CONFIG_SYS_PROMPT               "SMDK6400 # "   /* Monitor Command Prompt     */
 132 #define CONFIG_SYS_CBSIZE               256             /* Console I/O Buffer Size    */
 133 #define CONFIG_SYS_PBSIZE               384             /* Print Buffer Size          */
 134 #define CONFIG_SYS_MAXARGS              16              /* max number of command args */
 135 #define CONFIG_SYS_BARGSIZE             CONFIG_SYS_CBSIZE       /* Boot Argument Buffer Size  */
 136
 137 #define CONFIG_SYS_MEMTEST_START        CONFIG_SYS_SDRAM_BASE   /* memtest works on           */
 138 #define CONFIG_SYS_MEMTEST_END          (CONFIG_SYS_SDRAM_BASE + 0x7e00000) /* 126MB in DRAM */
 139
 140 #define CONFIG_SYS_LOAD_ADDR            CONFIG_SYS_SDRAM_BASE   /* default load address */
 141
 142 #define CONFIG_SYS_HZ                   1000
 143
 144 /**********************************
 145  Support Clock Settings
 146  **********************************
 147  Setting        SYNC    ASYNC
 148  ----------------------------------
 149  667_133_66      X        O
 150  533_133_66      O        O
 151  400_133_66      X        O
 152  400_100_50      O        O
 153  **********************************/
 154
 155 /*#define CONFIG_CLK_667_133_66*/
 156 #define CONFIG_CLK_533_133_66
 157 /*
 158 #define CONFIG_CLK_400_100_50
 159 #define CONFIG_CLK_400_133_66
 160 #define CONFIG_SYNC_MODE
 161 */
 162
 163 /* SMDK6400 has 2 banks of DRAM, but we use only one in U-Boot */
 164 #define CONFIG_NR_DRAM_BANKS    1
 165 #define PHYS_SDRAM_1            CONFIG_SYS_SDRAM_BASE   /* SDRAM Bank #1        */
 166 #define PHYS_SDRAM_1_SIZE       0x08000000      /* 128 MB in Bank #1    */
 167
 168 #define CONFIG_SYS_FLASH_BASE           0x10000000
 169 #define CONFIG_SYS_MONITOR_BASE 0x00000000
 170
 171 /*-----------------------------------------------------------------------
 172  * FLASH and environment organization
 173  */
 174 #define CONFIG_SYS_MAX_FLASH_BANKS      1       /* max number of memory banks   */
 175 /* AM29LV160B has 35 sectors, AM29LV800B - 19 */
 176 #define CONFIG_SYS_MAX_FLASH_SECT       40
 177
 178 #define CONFIG_AMD_LV800
 179 #define CONFIG_SYS_FLASH_CFI            1       /* Use CFI parameters (needed?) */
 180 /* Use drivers/cfi_flash.c, even though the flash is not CFI-compliant  */
 181 #define CONFIG_FLASH_CFI_DRIVER 1
 182 #define CONFIG_SYS_FLASH_CFI_WIDTH      FLASH_CFI_16BIT
 183 #define CONFIG_FLASH_CFI_LEGACY
 184 #define CONFIG_SYS_FLASH_LEGACY_512Kx16
 185
 186 /* timeout values are in ticks */
 187 #define CONFIG_SYS_FLASH_ERASE_TOUT     (5 * CONFIG_SYS_HZ) /* Timeout for Flash Erase  */
 188 #define CONFIG_SYS_FLASH_WRITE_TOUT     (5 * CONFIG_SYS_HZ) /* Timeout for Flash Write  */
 189
 190 #define CONFIG_ENV_SIZE         0x4000  /* Total Size of Environment Sector */
 191
 192 /*
 193  * SMDK6400 board specific data
 194  */
 195
 196 #define CONFIG_IDENT_STRING     " for SMDK6400"
 197
 198 /* base address for uboot */
 199 #define CONFIG_SYS_PHY_UBOOT_BASE       (CONFIG_SYS_SDRAM_BASE + 0x07e00000)
 200 /* total memory available to uboot */
 201 #define CONFIG_SYS_UBOOT_SIZE           (1024 * 1024)
 202
 203 /* Put environment copies after the end of U-Boot owned RAM */
 204 #define CONFIG_NAND_ENV_DST     (CONFIG_SYS_UBOOT_BASE + CONFIG_SYS_UBOOT_SIZE)
 205
 206 #ifdef CONFIG_ENABLE_MMU
 207 #define CONFIG_SYS_MAPPED_RAM_BASE      0xc0000000
 208 #define CONFIG_BOOTCOMMAND      "nand read 0xc0018000 0x60000 0x1c0000;" \
 209                                 "bootm 0xc0018000"
 210 #else
 211 #define CONFIG_SYS_MAPPED_RAM_BASE      CONFIG_SYS_SDRAM_BASE
 212 #define CONFIG_BOOTCOMMAND      "nand read 0x50018000 0x60000 0x1c0000;" \
 213                                 "bootm 0x50018000"
 214 #endif
 215
 216 /* NAND U-Boot load and start address */
 217 #define CONFIG_SYS_UBOOT_BASE           (CONFIG_SYS_MAPPED_RAM_BASE + 0x07e00000)
 218
 219 #define CONFIG_ENV_OFFSET               0x0040000
 220
 221 /* NAND configuration */
 222 #define CONFIG_SYS_MAX_NAND_DEVICE      1
 223 #define CONFIG_SYS_NAND_BASE            0x70200010
 224 #define CONFIG_SYS_S3C_NAND_HWECC
 225
 226 #define CONFIG_SYS_NAND_SKIP_BAD_DOT_I  1  /* ".i" read skips bad blocks              */
 227 #define CONFIG_SYS_NAND_WP              1
 228 #define CONFIG_SYS_NAND_YAFFS_WRITE     1  /* support yaffs write                     */
 229 #define CONFIG_SYS_NAND_BBT_2NDPAGE     1  /* bad-block markers in 1st and 2nd pages  */
 230
 231 #define CONFIG_SYS_NAND_U_BOOT_DST      CONFIG_SYS_PHY_UBOOT_BASE       /* NUB load-addr      */
 232 #define CONFIG_SYS_NAND_U_BOOT_START    CONFIG_SYS_NAND_U_BOOT_DST      /* NUB start-addr     */
 233
 234 #define CONFIG_SYS_NAND_U_BOOT_OFFS     (4 * 1024)      /* Offset to RAM U-Boot image */
 235 #define CONFIG_SYS_NAND_U_BOOT_SIZE     (252 * 1024)    /* Size of RAM U-Boot image   */
 236
 237 /* NAND chip page size          */
 238 #define CONFIG_SYS_NAND_PAGE_SIZE       2048
 239 /* NAND chip block size         */
 240 #define CONFIG_SYS_NAND_BLOCK_SIZE      (128 * 1024)
 241 /* NAND chip page per block count  */
 242 #define CONFIG_SYS_NAND_PAGE_COUNT      64
 243 /* Location of the bad-block label */
 244 #define CONFIG_SYS_NAND_BAD_BLOCK_POS   0
 245 /* Extra address cycle for > 128MiB */
 246 #define CONFIG_SYS_NAND_5_ADDR_CYCLE
 247
 248 /* Size of the block protected by one OOB (Spare Area in Samsung terminology) */
 249 #define CONFIG_SYS_NAND_ECCSIZE CONFIG_SYS_NAND_PAGE_SIZE
 250 /* Number of ECC bytes per OOB - S3C6400 calculates 4 bytes ECC in 1-bit mode */
 251 #define CONFIG_SYS_NAND_ECCBYTES        4
 252 /* Size of a single OOB region */
 253 #define CONFIG_SYS_NAND_OOBSIZE 64
 254 /* ECC byte positions */
 255 #define CONFIG_SYS_NAND_ECCPOS          {40, 41, 42, 43, 44, 45, 46, 47, \
 256                                  48, 49, 50, 51, 52, 53, 54, 55, \
 257                                  56, 57, 58, 59, 60, 61, 62, 63}
 258
 259 /* Boot configuration (define only one of next 3) */
 260 #define CONFIG_BOOT_NAND
 261 /* None of these are currently implemented. Left from the original Samsung
 262  * version for reference
 263 #define CONFIG_BOOT_NOR
 264 #define CONFIG_BOOT_MOVINAND
 265 #define CONFIG_BOOT_ONENAND
 266 */
 267
 268 #define CONFIG_NAND
 269 #define CONFIG_NAND_S3C64XX
 270 /* Unimplemented or unsupported. See comment above.
 271 #define CONFIG_ONENAND
 272 #define CONFIG_MOVINAND
 273 */
 274
 275 /* Settings as above boot configuration */
 276 #define CONFIG_ENV_IS_IN_NAND
 277 #define CONFIG_BOOTARGS         "console=ttySAC,115200"
 278
 279 #if !defined(CONFIG_ENABLE_MMU)
 280 #define CONFIG_CMD_USB                  1
 281 #define CONFIG_USB_S3C64XX
 282 #define CONFIG_USB_OHCI_NEW             1
 283 #define CONFIG_SYS_USB_OHCI_REGS_BASE           0x74300000
 284 #define CONFIG_SYS_USB_OHCI_SLOT_NAME           "s3c6400"
 285 #define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS      3
 286 #define CONFIG_SYS_USB_OHCI_CPU_INIT            1
 287
 288 #define CONFIG_USB_STORAGE      1
 289 #endif
 290 #define CONFIG_DOS_PARTITION    1
 291
 292 #if defined(CONFIG_USB_OHCI_NEW) && defined(CONFIG_ENABLE_MMU)
 293 # error "usb_ohci.c is currently broken with MMU enabled."
 294 #endif
 295
 296 #endif  /* __CONFIG_H */