include/configs/spear-common.h

   1 /*
   2  * (C) Copyright 2009
   3  * Vipin Kumar, STMicroelectronics, <vipin.kumar@st.com>
   4  *
   5  * SPDX-License-Identifier:     GPL-2.0+
   6  */
   7
   8 #ifndef _SPEAR_COMMON_H
   9 #define _SPEAR_COMMON_H
  10 /*
  11  * Common configurations used for both spear3xx as well as spear6xx
  12  */
  13
  14
  15 /* U-Boot Load Address */
  16 #define CONFIG_SYS_TEXT_BASE                    0x00700000
  17
  18 /* Ethernet driver configuration */
  19 #define CONFIG_MII
  20 #define CONFIG_PHY_RESET_DELAY                  10000           /* in usec */
  21 #define CONFIG_PHY_GIGE                 /* Include GbE speed/duplex detection */
  22
  23 /* USBD driver configuration */
  24 #if defined(CONFIG_SPEAR_USBTTY)
  25 #define CONFIG_DW_UDC
  26 #define CONFIG_USB_DEVICE
  27 #define CONFIG_USBD_HS
  28 #define CONFIG_USB_TTY
  29
  30 #define CONFIG_USBD_PRODUCT_NAME                "SPEAr SoC"
  31 #define CONFIG_USBD_MANUFACTURER                "ST Microelectronics"
  32
  33 #endif
  34
  35 #define CONFIG_EXTRA_ENV_USBTTY                 "usbtty=cdc_acm\0"
  36
  37 /* I2C driver configuration */
  38 #define CONFIG_SYS_I2C
  39 #define CONFIG_SYS_I2C_DW
  40 #if defined(CONFIG_SPEAR600)
  41 #define CONFIG_SYS_I2C_BASE                     0xD0200000
  42 #elif defined(CONFIG_SPEAR300)
  43 #define CONFIG_SYS_I2C_BASE                     0xD0180000
  44 #elif defined(CONFIG_SPEAR310)
  45 #define CONFIG_SYS_I2C_BASE                     0xD0180000
  46 #elif defined(CONFIG_SPEAR320)
  47 #define CONFIG_SYS_I2C_BASE                     0xD0180000
  48 #endif
  49 #define CONFIG_SYS_I2C_SPEED                    400000
  50 #define CONFIG_SYS_I2C_SLAVE                    0x02
  51
  52 #define CONFIG_I2C_CHIPADDRESS                  0x50
  53
  54 /* Timer, HZ specific defines */
  55
  56 /* Flash configuration */
  57 #if defined(CONFIG_FLASH_PNOR)
  58 #define CONFIG_SPEAR_EMI
  59 #else
  60 #define CONFIG_ST_SMI
  61 #endif
  62
  63 #if defined(CONFIG_ST_SMI)
  64
  65 #define CONFIG_SYS_MAX_FLASH_BANKS              2
  66 #define CONFIG_SYS_FLASH_BASE                   0xF8000000
  67 #define CONFIG_SYS_CS1_FLASH_BASE               0xF9000000
  68 #define CONFIG_SYS_FLASH_BANK_SIZE              0x01000000
  69 #define CONFIG_SYS_FLASH_ADDR_BASE              {CONFIG_SYS_FLASH_BASE, \
  70                                                 CONFIG_SYS_CS1_FLASH_BASE}
  71 #define CONFIG_SYS_MAX_FLASH_SECT               128
  72
  73 #define CONFIG_SYS_FLASH_ERASE_TOUT             (3 * CONFIG_SYS_HZ)
  74 #define CONFIG_SYS_FLASH_WRITE_TOUT             (3 * CONFIG_SYS_HZ)
  75
  76 #endif
  77
  78 /*
  79  * Serial Configuration (PL011)
  80  * CONFIG_PL01x_PORTS is defined in specific files
  81  */
  82 #define CONFIG_PL011_SERIAL
  83 #define CONFIG_PL011_CLOCK                      (48 * 1000 * 1000)
  84 #define CONFIG_CONS_INDEX                       0
  85 #define CONFIG_BAUDRATE                         115200
  86 #define CONFIG_SYS_BAUDRATE_TABLE               { 9600, 19200, 38400, \
  87                                                 57600, 115200 }
  88
  89 #define CONFIG_SYS_LOADS_BAUD_CHANGE
  90
  91 /* NAND FLASH Configuration */
  92 #define CONFIG_SYS_NAND_SELF_INIT
  93 #define CONFIG_MTD_DEVICE
  94 #define CONFIG_MTD_PARTITIONS
  95 #define CONFIG_NAND_FSMC
  96 #define CONFIG_SYS_MAX_NAND_DEVICE              1
  97 #define CONFIG_SYS_NAND_ONFI_DETECTION
  98
  99 /*
 100  * Command support defines
 101  */
 102 #define CONFIG_CMD_NAND
 103 #define CONFIG_CMD_ENV
 104 #define CONFIG_CMD_SAVES
 105 #define CONFIG_CMD_MII
 106
 107 /*
 108  * Default Environment Varible definitions
 109  */
 110 #if defined(CONFIG_SPEAR_USBTTY)
 111 #define CONFIG_BOOTDELAY                        -1
 112 #else
 113 #define CONFIG_BOOTDELAY                        1
 114 #endif
 115
 116 #define CONFIG_ENV_OVERWRITE
 117
 118 /*
 119  * U-Boot Environment placing definitions.
 120  */
 121 #if defined(CONFIG_ENV_IS_IN_FLASH)
 122 #ifdef CONFIG_ST_SMI
 123 /*
 124  * Environment is in serial NOR flash
 125  */
 126 #define CONFIG_SYS_MONITOR_LEN                  0x00040000
 127 #define CONFIG_ENV_SECT_SIZE                    0x00010000
 128 #define CONFIG_FSMTDBLK                         "/dev/mtdblock3 "
 129
 130 #define CONFIG_BOOTCOMMAND                      "bootm 0xf8050000"
 131
 132 #elif defined(CONFIG_SPEAR_EMI)
 133 /*
 134  * Environment is in parallel NOR flash
 135  */
 136 #define CONFIG_SYS_MONITOR_LEN                  0x00060000
 137 #define CONFIG_ENV_SECT_SIZE                    0x00020000
 138 #define CONFIG_FSMTDBLK                         "/dev/mtdblock3 "
 139
 140 #define CONFIG_BOOTCOMMAND                      "cp.b 0x50080000 0x1600000 " \
 141                                                 "0x4C0000; bootm 0x1600000"
 142 #endif
 143
 144 #define CONFIG_ENV_ADDR                         (CONFIG_SYS_FLASH_BASE + \
 145                                                 CONFIG_SYS_MONITOR_LEN)
 146 #elif defined(CONFIG_ENV_IS_IN_NAND)
 147 /*
 148  * Environment is in NAND
 149  */
 150
 151 #define CONFIG_ENV_OFFSET                       0x60000
 152 #define CONFIG_ENV_RANGE                        0x10000
 153 #define CONFIG_FSMTDBLK                         "/dev/mtdblock7 "
 154
 155 #define CONFIG_BOOTCOMMAND                      "nand read.jffs2 0x1600000 " \
 156                                                 "0x80000 0x4C0000; " \
 157                                                 "bootm 0x1600000"
 158 #endif
 159
 160 #define CONFIG_BOOTARGS                         "console=ttyAMA0,115200 " \
 161                                                 "mem=128M " \
 162                                                 "root="CONFIG_FSMTDBLK \
 163                                                 "rootfstype=jffs2"
 164
 165 #define CONFIG_NFSBOOTCOMMAND                                           \
 166         "bootp; "                                                       \
 167         "setenv bootargs root=/dev/nfs rw "                             \
 168         "nfsroot=$(serverip):$(rootpath) "                              \
 169         "ip=$(ipaddr):$(serverip):$(gatewayip):"                        \
 170                         "$(netmask):$(hostname):$(netdev):off "         \
 171                         "console=ttyAMA0,115200 $(othbootargs);"        \
 172         "bootm; "
 173
 174 #define CONFIG_RAMBOOTCOMMAND                                           \
 175         "setenv bootargs root=/dev/ram rw "                             \
 176                 "console=ttyAMA0,115200 $(othbootargs);"                \
 177         CONFIG_BOOTCOMMAND
 178
 179
 180 #define CONFIG_ENV_SIZE                         0x02000
 181 #define CONFIG_SYS_MONITOR_BASE                 CONFIG_SYS_TEXT_BASE
 182
 183 /* Miscellaneous configurable options */
 184 #define CONFIG_ARCH_CPU_INIT
 185 #define CONFIG_BOARD_EARLY_INIT_F
 186 #define CONFIG_DISPLAY_CPUINFO
 187 #define CONFIG_BOOT_PARAMS_ADDR                 0x00000100
 188 #define CONFIG_CMDLINE_TAG
 189 #define CONFIG_SETUP_MEMORY_TAGS
 190 #define CONFIG_MISC_INIT_R
 191 #define CONFIG_ZERO_BOOTDELAY_CHECK
 192
 193 #define CONFIG_SYS_MEMTEST_START                0x00800000
 194 #define CONFIG_SYS_MEMTEST_END                  0x04000000
 195 #define CONFIG_SYS_MALLOC_LEN                   (1024*1024)
 196 #define CONFIG_IDENT_STRING                     "-SPEAr"
 197 #define CONFIG_SYS_LONGHELP
 198 #define CONFIG_CMDLINE_EDITING
 199 #define CONFIG_SYS_CBSIZE                       256
 200 #define CONFIG_SYS_PBSIZE                       (CONFIG_SYS_CBSIZE + \
 201                                                 sizeof(CONFIG_SYS_PROMPT) + 16)
 202 #define CONFIG_SYS_MAXARGS                      16
 203 #define CONFIG_SYS_BARGSIZE                     CONFIG_SYS_CBSIZE
 204 #define CONFIG_SYS_LOAD_ADDR                    0x00800000
 205 #define CONFIG_SYS_CONSOLE_INFO_QUIET
 206
 207 #define CONFIG_SYS_FLASH_EMPTY_INFO
 208
 209 /* Physical Memory Map */
 210 #define CONFIG_NR_DRAM_BANKS                    1
 211 #define PHYS_SDRAM_1                            0x00000000
 212 #define PHYS_SDRAM_1_MAXSIZE                    0x40000000
 213
 214 #define CONFIG_SYS_SDRAM_BASE                   PHYS_SDRAM_1
 215 #define CONFIG_SYS_INIT_RAM_ADDR                0xD2800000
 216 #define CONFIG_SYS_INIT_RAM_SIZE                0x2000
 217
 218 #define CONFIG_SYS_INIT_SP_OFFSET               \
 219         (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
 220
 221 #define CONFIG_SYS_INIT_SP_ADDR                 \
 222         (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
 223
 224 #endif