include/configs/xupv2p.h

   1 /*
   2  * (C) Copyright 2007 Czech Technical University.
   3  *
   4  * Michal SIMEK <monstr@monstr.eu>
   5  *
   6  * See file CREDITS for list of people who contributed to this
   7  * project.
   8  *
   9  * This program is free software; you can redistribute it and/or
  10  * modify it under the terms of the GNU General Public License as
  11  * published by the Free Software Foundation; either version 2 of
  12  * the License, or (at your option) any later version.
  13  *
  14  * This program is distributed in the hope that it will be useful,
  15  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  16  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  17  * GNU General Public License for more details.
  18  *
  19  * You should have received a copy of the GNU General Public License
  20  * along with this program; if not, write to the Free Software
  21  * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  22  * MA 02111-1307 USA
  23  */
  24
  25 #ifndef __CONFIG_H
  26 #define __CONFIG_H
  27
  28 #include "../board/xilinx/xupv2p/xparameters.h"
  29
  30 #define CONFIG_MICROBLAZE       1       /* MicroBlaze CPU */
  31 #define CONFIG_XUPV2P           1
  32
  33 /* uart */
  34 #ifdef XILINX_UARTLITE_BASEADDR
  35 #define CONFIG_SERIAL_BASE      XILINX_UARTLITE_BASEADDR
  36 #define CONFIG_BAUDRATE         XILINX_UARTLITE_BAUDRATE
  37 #define CFG_BAUDRATE_TABLE      { CONFIG_BAUDRATE }
  38 #else
  39 #ifdef XILINX_UART16550_BASEADDR
  40 #define CFG_NS16550
  41 #define CFG_NS16550_SERIAL
  42 #define CFG_NS16550_REG_SIZE    4
  43 #define CONFIG_CONS_INDEX       1
  44 #define CFG_NS16550_COM1        XILINX_UART16550_BASEADDR
  45 #define CFG_NS16550_CLK         XILINX_UART16550_CLOCK_HZ
  46
  47 #define CONFIG_BAUDRATE         115200
  48 #define CFG_BAUDRATE_TABLE      { 9600, 115200 }
  49 #endif
  50 #endif
  51
  52 /* ethernet */
  53 #ifdef XILINX_EMAC_BASEADDR
  54 #define XILINX_EMAC     1
  55 #else
  56 #ifdef XILINX_EMACLITE_BASEADDR
  57 #define XILINX_EMACLITE 1
  58 #endif
  59 #endif
  60 #undef ET_DEBUG
  61
  62 /*
  63  * setting reset address
  64  *
  65  * TEXT_BASE is set to place, where the U-BOOT run in RAM, but
  66  * if you want to store U-BOOT in flash, set CFG_RESET_ADDRESS
  67  * to FLASH memory and after loading bitstream jump to FLASH.
  68  * U-BOOT auto-relocate to TEXT_BASE. After RESET command Microblaze
  69  * jump to CFG_RESET_ADDRESS where is the original U-BOOT code.
  70  */
  71 /* #define      CFG_RESET_ADDRESS       0x36000000 */
  72
  73 /* gpio */
  74 #ifdef XILINX_GPIO_BASEADDR
  75 #define CFG_GPIO_0              1
  76 #define CFG_GPIO_0_ADDR         XILINX_GPIO_BASEADDR
  77 #endif
  78
  79 /* interrupt controller */
  80 #define CFG_INTC_0              1
  81 #define CFG_INTC_0_ADDR         XILINX_INTC_BASEADDR
  82 #define CFG_INTC_0_NUM          XILINX_INTC_NUM_INTR_INPUTS
  83
  84 /* timer */
  85 #define CFG_TIMER_0             1
  86 #define CFG_TIMER_0_ADDR        XILINX_TIMER_BASEADDR
  87 #define CFG_TIMER_0_IRQ         XILINX_TIMER_IRQ
  88 #define FREQUENCE               XILINX_CLOCK_FREQ
  89 #define CFG_TIMER_0_PRELOAD     ( FREQUENCE/1000 )
  90
  91 /*
  92  * memory layout - Example
  93  * TEXT_BASE = 0x3600_0000;
  94  * CFG_SRAM_BASE = 0x3000_0000;
  95  * CFG_SRAM_SIZE = 0x1000_0000;
  96  *
  97  * CFG_GBL_DATA_OFFSET = 0x3000_0000 + 0x1000_0000 - 0x1000 = 0x3FFF_F000
  98  * CFG_MONITOR_BASE = 0x3FFF_F000 - 0x40000 = 0x3FFB_F000
  99  * CFG_MALLOC_BASE = 0x3FFB_F000 - 0x40000 = 0x3FF7_F000
 100  *
 101  * 0x3000_0000  CFG_SDRAM_BASE
 102  *                                      FREE
 103  * 0x3600_0000  TEXT_BASE
 104  *              U-BOOT code
 105  * 0x3602_0000
 106  *                                      FREE
 107  *
 108  *                                      STACK
 109  * 0x3FF7_F000  CFG_MALLOC_BASE
 110  *                                      MALLOC_AREA     256kB   Alloc
 111  * 0x3FFB_F000  CFG_MONITOR_BASE
 112  *                                      MONITOR_CODE    256kB   Env
 113  * 0x3FFF_F000  CFG_GBL_DATA_OFFSET
 114  *                                      GLOBAL_DATA     4kB     bd, gd
 115  * 0x4000_0000  CFG_SDRAM_BASE + CFG_SDRAM_SIZE
 116  */
 117
 118 /* ddr sdram - main memory */
 119 #define CFG_SDRAM_BASE          XILINX_RAM_START
 120 #define CFG_SDRAM_SIZE          XILINX_RAM_SIZE
 121 #define CFG_MEMTEST_START       CFG_SDRAM_BASE
 122 #define CFG_MEMTEST_END         (CFG_SDRAM_BASE + 0x1000)
 123
 124 /* global pointer */
 125 #define CFG_GBL_DATA_SIZE       0x1000  /* size of global data */
 126 #define CFG_GBL_DATA_OFFSET     (CFG_SDRAM_BASE + CFG_SDRAM_SIZE - CFG_GBL_DATA_SIZE) /* start of global data */
 127
 128 /* monitor code */
 129 #define SIZE                    0x40000
 130 #define CFG_MONITOR_LEN         SIZE
 131 #define CFG_MONITOR_BASE        (CFG_GBL_DATA_OFFSET - CFG_MONITOR_LEN)
 132 #define CFG_MONITOR_END         (CFG_MONITOR_BASE + CFG_MONITOR_LEN)
 133 #define CFG_MALLOC_LEN          SIZE
 134 #define CFG_MALLOC_BASE         (CFG_MONITOR_BASE - CFG_MALLOC_LEN)
 135
 136 /* stack */
 137 #define CFG_INIT_SP_OFFSET      CFG_MALLOC_BASE
 138
 139 #define CFG_NO_FLASH            1
 140 #define CFG_ENV_IS_NOWHERE      1
 141 #define CFG_ENV_SIZE            0x1000
 142 #define CFG_ENV_ADDR            (CFG_MONITOR_BASE - CFG_ENV_SIZE)
 143 #ifndef XILINX_SYSACE_BASEADDR
 144 #define CONFIG_COMMANDS (CONFIG__CMD_DFL |\
 145                         CFG_CMD_MEMORY |\
 146                         CFG_CMD_IRQ |\
 147                         CFG_CMD_BDI |\
 148                         CFG_CMD_NET |\
 149                         CFG_CMD_IMI |\
 150                         CFG_CMD_ECHO |\
 151                         CFG_CMD_CACHE |\
 152                         CFG_CMD_RUN |\
 153                         CFG_CMD_AUTOSCRIPT |\
 154                         CFG_CMD_ASKENV |\
 155                         CFG_CMD_LOADS |\
 156                         CFG_CMD_LOADB |\
 157                         CFG_CMD_MISC |\
 158                         CFG_CMD_MFSL |\
 159                         CFG_CMD_PING \
 160                         )
 161 #else
 162 #define CONFIG_COMMANDS (CONFIG__CMD_DFL |\
 163                         CFG_CMD_MEMORY |\
 164                         CFG_CMD_IRQ |\
 165                         CFG_CMD_BDI |\
 166                         CFG_CMD_NET |\
 167                         CFG_CMD_IMI |\
 168                         CFG_CMD_ECHO |\
 169                         CFG_CMD_CACHE |\
 170                         CFG_CMD_RUN |\
 171                         CFG_CMD_AUTOSCRIPT |\
 172                         CFG_CMD_ASKENV |\
 173                         CFG_CMD_LOADS |\
 174                         CFG_CMD_LOADB |\
 175                         CFG_CMD_MISC |\
 176                         CFG_CMD_FAT |\
 177                         CFG_CMD_EXT2 |\
 178                         CFG_CMD_MFSL |\
 179                         CFG_CMD_PING \
 180                         )
 181 #endif
 182
 183 /* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */
 184 #include <cmd_confdefs.h>
 185
 186 /* Miscellaneous configurable options */
 187 #define CFG_PROMPT      "U-Boot-mONStR> "
 188 #define CFG_CBSIZE      512     /* size of console buffer */
 189 #define CFG_PBSIZE      (CFG_CBSIZE + sizeof(CFG_PROMPT) + 16) /* print buffer size */
 190 #define CFG_MAXARGS     15      /* max number of command args */
 191 #define CFG_LONGHELP
 192 #define CFG_LOAD_ADDR   0x12000000 /* default load address */
 193
 194 #define CONFIG_BOOTDELAY        30
 195 #define CONFIG_BOOTARGS         "root=romfs"
 196 #define CONFIG_HOSTNAME         "xupv2p"
 197 #define CONFIG_BOOTCOMMAND      "base 0;tftp 11000000 image.img;bootm"
 198 #define CONFIG_IPADDR           192.168.0.3
 199 #define CONFIG_SERVERIP         192.168.0.5
 200 #define CONFIG_GATEWAYIP        192.168.0.1
 201 #define CONFIG_ETHADDR          00:E0:0C:00:00:FD
 202
 203 /* architecture dependent code */
 204 #define CFG_USR_EXCEP   /* user exception */
 205 #define CFG_HZ  1000
 206
 207 #define CONFIG_PREBOOT  "echo U-BOOT by mONStR;"        \
 208         "base 0;" \
 209         "echo"
 210
 211 /* system ace */
 212 #ifdef XILINX_SYSACE_BASEADDR
 213 #define CONFIG_SYSTEMACE
 214 /* #define DEBUG_SYSTEMACE */
 215 #define SYSTEMACE_CONFIG_FPGA
 216 #define CFG_SYSTEMACE_BASE      XILINX_SYSACE_BASEADDR
 217 #define CFG_SYSTEMACE_WIDTH     XILINX_SYSACE_MEM_WIDTH
 218 #define CONFIG_DOS_PARTITION
 219 #endif
 220
 221 #endif  /* __CONFIG_H */